root/drivers/scsi/eata_dma.h

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INCLUDED FROM


   1 /********************************************************
   2 * Header file for eata_dma.c Linux EATA-DMA SCSI driver *
   3 * (c) 1993,94,95 Michael Neuffer                        *
   4 *********************************************************
   5 * last change: 95/01/16                                 *
   6 ********************************************************/
   7 
   8 
   9 #ifndef _EATA_DMA_H
  10 #define _EATA_DMA_H
  11 
  12 #include "../block/blk.h"
  13 #include "scsi.h"
  14 #include "hosts.h"
  15 #include <linux/scsicam.h>
  16 
  17 #define VER_MAJOR 2
  18 #define VER_MINOR 1
  19 #define VER_SUB   "0h"
  20 
  21 /************************************************************************
  22  * Here you can configure your drives that are using a non-standard     *
  23  * geometry.                                                            *
  24  * To enable this set HARDCODED to 1                                    *
  25  * If you have only one drive that need reconfiguration, set ID1 to -1  *
  26  ************************************************************************/
  27 #define HARDCODED     0          /* Here are drives running in emu. mode   */
  28 
  29 #define ID0           0          /* SCSI ID of "IDE" drive mapped to C:    
  30                                   * If you're not sure check your config
  31                                   * utility that came with your controller
  32                                   */
  33 #define HEADS0       13          /* Number of emulated heads of this drive */  
  34 #define SECTORS0     38          /* Number of emulated sectors             */ 
  35 #define CYLINDER0   719          /* Number of emulated cylinders           */
  36    
  37 #define ID1           1          /* SCSI ID of "IDE" drive mapped to D:    */
  38 #define HEADS1       16          /* Number of emulated heads of this drive */ 
  39 #define SECTORS1     62          /* Number of emulated sectors             */
  40 #define CYLINDER1  1024          /* Number of emulated cylinders           */
  41 
  42 /************************************************************************
  43  * Here you can switch parts of the code on and of                      *
  44  ************************************************************************/
  45 
  46 #define CHECKPAL        0        /* EISA pal checking on/off            */
  47 
  48 /************************************************************************
  49  * Debug options.                                                       * 
  50  * Enable DEBUG and whichever options you require.                      *
  51  ************************************************************************/
  52 #define DEBUG_EATA      1       /* Enable debug code.                   */
  53 #define DPT_DEBUG       0       /* Bobs special                         */
  54 #define DBG_DELAY       0       /* Build in delays so debug messages can be
  55                                  * be read before they vanish of the top of
  56                                  * the screen!
  57                                  */
  58 #define DBG_PROBE       0       /* Debug probe routines.                */
  59 #define DBG_PCI         0       /* Trace PCI routines                   */
  60 #define DBG_EISA        0       /* Trace EISA routines                  */
  61 #define DBG_ISA         0       /* Trace ISA routines                   */ 
  62 #define DBG_BLINK       0       /* Trace Blink check                    */
  63 #define DBG_PIO         0       /* Trace get_config_PIO                 */
  64 #define DBG_COM         0       /* Trace command call                   */
  65 #define DBG_QUEUE       0       /* Trace command queueing.              */
  66 #define DBG_INTR        0       /* Trace interrupt service routine.     */
  67 #define DBG_INTR2       0       /* Trace interrupt service routine.     */
  68 #define DBG_REGISTER    0       /* */
  69 #define DBG_ABNORM      1       /* Debug abnormal actions (reset, abort)*/
  70 
  71 #if DEBUG_EATA 
  72 #define DBG(x, y)       if ((x)) {y;} 
  73 #else
  74 #define DBG(x, y)
  75 #endif
  76 
  77 
  78 #define EATA_DMA {                   \
  79         NULL, NULL,                  \
  80         "EATA (Extended Attachment) driver", \
  81         eata_detect,                 \
  82         NULL,                        \
  83         eata_info,                   \
  84         eata_command,                \
  85         eata_queue,                  \
  86         eata_abort,                  \
  87         eata_reset,                  \
  88         NULL, /* Slave attach */     \
  89         scsicam_bios_param,          \
  90         0,      /* Canqueue     */   \
  91         0,      /* this_id      */   \
  92         0,      /* sg_tablesize */   \
  93         0,      /* cmd_per_lun  */   \
  94         0,      /* present      */   \
  95         1,      /* True if ISA  */   \
  96         ENABLE_CLUSTERING }
  97 
  98 int eata_detect(Scsi_Host_Template *);
  99 const char *eata_info(struct Scsi_Host *);
 100 int eata_command(Scsi_Cmnd *);
 101 int eata_queue(Scsi_Cmnd *, void *(done)(Scsi_Cmnd *));
 102 int eata_abort(Scsi_Cmnd *);
 103 int eata_reset(Scsi_Cmnd *);
 104 
 105 
 106 /*********************************************
 107  * Misc. definitions                         *
 108  *********************************************/
 109 
 110 #ifndef TRUE
 111 # define TRUE 1
 112 #endif
 113 #ifndef FALSE
 114 # define FALSE 0
 115 #endif
 116 
 117 #define R_LIMIT 0x20000
 118 
 119 #define MAXISA     4
 120 #define MAXEISA   16  
 121 #define MAXPCI    16
 122 #define MAXIRQ    16 
 123 #define MAXTARGET  8
 124 
 125 #define MAX_PCI_DEVICES   32             /* Maximum # Of Devices Per Bus   */
 126 #define MAX_METHOD_2      16             /* Max Devices For Method 2       */
 127 #define MAX_PCI_BUS       16             /* Maximum # Of Busses Allowed    */
 128 
 129 #define SG_SIZE           64 
 130 #define C_P_L_DIV          8             /* 1 <= C_P_L_DIV <= 8            */
 131 #define C_P_L_CURRENT_MAX  2             /* Until this limit is removed    */
 132 
 133 #define FREE       0
 134 #define USED       1
 135 #define TIMEOUT    2
 136 #define RESET      4
 137 #define LOCKED     8
 138 
 139 #define HD(cmd)  ((hostdata *)&(cmd->host->hostdata))
 140 #define CD(cmd)  ((struct eata_ccb *)(cmd->host_scribble))
 141 #define SD(host) ((hostdata *)&(host->hostdata))
 142 
 143 #define DELAY(x) { int i; i = jiffies + x; while (jiffies < i); }
 144 #define DEL2(x)  { ulong i; for (i = 0; i < 0xffff*x; i++); }
 145 
 146 /***********************************************
 147  *    EATA Command & Register definitions      *
 148  ***********************************************/
 149 #define PCI_REG_DPTconfig        0x40    
 150 #define PCI_REG_PumpModeAddress  0x44    
 151 #define PCI_REG_PumpModeData     0x48    
 152 #define PCI_REG_ConfigParam1     0x50    
 153 #define PCI_REG_ConfigParam2     0x54    
 154 
 155 
 156 #define EATA_CMD_PIO_READ_CONFIG 0xf0
 157 #define EATA_CMD_PIO_SET_CONFIG  0xf1
 158 #define EATA_CMD_PIO_SEND_CP     0xf2
 159 #define EATA_CMD_PIO_RECEIVE_SP  0xf3
 160 #define EATA_CMD_PIO_TRUNC       0xf4
 161 
 162 #define EATA_CMD_RESET           0xf9
 163 
 164 #define EATA_CMD_DMA_READ_CONFIG 0xfd
 165 #define EATA_CMD_DMA_SET_CONFIG  0xfe
 166 #define EATA_CMD_DMA_SEND_CP     0xff
 167 
 168 #define ECS_EMULATE_SENSE        0xd4
 169 
 170 #define HA_WCOMMAND 0x07        /* command register offset   */
 171 #define HA_WDMAADDR 0x02        /* DMA address LSB offset    */  
 172 #define HA_RAUXSTAT 0x08        /* aux status register offset*/
 173 #define HA_RSTATUS  0x07        /* status register offset    */
 174 #define HA_RDATA    0x00        /* data register (16bit)     */
 175 
 176 #define HA_ABUSY    0x01        /* aux busy bit              */
 177 #define HA_AIRQ     0x02        /* aux IRQ pending bit       */
 178 #define HA_SERROR   0x01        /* pr. command ended in error*/
 179 #define HA_SMORE    0x02        /* more data soon to come    */
 180 #define HA_SCORR    0x04        /* data corrected            */
 181 #define HA_SDRQ     0x08        /* data request active       */
 182 #define HA_SSC      0x10        /* seek complete             */
 183 #define HA_SFAULT   0x20        /* write fault               */
 184 #define HA_SREADY   0x40        /* drive ready               */
 185 #define HA_SBUSY    0x80        /* drive busy                */
 186 #define HA_SDRDY    HA_SSC+HA_SREADY+HA_SDRQ 
 187 
 188 /**********************************************
 189  * Message definitions                        *
 190  **********************************************/
 191 
 192 struct reg_bit {        /* reading this one will clear the interrupt    */
 193   unchar error:1;     /* previous command ended in an error           */
 194   unchar more:1;      /* more DATA coming soon, poll BSY & DRQ (PIO) */
 195   unchar corr:1;      /* data read was successfully corrected with ECC*/
 196   unchar drq:1;       /* data request active  */     
 197   unchar sc:1;        /* seek complete        */
 198   unchar fault:1;     /* write fault          */
 199   unchar ready:1;     /* drive ready          */
 200   unchar busy:1;      /* controller busy      */
 201 };
 202 
 203 struct reg_abit {       /* reading this won't clear the interrupt */
 204   unchar abusy:1;     /* auxiliary busy                         */
 205   unchar irq:1;       /* set when drive interrupt is asserted   */
 206   unchar dummy:6;
 207 };
 208 
 209 struct eata_register {              /* EATA register set */
 210   unchar data_reg[2];           /* R, couldn't figure this one out          */
 211   unchar cp_addr[4];            /* W, CP address register                   */
 212   union { 
 213     unchar command;                     /* W, command code: [read|set] conf, send CP*/
 214     struct reg_bit status;      /* R, see register_bit1                     */
 215     unchar statusunchar;
 216   } ovr;   
 217   struct reg_abit aux_stat;     /* R, see register_bit2                     */
 218 };
 219 
 220 /**********************************************
 221  *  Other  definitions                        *
 222  **********************************************/
 223 
 224 struct eata_sg_list
 225 {
 226   ulong data;
 227   ulong len;
 228 };
 229 
 230 struct get_conf {          /* Read Configuration Array  */
 231   ulong  len;                 /* Should return 0x22                     */
 232   unchar sig[4];              /* Signature MUST be "EATA"               */
 233   unchar    version2:4,
 234              version:4;       /* EATA Version level                     */
 235   unchar OCS_enabled:1,       /* Overlap Command Support enabled        */
 236          TAR_support:1,       /* SCSI Target Mode supported             */
 237               TRNXFR:1,       /* Truncate Transfer Cmd not necessary    */
 238                               /* Only used in PIO Mode                  */
 239         MORE_support:1,       /* MORE supported (only PIO Mode)         */
 240          DMA_support:1,       /* DMA supported Driver uses only         */
 241                               /* this mode                              */
 242            DMA_valid:1,       /* DRQ value in Byte 30 is valid          */
 243                  ATA:1,       /* ATA device connected (not supported)   */
 244            HAA_valid:1;       /* Hostadapter Address is valid           */
 245 
 246   ushort cppadlen;            /* Number of pad unchars send after CD data */
 247                               /* set to zero for DMA commands           */
 248   unchar scsi_id[4];          /* SCSI ID of controller 2-0 Byte 0 res.  */
 249                               /* if not, zero is returned               */
 250   ulong  cplen;               /* CP length: number of valid cp unchars  */
 251   ulong  splen;               /* Number of unchars returned after       */ 
 252                               /* Receive SP command                     */
 253   ushort queuesiz;            /* max number of queueable CPs            */
 254   ushort dummy;
 255   ushort SGsiz;               /* max number of SG table entries         */
 256   unchar    IRQ:4,            /* IRQ used this HA                       */
 257          IRQ_TR:1,            /* IRQ Trigger: 0=edge, 1=level           */
 258          SECOND:1,            /* This is a secondary controller         */  
 259     DMA_channel:2;            /* DRQ index, DRQ is 2comp of DRQX        */
 260   unchar sync;                /* device at ID 7 tru 0 is running in     */
 261                               /* synchronous mode, this will disappear  */
 262   unchar   DSBLE:1,           /* ISA i/o addressing is disabled         */
 263          FORCADR:1,           /* i/o address has been forced            */
 264                 :6;
 265   unchar  MAX_ID:5,           /* Max number of SCSI target IDs          */
 266         MAX_CHAN:3;           /* Number of SCSI busses on HBA           */
 267   unchar MAX_LUN;             /* Max number of LUNs                     */
 268   unchar        :5,          
 269          ID_qest:1,           /* Raidnum ID is questionable             */
 270           is_PCI:1,           /* HBA is PCI                             */
 271          is_EISA:1;           /* HBA is EISA                            */
 272   unchar unused[478]; 
 273 };
 274 
 275 struct eata_ccb {             /* Send Command Packet structure      */
 276  
 277   unchar SCSI_Reset:1,        /* Cause a SCSI Bus reset on the cmd  */
 278            HBA_Init:1,        /* Cause Controller to reinitialize   */
 279        Auto_Req_Sen:1,        /* Do Auto Request Sense on errors    */
 280             scatter:1,        /* Data Ptr points to a SG Packet     */
 281              Resrvd:1,        /* RFU                                */
 282           Interpret:1,        /* Interpret the SCSI cdb of own use  */
 283             DataOut:1,        /* Data Out phase with command        */
 284              DataIn:1;        /* Data In phase with command         */
 285   unchar reqlen;              /* Request Sense Length               */ 
 286                               /* Valid if Auto_Req_Sen=1            */
 287   unchar unused[3];
 288   unchar  FWNEST:1,           /* send cmd to phys RAID component*/
 289          unused2:7;
 290   unchar Phsunit:1,           /* physical unit on mirrored pair */
 291             I_AT:1,           /* inhibit address translation    */
 292          I_HBA_C:1,           /* HBA Inhibit caching            */
 293          unused3:5;
 294 
 295   unchar cp_id;               /* SCSI Device ID of target       */ 
 296   unchar    cp_lun:3,
 297                   :2,
 298          cp_luntar:1,         /* CP is for target ROUTINE       */
 299          cp_dispri:1,         /* Grant disconnect privilege     */
 300        cp_identify:1;         /* Always TRUE                    */         
 301   unchar cp_msg1;             /* Message bytes 0-3              */
 302   unchar cp_msg2;
 303   unchar cp_msg3;
 304   unchar cp_cdb[12];          /* Command Descriptor Block       */
 305   ulong  cp_datalen;          /* Data Transfer Length           */
 306                               /* If scatter=1 len of sg package */
 307   void *cp_viraddr;           /* address of this ccb            */
 308   ulong cp_dataDMA;           /* Data Address, if scatter=1     */
 309                               /* address of scatter packet      */  
 310   ulong cp_statDMA;           /* address for Status Packet      */ 
 311   ulong cp_reqDMA;            /* Request Sense Address, used if */
 312                               /* CP command ends with error     */
 313  
 314   ulong timeout;
 315   unchar retries;
 316   unchar status;              /* status of this queueslot       */
 317   struct eata_sg_list sg_list[SG_SIZE];
 318   Scsi_Cmnd *cmd;             /* address of cmd                 */
 319 };
 320 
 321 
 322 struct eata_sp
 323 {
 324   unchar hba_stat:7,          /* HBA status                     */
 325               EOC:1;          /* True if command finished       */
 326   unchar scsi_stat;           /* Target SCSI status             */       
 327   unchar reserved[2];
 328   ulong  residue_len;         /* Number of unchars not transferred */
 329   struct eata_ccb *ccb;       /* Address set in COMMAND PACKET  */
 330   unchar msg[12];
 331 };
 332 
 333 typedef struct hstd{
 334   char   vendor[9];
 335   char   name[18];
 336   char   revision[6];
 337   char   EATA_revision;
 338   unchar bustype;              /* bustype of HBA             */
 339   unchar channel;              /* no. of scsi channel        */
 340   unchar state;                /* state of HBA               */
 341   unchar t_state[MAXTARGET];   /* state of Target (RESET,..) */
 342   uint   t_timeout[MAXTARGET]; /* timeouts on target         */
 343   unchar primary;              /* true if primary            */
 344   uint   last_ccb;             /* Last used ccb              */
 345   struct Scsi_Host *next;         
 346   struct Scsi_Host *prev;
 347   struct eata_sp sp;           /* status packet              */ 
 348   struct eata_ccb ccb[0];      /* ccb array begins here      */
 349 }hostdata;
 350 
 351 
 352 
 353 /* structure for max. 2 emulated drives */
 354 struct drive_geom_emul {
 355   unchar trans;                 /* translation flag 1=transl */
 356   unchar channel;               /* SCSI channel number       */
 357   unchar HBA;                   /* HBA number (prim/sec)     */
 358   unchar id;                    /* drive id                  */
 359   unchar lun;                   /* drive lun                 */
 360   uint   heads;                 /* number of heads           */
 361   uint   sectors;               /* number of sectors         */
 362   uint   cylinder;              /* number of cylinders       */
 363 };
 364 
 365 struct geom_emul {
 366   int bios_drives;               /* number of emulated drives */
 367   struct drive_geom_emul drv[2]; /* drive structures          */
 368 };
 369 
 370 struct lun_map {
 371   unchar   id:5,
 372          chan:3;
 373   unchar lun;
 374 };
 375 
 376 typedef struct emul_pp {
 377   unchar p_code:6,
 378            null:1,
 379          p_save:1;
 380   unchar p_length;
 381   ushort cylinder;
 382   unchar heads;
 383   unchar sectors;
 384   unchar null2;
 385   unchar s_lunmap:4,
 386               ems:1;
 387   ushort drive_type;   /* In Little Endian ! */
 388   struct lun_map lunmap[4];
 389 }emulpp;
 390 
 391 
 392 
 393 #endif /* _EATA_H */

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