taglinefilesource code
sp_banks409arch/sparc/kernel/probe.cextern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS];
sp_banks246arch/sparc/kernel/setup.cfor(i=0; sp_banks[i].num_bytes != 0; i++) {
sp_banks249arch/sparc/kernel/setup.c(unsigned int) sp_banks[i].base_addr, 
sp_banks250arch/sparc/kernel/setup.c(int) sp_banks[i].num_bytes);
sp_banks252arch/sparc/kernel/setup.cend_of_phys_memory = sp_banks[i].base_addr + sp_banks[i].num_bytes;
sp_banks28arch/sparc/mm/fault.cextern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS];
sp_banks60arch/sparc/mm/fault.csp_banks[0].base_addr = base_paddr;
sp_banks61arch/sparc/mm/fault.csp_banks[0].num_bytes = bytes;
sp_banks76arch/sparc/mm/fault.csp_banks[i].base_addr = (unsigned long) mlist->start_adr;
sp_banks77arch/sparc/mm/fault.csp_banks[i].num_bytes = mlist->num_bytes;
sp_banks81arch/sparc/mm/fault.csp_banks[i].base_addr = 0xdeadbeef;
sp_banks82arch/sparc/mm/fault.csp_banks[i].num_bytes = 0;
sp_banks29arch/sparc/mm/init.cstruct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS];
sp_banks186arch/sparc/mm/init.cfor(tmp2=0; sp_banks[tmp2].num_bytes != 0; tmp2++) {
sp_banks188arch/sparc/mm/init.cunsigned long base = sp_banks[tmp2].base_addr;
sp_banks189arch/sparc/mm/init.cunsigned long limit = base + sp_banks[tmp2].num_bytes;
sp_banks36include/asm-sparc/page.hextern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS];