taglinefilesource code
set542arch/alpha/kernel/osf_sys.c} set;
set587arch/alpha/kernel/osf_sys.cerror = verify_area(VERIFY_READ, &args->set.nbytes,
set588arch/alpha/kernel/osf_sys.csizeof(args->set.nbytes));
set591arch/alpha/kernel/osf_sys.creturn args->set.nbytes;
set30arch/i386/kernel/signal.casmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, unsigned long set)
set36arch/i386/kernel/signal.ccurrent->blocked = set & _BLOCKABLE;
set80arch/m68k/fpsp040/fpsp.h.set  LOCAL_SIZE,192    | bytes needed for local variables
set81arch/m68k/fpsp040/fpsp.h.set  LV,-LOCAL_SIZE  | convenient base value
set83arch/m68k/fpsp040/fpsp.h.set  USER_DA,LV+0    | save space for D0-D1,A0-A1
set84arch/m68k/fpsp040/fpsp.h.set  USER_D0,LV+0    | saved user D0
set85arch/m68k/fpsp040/fpsp.h.set  USER_D1,LV+4    | saved user D1
set86arch/m68k/fpsp040/fpsp.h.set  USER_A0,LV+8    | saved user A0
set87arch/m68k/fpsp040/fpsp.h.set  USER_A1,LV+12    | saved user A1
set88arch/m68k/fpsp040/fpsp.h.set  USER_FP0,LV+16    | saved user FP0
set89arch/m68k/fpsp040/fpsp.h.set  USER_FP1,LV+28    | saved user FP1
set90arch/m68k/fpsp040/fpsp.h.set  USER_FP2,LV+40    | saved user FP2
set91arch/m68k/fpsp040/fpsp.h.set  USER_FP3,LV+52    | saved user FP3
set92arch/m68k/fpsp040/fpsp.h.set  USER_FPCR,LV+64    | saved user FPCR
set93arch/m68k/fpsp040/fpsp.h.set  FPCR_ENABLE,USER_FPCR+2  |   FPCR exception enable 
set94arch/m68k/fpsp040/fpsp.h.set  FPCR_MODE,USER_FPCR+3  |   FPCR rounding mode control
set95arch/m68k/fpsp040/fpsp.h.set  USER_FPSR,LV+68    | saved user FPSR
set96arch/m68k/fpsp040/fpsp.h.set  FPSR_CC,USER_FPSR+0  |   FPSR condition code
set97arch/m68k/fpsp040/fpsp.h.set  FPSR_QBYTE,USER_FPSR+1  |   FPSR quotient
set98arch/m68k/fpsp040/fpsp.h.set  FPSR_EXCEPT,USER_FPSR+2  |   FPSR exception
set99arch/m68k/fpsp040/fpsp.h.set  FPSR_AEXCEPT,USER_FPSR+3  |   FPSR accrued exception
set100arch/m68k/fpsp040/fpsp.h.set  USER_FPIAR,LV+72    | saved user FPIAR
set101arch/m68k/fpsp040/fpsp.h.set  FP_SCR1,LV+76    | room for a temporary float value
set102arch/m68k/fpsp040/fpsp.h.set  FP_SCR2,LV+92    | room for a temporary float value
set103arch/m68k/fpsp040/fpsp.h.set  L_SCR1,LV+108    | room for a temporary long value
set104arch/m68k/fpsp040/fpsp.h.set  L_SCR2,LV+112    | room for a temporary long value
set105arch/m68k/fpsp040/fpsp.h.set  STORE_FLG,LV+116
set106arch/m68k/fpsp040/fpsp.h.set  BINDEC_FLG,LV+117    | used in bindec
set107arch/m68k/fpsp040/fpsp.h.set  DNRM_FLG,LV+118    | used in res_func
set108arch/m68k/fpsp040/fpsp.h.set  RES_FLG,LV+119    | used in res_func
set109arch/m68k/fpsp040/fpsp.h.set  DY_MO_FLG,LV+120    | dyadic/monadic flag
set110arch/m68k/fpsp040/fpsp.h.set  UFLG_TMP,LV+121    | temporary for uflag errata
set111arch/m68k/fpsp040/fpsp.h.set  CU_ONLY,LV+122    | cu-only flag
set112arch/m68k/fpsp040/fpsp.h.set  VER_TMP,LV+123    | temp holding for version number
set113arch/m68k/fpsp040/fpsp.h.set  L_SCR3,LV+124    | room for a temporary long value
set114arch/m68k/fpsp040/fpsp.h.set  FP_SCR3,LV+128    | room for a temporary float value
set115arch/m68k/fpsp040/fpsp.h.set  FP_SCR4,LV+144    | room for a temporary float value
set116arch/m68k/fpsp040/fpsp.h.set  FP_SCR5,LV+160    | room for a temporary float value
set117arch/m68k/fpsp040/fpsp.h.set  FP_SCR6,LV+176
set128arch/m68k/fpsp040/fpsp.h.set  CU_SAVEPC,LV-92    | micro-pc for CU (1 byte)
set129arch/m68k/fpsp040/fpsp.h.set  FPR_DIRTY_BITS,LV-91    | fpr dirty bits
set131arch/m68k/fpsp040/fpsp.h.set  WBTEMP,LV-76    | write back temp (12 bytes)
set132arch/m68k/fpsp040/fpsp.h.set  WBTEMP_EX,WBTEMP    | wbtemp sign and exponent (2 bytes)
set133arch/m68k/fpsp040/fpsp.h.set  WBTEMP_HI,WBTEMP+4  | wbtemp mantissa [63:32] (4 bytes)
set134arch/m68k/fpsp040/fpsp.h.set  WBTEMP_LO,WBTEMP+8  | wbtemp mantissa [31:00] (4 bytes)
set136arch/m68k/fpsp040/fpsp.h.set  WBTEMP_SGN,WBTEMP+2  | used to store sign
set138arch/m68k/fpsp040/fpsp.h.set  FPSR_SHADOW,LV-64    | fpsr shadow reg
set140arch/m68k/fpsp040/fpsp.h.set  FPIARCU,LV-60    | Instr. addr. reg. for CU (4 bytes)
set142arch/m68k/fpsp040/fpsp.h.set  CMDREG2B,LV-52    | cmd reg for machine 2
set143arch/m68k/fpsp040/fpsp.h.set  CMDREG3B,LV-48    | cmd reg for E3 exceptions (2 bytes)
set145arch/m68k/fpsp040/fpsp.h.set  NMNEXC,LV-44    | NMNEXC (unsup,snan bits only)
set146arch/m68k/fpsp040/fpsp.h.set  nmn_unsup_bit,1  | 
set147arch/m68k/fpsp040/fpsp.h.set  nmn_snan_bit,0  | 
set149arch/m68k/fpsp040/fpsp.h.set  NMCEXC,LV-43    | NMNEXC & NMCEXC
set150arch/m68k/fpsp040/fpsp.h.set  nmn_operr_bit,7
set151arch/m68k/fpsp040/fpsp.h.set  nmn_ovfl_bit,6
set152arch/m68k/fpsp040/fpsp.h.set  nmn_unfl_bit,5
set153arch/m68k/fpsp040/fpsp.h.set  nmc_unsup_bit,4
set154arch/m68k/fpsp040/fpsp.h.set  nmc_snan_bit,3
set155arch/m68k/fpsp040/fpsp.h.set  nmc_operr_bit,2
set156arch/m68k/fpsp040/fpsp.h.set  nmc_ovfl_bit,1
set157arch/m68k/fpsp040/fpsp.h.set  nmc_unfl_bit,0
set159arch/m68k/fpsp040/fpsp.h.set  STAG,LV-40    | source tag (1 byte)
set160arch/m68k/fpsp040/fpsp.h.set  WBTEMP_GRS,LV-40    | alias wbtemp guard, round, sticky
set161arch/m68k/fpsp040/fpsp.h.set  guard_bit,1    | guard bit is bit number 1
set162arch/m68k/fpsp040/fpsp.h.set  round_bit,0    | round bit is bit number 0
set163arch/m68k/fpsp040/fpsp.h.set  stag_mask,0xE0    | upper 3 bits are source tag type
set164arch/m68k/fpsp040/fpsp.h.set  denorm_bit,7    | bit determins if denorm or unnorm
set165arch/m68k/fpsp040/fpsp.h.set  etemp15_bit,4    | etemp exponent bit #15
set166arch/m68k/fpsp040/fpsp.h.set  wbtemp66_bit,2    | wbtemp mantissa bit #66
set167arch/m68k/fpsp040/fpsp.h.set  wbtemp1_bit,1    | wbtemp mantissa bit #1
set168arch/m68k/fpsp040/fpsp.h.set  wbtemp0_bit,0    | wbtemp mantissa bit #0
set170arch/m68k/fpsp040/fpsp.h.set  STICKY,LV-39    | holds sticky bit
set171arch/m68k/fpsp040/fpsp.h.set  sticky_bit,7
set173arch/m68k/fpsp040/fpsp.h.set  CMDREG1B,LV-36    | cmd reg for E1 exceptions (2 bytes)
set174arch/m68k/fpsp040/fpsp.h.set  kfact_bit,12    | distinguishes static/dynamic k-factor
set179arch/m68k/fpsp040/fpsp.h.set  CMDWORD,LV-35    | command word in cmd1b
set180arch/m68k/fpsp040/fpsp.h.set  direction_bit,5    | bit 0 in opclass
set181arch/m68k/fpsp040/fpsp.h.set  size_bit2,12    | bit 2 in size field
set183arch/m68k/fpsp040/fpsp.h.set  DTAG,LV-32    | dest tag (1 byte)
set184arch/m68k/fpsp040/fpsp.h.set  dtag_mask,0xE0    | upper 3 bits are dest type tag
set185arch/m68k/fpsp040/fpsp.h.set  fptemp15_bit,4    | fptemp exponent bit #15
set187arch/m68k/fpsp040/fpsp.h.set  WB_BYTE,LV-31    | holds WBTE15 bit (1 byte)
set188arch/m68k/fpsp040/fpsp.h.set  wbtemp15_bit,4    | wbtemp exponent bit #15
set190arch/m68k/fpsp040/fpsp.h.set  E_BYTE,LV-28    | holds E1 and E3 bits (1 byte)
set191arch/m68k/fpsp040/fpsp.h.set  E1,2    | which bit is E1 flag
set192arch/m68k/fpsp040/fpsp.h.set  E3,1    | which bit is E3 flag
set193arch/m68k/fpsp040/fpsp.h.set  SFLAG,0    | which bit is S flag
set195arch/m68k/fpsp040/fpsp.h.set  T_BYTE,LV-27    | holds T and U bits (1 byte)
set196arch/m68k/fpsp040/fpsp.h.set  XFLAG,7    | which bit is X flag
set197arch/m68k/fpsp040/fpsp.h.set  UFLAG,5    | which bit is U flag
set198arch/m68k/fpsp040/fpsp.h.set  TFLAG,4    | which bit is T flag
set200arch/m68k/fpsp040/fpsp.h.set  FPTEMP,LV-24    | fptemp (12 bytes)
set201arch/m68k/fpsp040/fpsp.h.set  FPTEMP_EX,FPTEMP    | fptemp sign and exponent (2 bytes)
set202arch/m68k/fpsp040/fpsp.h.set  FPTEMP_HI,FPTEMP+4  | fptemp mantissa [63:32] (4 bytes)
set203arch/m68k/fpsp040/fpsp.h.set  FPTEMP_LO,FPTEMP+8  | fptemp mantissa [31:00] (4 bytes)
set205arch/m68k/fpsp040/fpsp.h.set  FPTEMP_SGN,FPTEMP+2  | used to store sign
set207arch/m68k/fpsp040/fpsp.h.set  ETEMP,LV-12    | etemp (12 bytes)
set208arch/m68k/fpsp040/fpsp.h.set  ETEMP_EX,ETEMP    | etemp sign and exponent (2 bytes)
set209arch/m68k/fpsp040/fpsp.h.set  ETEMP_HI,ETEMP+4    | etemp mantissa [63:32] (4 bytes)
set210arch/m68k/fpsp040/fpsp.h.set  ETEMP_LO,ETEMP+8    | etemp mantissa [31:00] (4 bytes)
set212arch/m68k/fpsp040/fpsp.h.set  ETEMP_SGN,ETEMP+2    | used to store sign
set214arch/m68k/fpsp040/fpsp.h.set  EXC_SR,4    | exception frame status register
set215arch/m68k/fpsp040/fpsp.h.set  EXC_PC,6    | exception frame program counter
set216arch/m68k/fpsp040/fpsp.h.set  EXC_VEC,10    | exception frame vector (format+vector#)
set217arch/m68k/fpsp040/fpsp.h.set  EXC_EA,12    | exception frame effective address
set223arch/m68k/fpsp040/fpsp.h.set  neg_bit,3  |  negative result
set224arch/m68k/fpsp040/fpsp.h.set  z_bit,2  |  zero result
set225arch/m68k/fpsp040/fpsp.h.set  inf_bit,1  |  infinity result
set226arch/m68k/fpsp040/fpsp.h.set  nan_bit,0  |  not-a-number result
set228arch/m68k/fpsp040/fpsp.h.set  q_sn_bit,7  |  sign bit of quotient byte
set230arch/m68k/fpsp040/fpsp.h.set  bsun_bit,7  |  branch on unordered
set231arch/m68k/fpsp040/fpsp.h.set  snan_bit,6  |  signalling nan
set232arch/m68k/fpsp040/fpsp.h.set  operr_bit,5  |  operand error
set233arch/m68k/fpsp040/fpsp.h.set  ovfl_bit,4  |  overflow
set234arch/m68k/fpsp040/fpsp.h.set  unfl_bit,3  |  underflow
set235arch/m68k/fpsp040/fpsp.h.set  dz_bit,2  |  divide by zero
set236arch/m68k/fpsp040/fpsp.h.set  inex2_bit,1  |  inexact result 2
set237arch/m68k/fpsp040/fpsp.h.set  inex1_bit,0  |  inexact result 1
set239arch/m68k/fpsp040/fpsp.h.set  aiop_bit,7  |  accrued illegal operation
set240arch/m68k/fpsp040/fpsp.h.set  aovfl_bit,6  |  accrued overflow
set241arch/m68k/fpsp040/fpsp.h.set  aunfl_bit,5  |  accrued underflow
set242arch/m68k/fpsp040/fpsp.h.set  adz_bit,4  |  accrued divide by zero
set243arch/m68k/fpsp040/fpsp.h.set  ainex_bit,3  |  accrued inexact
set247arch/m68k/fpsp040/fpsp.h.set  neg_mask,0x08000000
set248arch/m68k/fpsp040/fpsp.h.set  z_mask,0x04000000
set249arch/m68k/fpsp040/fpsp.h.set  inf_mask,0x02000000
set250arch/m68k/fpsp040/fpsp.h.set  nan_mask,0x01000000
set252arch/m68k/fpsp040/fpsp.h.set  bsun_mask,0x00008000  | 
set253arch/m68k/fpsp040/fpsp.h.set  snan_mask,0x00004000
set254arch/m68k/fpsp040/fpsp.h.set  operr_mask,0x00002000
set255arch/m68k/fpsp040/fpsp.h.set  ovfl_mask,0x00001000
set256arch/m68k/fpsp040/fpsp.h.set  unfl_mask,0x00000800
set257arch/m68k/fpsp040/fpsp.h.set  dz_mask,0x00000400
set258arch/m68k/fpsp040/fpsp.h.set  inex2_mask,0x00000200
set259arch/m68k/fpsp040/fpsp.h.set  inex1_mask,0x00000100
set261arch/m68k/fpsp040/fpsp.h.set  aiop_mask,0x00000080  |  accrued illegal operation
set262arch/m68k/fpsp040/fpsp.h.set  aovfl_mask,0x00000040  |  accrued overflow
set263arch/m68k/fpsp040/fpsp.h.set  aunfl_mask,0x00000020  |  accrued underflow
set264arch/m68k/fpsp040/fpsp.h.set  adz_mask,0x00000010  |  accrued divide by zero
set265arch/m68k/fpsp040/fpsp.h.set  ainex_mask,0x00000008  |  accrued inexact
set269arch/m68k/fpsp040/fpsp.h.set  dzinf_mask,inf_mask+dz_mask+adz_mask
set270arch/m68k/fpsp040/fpsp.h.set  opnan_mask,nan_mask+operr_mask+aiop_mask
set271arch/m68k/fpsp040/fpsp.h.set  nzi_mask,0x01ffffff   |  clears N, Z, and I
set272arch/m68k/fpsp040/fpsp.h.set  unfinx_mask,unfl_mask+inex2_mask+aunfl_mask+ainex_mask
set273arch/m68k/fpsp040/fpsp.h.set  unf2inx_mask,unfl_mask+inex2_mask+ainex_mask
set274arch/m68k/fpsp040/fpsp.h.set  ovfinx_mask,ovfl_mask+inex2_mask+aovfl_mask+ainex_mask
set275arch/m68k/fpsp040/fpsp.h.set  inx1a_mask,inex1_mask+ainex_mask
set276arch/m68k/fpsp040/fpsp.h.set  inx2a_mask,inex2_mask+ainex_mask
set277arch/m68k/fpsp040/fpsp.h.set  snaniop_mask,nan_mask+snan_mask+aiop_mask
set278arch/m68k/fpsp040/fpsp.h.set  naniop_mask,nan_mask+aiop_mask
set279arch/m68k/fpsp040/fpsp.h.set  neginf_mask,neg_mask+inf_mask
set280arch/m68k/fpsp040/fpsp.h.set  infaiop_mask,inf_mask+aiop_mask
set281arch/m68k/fpsp040/fpsp.h.set  negz_mask,neg_mask+z_mask
set282arch/m68k/fpsp040/fpsp.h.set  opaop_mask,operr_mask+aiop_mask
set283arch/m68k/fpsp040/fpsp.h.set  unfl_inx_mask,unfl_mask+aunfl_mask+ainex_mask
set284arch/m68k/fpsp040/fpsp.h.set  ovfl_inx_mask,ovfl_mask+aovfl_mask+ainex_mask
set290arch/m68k/fpsp040/fpsp.h.set  x_mode,0x00  |  round to extended
set291arch/m68k/fpsp040/fpsp.h.set  s_mode,0x40  |  round to single
set292arch/m68k/fpsp040/fpsp.h.set  d_mode,0x80  |  round to double
set294arch/m68k/fpsp040/fpsp.h.set  rn_mode,0x00  |  round nearest
set295arch/m68k/fpsp040/fpsp.h.set  rz_mode,0x10  |  round to zero
set296arch/m68k/fpsp040/fpsp.h.set  rm_mode,0x20  |  round to minus infinity
set297arch/m68k/fpsp040/fpsp.h.set  rp_mode,0x30  |  round to plus infinity
set303arch/m68k/fpsp040/fpsp.h.set  signan_bit,6  |  signalling nan bit in mantissa
set304arch/m68k/fpsp040/fpsp.h.set  sign_bit,7
set306arch/m68k/fpsp040/fpsp.h.set  rnd_stky_bit,29  |  round/sticky bit of mantissa
set308arch/m68k/fpsp040/fpsp.h.set  sx_mask,0x01800000 |  set s and x bits in word $48
set310arch/m68k/fpsp040/fpsp.h.set  LOCAL_EX,0
set311arch/m68k/fpsp040/fpsp.h.set  LOCAL_SGN,2
set312arch/m68k/fpsp040/fpsp.h.set  LOCAL_HI,4
set313arch/m68k/fpsp040/fpsp.h.set  LOCAL_LO,8
set314arch/m68k/fpsp040/fpsp.h.set  LOCAL_GRS,12  |  valid ONLY for FP_SCR1, FP_SCR2
set317arch/m68k/fpsp040/fpsp.h.set  norm_tag,0x00  |  tag bits in {7:5} position
set318arch/m68k/fpsp040/fpsp.h.set  zero_tag,0x20
set319arch/m68k/fpsp040/fpsp.h.set  inf_tag,0x40
set320arch/m68k/fpsp040/fpsp.h.set  nan_tag,0x60
set321arch/m68k/fpsp040/fpsp.h.set  dnrm_tag,0x80
set325arch/m68k/fpsp040/fpsp.h.set  VER_4,0x40    |  fpsp compatible version numbers
set327arch/m68k/fpsp040/fpsp.h.set  VER_40,0x40    |  original version number
set328arch/m68k/fpsp040/fpsp.h.set  VER_41,0x41    |  revision version number
set330arch/m68k/fpsp040/fpsp.h.set  BUSY_SIZE,100    |  size of busy frame
set331arch/m68k/fpsp040/fpsp.h.set  BUSY_FRAME,LV-BUSY_SIZE  |  start of busy frame
set333arch/m68k/fpsp040/fpsp.h.set  UNIMP_40_SIZE,44    |  size of orig unimp frame
set334arch/m68k/fpsp040/fpsp.h.set  UNIMP_41_SIZE,52    |  size of rev unimp frame
set336arch/m68k/fpsp040/fpsp.h.set  IDLE_SIZE,4    |  size of idle frame
set337arch/m68k/fpsp040/fpsp.h.set  IDLE_FRAME,LV-IDLE_SIZE  |  start of idle frame
set341arch/m68k/fpsp040/fpsp.h.set  TRACE_VEC,0x2024    |  trace trap
set342arch/m68k/fpsp040/fpsp.h.set  FLINE_VEC,0x002C    |  real F-line
set343arch/m68k/fpsp040/fpsp.h.set  UNIMP_VEC,0x202C    |  unimplemented
set344arch/m68k/fpsp040/fpsp.h.set  INEX_VEC,0x00C4
set346arch/m68k/fpsp040/fpsp.h.set  dbl_thresh,0x3C01
set347arch/m68k/fpsp040/fpsp.h.set  sgl_thresh,0x3F81
set2424arch/m68k/kernel/console.cstatic int set_get_font(char * arg, int set)
set2442arch/m68k/kernel/console.ci = verify_area(set ? VERIFY_READ : VERIFY_WRITE, (void *)arg, cmapsz);
set2464arch/m68k/kernel/console.cif (set)
set29arch/mips/kernel/signal.casmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, unsigned long set)
set35arch/mips/kernel/signal.ccurrent->blocked = set & _BLOCKABLE;
set26arch/ppc/kernel/signal.casmlinkage int sys_sigsuspend(unsigned long set, int p2, int p3, int p4, int p6, int p7, struct pt_regs *regs)
set31arch/ppc/kernel/signal.ccurrent->blocked = set & _BLOCKABLE;
set34arch/ppc/kernel/signal.cprintk("Task: %x[%d] - SIGSUSPEND at %x, Mask: %x\n", current, current->pid, regs->nip, set);  
set31arch/sparc/kernel/signal.casmlinkage inline void _sigpause_common(unsigned int set, struct pt_regs *regs)
set36arch/sparc/kernel/signal.ccurrent->blocked = set & _BLOCKABLE;
set56arch/sparc/kernel/signal.casmlinkage void do_sigpause(unsigned int set, struct pt_regs *regs)
set58arch/sparc/kernel/signal.c_sigpause_common(set, regs);
set64arch/sparc/kernel/signal.cunsigned long set;
set66arch/sparc/kernel/signal.cset = regs->u_regs [UREG_I0];
set68arch/sparc/kernel/signal.ccurrent->blocked = set & _BLOCKABLE;
set103arch/sparc/kernel/sun4m_irq.csun4m_interrupts->set = mask;
set105arch/sparc/kernel/sun4m_irq.csun4m_interrupts->cpu_intregs[cpu].set = mask;
set138arch/sparc/kernel/sun4m_irq.csun4m_interrupts->cpu_intregs[cpu].set = mask;
set259arch/sparc/kernel/sun4m_irq.csun4m_interrupts->set = SUN4M_INT_E14;
set304arch/sparc/kernel/sun4m_irq.csun4m_interrupts->set = ~SUN4M_INT_MASKALL;
set903arch/sparc/mm/srmmu.cint set, block;
set911arch/sparc/mm/srmmu.cfor (set = 0; set < 128; set++) {
set914arch/sparc/mm/srmmu.cviking_get_dcache_ptag(set, block, ptag);
set929arch/sparc/mm/srmmu.cvaddr = (KERNBASE + PAGE_SIZE) | (set << 5);
set365drivers/char/suncons.cset_get_font(char * arg, int set, int ch512)
set371drivers/char/suncons.cerror = verify_area (set ? VERIFY_READ : VERIFY_WRITE, (void *) arg,
set377drivers/char/suncons.cif (!set){
set410drivers/char/suncons.cset_get_cmap(unsigned char * arg, int set)
set414drivers/char/suncons.ci = verify_area(set ? VERIFY_READ : VERIFY_WRITE, (void *)arg, 16*3);
set419drivers/char/suncons.cif (set) {
set429drivers/char/suncons.cif (set) {
set661drivers/char/suncons.ccursor.set    = FB_CUR_SETCUR;
set940drivers/char/suncons.cint op = cursor->set;
set356drivers/char/tga.cset_get_font(char * arg, int set, int ch512)
set385drivers/char/tga.cset_get_cmap(unsigned char * arg, int set) {
set388drivers/char/tga.ci = verify_area(set ? VERIFY_READ : VERIFY_WRITE, (void *)arg, 16*3);
set393drivers/char/tga.cif (set) {
set403drivers/char/tga.cif (set) {
set308drivers/char/vga.cset_get_font(char * arg, int set, int ch512)
set334drivers/char/vga.ci = verify_area(set ? VERIFY_READ : VERIFY_WRITE, (void *)arg,
set358drivers/char/vga.cif (set)
set388drivers/char/vga.cif (set)
set405drivers/char/vga.cif (set)
set421drivers/char/vga.cif (set)
set435drivers/char/vga.cif (set)      /* attribute controller */
set533drivers/char/vga.cset_get_cmap(unsigned char * arg, int set) {
set542drivers/char/vga.ci = verify_area(set ? VERIFY_READ : VERIFY_WRITE, (void *)arg, 16*3);
set547drivers/char/vga.cif (set) {
set557drivers/char/vga.cif (set) {
set277drivers/net/i82586.hwe must also set the AC_CFG_ALOC(..) flag during the
set390drivers/net/i82586.hhave set AC_CFG_ALOC(..).  However, just
set91fs/select.cunsigned long set;
set99fs/select.cset = in->fds_bits[j] | out->fds_bits[j] | ex->fds_bits[j];
set100fs/select.cfor ( ; set ; i++,set >>= 1) {
set103fs/select.cif (!(set & 1))
set36include/asm-alpha/posix_types.h#define  __FD_SET(d, set)  ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
set37include/asm-alpha/posix_types.h#define  __FD_CLR(d, set)  ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
set38include/asm-alpha/posix_types.h#define  __FD_ISSET(d, set)  ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
set39include/asm-alpha/posix_types.h#define  __FD_ZERO(set)  \
set40include/asm-alpha/posix_types.h((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set)))
set101include/asm-i386/bitops.hint set = 0, bit = offset & 31, res;
set111include/asm-i386/bitops.h: "=r" (set)
set113include/asm-i386/bitops.hif (set < (32 - bit))
set114include/asm-i386/bitops.hreturn set + offset;
set115include/asm-i386/bitops.hset = 32 - bit;
set122include/asm-i386/bitops.hreturn (offset + set + res);
set85include/asm-m68k/bitops.hint set = 0, bit = offset & 31UL, res;
set98include/asm-m68k/bitops.hset = 32 - bit;
set103include/asm-m68k/bitops.hreturn (offset + set + res);
set31include/asm-m68k/posix_types.h#define  __FD_SET(d, set)  ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
set34include/asm-m68k/posix_types.h#define  __FD_CLR(d, set)  ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
set37include/asm-m68k/posix_types.h#define  __FD_ISSET(d, set)  ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
set196include/asm-mips/asm.h.set  mips3;                          \
set198include/asm-mips/asm.h.set  mips0
set189include/asm-mips/bitops.hint set = 0, bit = offset & 31, res;
set204include/asm-mips/bitops.h: "=r" (set)
set209include/asm-mips/bitops.hif (set < (32 - bit))
set210include/asm-mips/bitops.hreturn set + offset;
set211include/asm-mips/bitops.hset = 32 - bit;
set218include/asm-mips/bitops.hreturn (offset + set + res);
set138include/asm-mips/stackframe.h.set  mips3;                          \
set181include/asm-mips/stackframe.h.set  mips0
set18include/asm-sparc/asmmacro.hset  C_LABEL(mid_xlate), %tmp; \
set44include/asm-sparc/asmmacro.hset  C_LABEL(trap_log), %l5; \
set47include/asm-sparc/asmmacro.hset  C_LABEL(trap_log_ent), %l6; \
set55include/asm-sparc/asmmacro.hset  C_LABEL(trap_log_ent), %l5; \
set85include/asm-sparc/asmmacro.hset  C_LABEL(symbol), %tmp1; \
set91include/asm-sparc/asmmacro.hset  C_LABEL(symbol), %tmp1; \
set99include/asm-sparc/asmmacro.hset  C_LABEL(smp_spinning), %l6; \
set103include/asm-sparc/asmmacro.hset  C_LABEL(smp_proc_in_lock), %l5; \
set108include/asm-sparc/asmmacro.hset  C_LABEL(kernel_flag), %l5; \
set113include/asm-sparc/asmmacro.hset  C_LABEL(active_kernel_processor), %l5; \
set121include/asm-sparc/asmmacro.hset  C_LABEL(sun4m_interrupts), %l5; \
set144include/asm-sparc/asmmacro.hset  C_LABEL(kernel_flag), %l5; \
set153include/asm-sparc/asmmacro.hset  C_LABEL(active_kernel_processor), %l5; \
set156include/asm-sparc/asmmacro.hset  C_LABEL(irq_rcvreg), %l5; \
set161include/asm-sparc/asmmacro.hset  C_LABEL(smp_spinning), %l6; \
set175include/asm-sparc/asmmacro.hset  C_LABEL(smp_proc_in_lock), %l5; \
set183include/asm-sparc/asmmacro.hset  C_LABEL(kernel_counter), %l6; \
set189include/asm-sparc/asmmacro.hset  C_LABEL(active_kernel_processor), %l6; \
set192include/asm-sparc/asmmacro.hset  C_LABEL(kernel_flag), %l6; \
set98include/asm-sparc/fbio.hshort set;              /* what to set, choose from the list above */
set53include/asm-sparc/irq.hunsigned int set;    /* Set this cpus irqs here. */
set77include/asm-sparc/irq.hunsigned int set;                /* Set master IRQ's by setting bits here. */
set149include/asm-sparc/viking.hextern inline void viking_get_dcache_ptag(int set, int block,
set152include/asm-sparc/viking.hunsigned long ptag = ((set & 0x7f) << 5) | ((block & 0x3) << 26) |
set29kernel/signal.casmlinkage int sys_sigprocmask(int how, sigset_t *set, sigset_t *oset)
set34kernel/signal.cif (set) {
set35kernel/signal.cerror = verify_area(VERIFY_READ, set, sizeof(sigset_t));
set38kernel/signal.cnew_set = get_user(set) & _BLOCKABLE;
set80kernel/signal.casmlinkage int sys_sigpending(sigset_t *set)
set84kernel/signal.cerror = verify_area(VERIFY_WRITE, set, sizeof(sigset_t));
set86kernel/signal.cput_user(current->blocked & current->signal, set);