tag | line | file | source code |
seq_port_val | 2459 | arch/m68k/kernel/console.c | outb_p( 0x01, seq_port_val ); /* Synchronous reset */ |
seq_port_val | 2461 | arch/m68k/kernel/console.c | outb_p( 0x04, seq_port_val ); /* CPU writes only to map 2 */ |
seq_port_val | 2463 | arch/m68k/kernel/console.c | outb_p( 0x07, seq_port_val ); /* Sequential addressing */ |
seq_port_val | 2465 | arch/m68k/kernel/console.c | outb_p( 0x03, seq_port_val ); /* Clear synchronous reset */ |
seq_port_val | 2482 | arch/m68k/kernel/console.c | outb_p( 0x01, seq_port_val ); /* Synchronous reset */ |
seq_port_val | 2484 | arch/m68k/kernel/console.c | outb_p( 0x03, seq_port_val ); /* CPU writes to maps 0 and 1 */ |
seq_port_val | 2486 | arch/m68k/kernel/console.c | outb_p( 0x03, seq_port_val ); /* odd-even addressing */ |
seq_port_val | 2488 | arch/m68k/kernel/console.c | outb_p( 0x03, seq_port_val ); /* clear synchronous reset */ |
seq_port_val | 182 | drivers/char/vesa_blank.c | vga.ClockingMode = inb_p(seq_port_val); |
seq_port_val | 189 | drivers/char/vesa_blank.c | outb_p(vga.ClockingMode | 0x20,seq_port_val); |
seq_port_val | 257 | drivers/char/vesa_blank.c | outb_p(vga.ClockingMode,seq_port_val); |
seq_port_val | 375 | drivers/char/vga.c | outb_p( 0x01, seq_port_val ); /* Synchronous reset */ |
seq_port_val | 377 | drivers/char/vga.c | outb_p( 0x04, seq_port_val ); /* CPU writes only to map 2 */ |
seq_port_val | 379 | drivers/char/vga.c | outb_p( 0x07, seq_port_val ); /* Sequential addressing */ |
seq_port_val | 381 | drivers/char/vga.c | outb_p( 0x03, seq_port_val ); /* Clear synchronous reset */ |
seq_port_val | 421 | drivers/char/vga.c | outb_p( 0x01, seq_port_val ); /* Synchronous reset */ |
seq_port_val | 423 | drivers/char/vga.c | outb_p( 0x03, seq_port_val ); /* CPU writes to maps 0 and 1 */ |
seq_port_val | 425 | drivers/char/vga.c | outb_p( 0x03, seq_port_val ); /* odd-even addressing */ |
seq_port_val | 429 | drivers/char/vga.c | outb_p( font_select, seq_port_val ); |
seq_port_val | 432 | drivers/char/vga.c | outb_p( 0x03, seq_port_val ); /* clear synchronous reset */ |