tag	line	file	source code
phy	505	drivers/net/de4x5.c	struct mii_phy phy[DE4X5_MAX_PHY];      /* List of attached PHY devices */
phy	1003	drivers/net/de4x5.c	if (lp->phy[lp->active].id == 0) {
phy	2243	drivers/net/de4x5.c	mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII);
phy	2261	drivers/net/de4x5.c	mii_wr(MII_CR_ASSE | MII_CR_RAN, MII_CR, lp->phy[lp->active].addr, DE4X5_MII);
phy	2285	drivers/net/de4x5.c	anlpa = mii_rd(MII_ANLPA, lp->phy[lp->active].addr, DE4X5_MII);
phy	2286	drivers/net/de4x5.c	ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII);
phy	2307	drivers/net/de4x5.c	lp->tmp = (lp->phy[lp->active].id ? MII_SR_LKS :
phy	2397	drivers/net/de4x5.c	if (lp->phy[lp->active].id) {
phy	2403	drivers/net/de4x5.c	mii_wr(MII_CR_RST, MII_CR, lp->phy[lp->active].addr, DE4X5_MII);
phy	2480	drivers/net/de4x5.c	if (lp->phy[lp->active].id) {
phy	2509	drivers/net/de4x5.c	reg = mii_rd((u_char)reg, lp->phy[lp->active].addr, DE4X5_MII) & mask;
phy	2528	drivers/net/de4x5.c	if (lp->phy[lp->active].id) {
phy	2529	drivers/net/de4x5.c	spd = mii_rd(lp->phy[lp->active].spd.reg, lp->phy[lp->active].addr, DE4X5_MII);
phy	2530	drivers/net/de4x5.c	spd = ~(spd ^ lp->phy[lp->active].spd.value);
phy	2531	drivers/net/de4x5.c	spd &= lp->phy[lp->active].spd.mask;
phy	2545	drivers/net/de4x5.c	if (lp->phy[lp->active].id) {
phy	2547	drivers/net/de4x5.c	mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);
phy	2548	drivers/net/de4x5.c	return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII) & MII_SR_LKS);
phy	2560	drivers/net/de4x5.c	if (lp->phy[lp->active].id) {
phy	2562	drivers/net/de4x5.c	mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);
phy	2563	drivers/net/de4x5.c	return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII) & MII_SR_LKS);
phy	2575	drivers/net/de4x5.c	if (lp->phy[lp->active].id) {
phy	2576	drivers/net/de4x5.c	return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII));
phy	2783	drivers/net/de4x5.c	if (!lp->phy[lp->active].id && !de4x5_full_duplex) {
phy	3444	drivers/net/de4x5.c	for (k=0; lp->phy[k].id && (k < DE4X5_MAX_PHY); k++);
phy	3446	drivers/net/de4x5.c	memcpy((char *)&lp->phy[k],
phy	3448	drivers/net/de4x5.c	lp->phy[k].addr = i;
phy	3456	drivers/net/de4x5.c	if (lp->phy[lp->active].id) {                  /* Reset the PHY devices */
phy	3457	drivers/net/de4x5.c	for (k=0; lp->phy[k].id && (k < DE4X5_MAX_PHY); k++) { /*For each PHY*/
phy	3458	drivers/net/de4x5.c	mii_wr(MII_CR_RST, MII_CR, lp->phy[k].addr, DE4X5_MII);
phy	3459	drivers/net/de4x5.c	while (mii_rd(MII_CR, lp->phy[k].addr, DE4X5_MII) & MII_CR_RST);
phy	3651	drivers/net/de4x5.c	printk("\nMII CR:  %x\n",mii_rd(MII_CR,lp->phy[k].addr,DE4X5_MII));
phy	3652	drivers/net/de4x5.c	printk("MII SR:  %x\n",mii_rd(MII_SR,lp->phy[k].addr,DE4X5_MII));
phy	3653	drivers/net/de4x5.c	printk("MII ID0: %x\n",mii_rd(MII_ID0,lp->phy[k].addr,DE4X5_MII));
phy	3654	drivers/net/de4x5.c	printk("MII ID1: %x\n",mii_rd(MII_ID1,lp->phy[k].addr,DE4X5_MII));
phy	3655	drivers/net/de4x5.c	if (lp->phy[k].id != BROADCOM_T4) {
phy	3656	drivers/net/de4x5.c	printk("MII ANA: %x\n",mii_rd(0x04,lp->phy[k].addr,DE4X5_MII));
phy	3657	drivers/net/de4x5.c	printk("MII ANC: %x\n",mii_rd(0x05,lp->phy[k].addr,DE4X5_MII));
phy	3659	drivers/net/de4x5.c	printk("MII 16:  %x\n",mii_rd(0x10,lp->phy[k].addr,DE4X5_MII));
phy	3660	drivers/net/de4x5.c	if (lp->phy[k].id != BROADCOM_T4) {
phy	3661	drivers/net/de4x5.c	printk("MII 17:  %x\n",mii_rd(0x11,lp->phy[k].addr,DE4X5_MII));
phy	3662	drivers/net/de4x5.c	printk("MII 18:  %x\n",mii_rd(0x12,lp->phy[k].addr,DE4X5_MII));
phy	3664	drivers/net/de4x5.c	printk("MII 20:  %x\n",mii_rd(0x14,lp->phy[k].addr,DE4X5_MII));
phy	3999	drivers/net/de4x5.c	tmp.lval[j>>2] = lp->phy[lp->active].id; j+=4;
phy	4000	drivers/net/de4x5.c	if (lp->phy[lp->active].id) {
phy	4002	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_CR,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
phy	4003	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_SR,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
phy	4004	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_ID0,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
phy	4005	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_ID1,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
phy	4006	drivers/net/de4x5.c	if (lp->phy[lp->active].id != BROADCOM_T4) {
phy	4007	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_ANA,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
phy	4008	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_ANLPA,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
phy	4010	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(0x10,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
phy	4011	drivers/net/de4x5.c	if (lp->phy[lp->active].id != BROADCOM_T4) {
phy	4012	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(0x11,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
phy	4013	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(0x12,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
phy	4015	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(0x14,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
phy	742	drivers/net/de4x5.h	if (lp->phy[lp->active].id) {\
phy	745	drivers/net/de4x5.h	mii_wr(MII_CR_10|(de4x5_full_duplex?MII_CR_FDM:0), MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
phy	759	drivers/net/de4x5.h	if (lp->phy[lp->active].id) {\
phy	761	drivers/net/de4x5.h	if (lp->phy[lp->active].id == NATIONAL_TX) {\
phy	762	drivers/net/de4x5.h	mii_wr(mii_rd(0x18, lp->phy[lp->active].addr, DE4X5_MII) & ~0x2000,\
phy	763	drivers/net/de4x5.h	0x18, lp->phy[lp->active].addr, DE4X5_MII);\
phy	766	drivers/net/de4x5.h	sr = mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);\
phy	769	drivers/net/de4x5.h	mii_wr(MII_CR_100|(fdx?MII_CR_FDM:0), MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
phy	783	drivers/net/de4x5.h	if (lp->phy[lp->active].id) {\
phy	784	drivers/net/de4x5.h	mii_wr(MII_CR_100|MII_CR_ASSE, MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\