root/include/linux/fdreg.h

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INCLUDED FROM


   1 /*
   2  * This file contains some defines for the floppy disk controller.
   3  * Various sources. Mostly "IBM Microcomputers: A Programmers
   4  * Handbook", Sanches and Canton.
   5  */
   6 #ifndef _FDREG_H
   7 #define _FDREG_H
   8 
   9 extern int ticks_to_floppy_on(unsigned int nr);
  10 extern void floppy_on(unsigned int nr);
  11 extern void floppy_off(unsigned int nr);
  12 extern void floppy_select(unsigned int nr);
  13 extern void floppy_deselect(unsigned int nr);
  14 
  15 /* Fd controller regs. S&C, about page 340 */
  16 #define FD_STATUS       0x3f4
  17 #define FD_DATA         0x3f5
  18 #define FD_DOR          0x3f2           /* Digital Output Register */
  19 #define FD_DIR          0x3f7           /* Digital Input Register (read) */
  20 #define FD_DCR          0x3f7           /* Diskette Control Register (write)*/
  21 
  22 /* Bits of main status register */
  23 #define STATUS_BUSYMASK 0x0F            /* drive busy mask */
  24 #define STATUS_BUSY     0x10            /* FDC busy */
  25 #define STATUS_DMA      0x20            /* 0- DMA mode */
  26 #define STATUS_DIR      0x40            /* 0- cpu->fdc */
  27 #define STATUS_READY    0x80            /* Data reg ready */
  28 
  29 /* Bits of FD_ST0 */
  30 #define ST0_DS          0x03            /* drive select mask */
  31 #define ST0_HA          0x04            /* Head (Address) */
  32 #define ST0_NR          0x08            /* Not Ready */
  33 #define ST0_ECE         0x10            /* Equipment chech error */
  34 #define ST0_SE          0x20            /* Seek end */
  35 #define ST0_INTR        0xC0            /* Interrupt code mask */
  36 
  37 /* Bits of FD_ST1 */
  38 #define ST1_MAM         0x01            /* Missing Address Mark */
  39 #define ST1_WP          0x02            /* Write Protect */
  40 #define ST1_ND          0x04            /* No Data - unreadable */
  41 #define ST1_OR          0x10            /* OverRun */
  42 #define ST1_CRC         0x20            /* CRC error in data or addr */
  43 #define ST1_EOC         0x80            /* End Of Cylinder */
  44 
  45 /* Bits of FD_ST2 */
  46 #define ST2_MAM         0x01            /* Missing Addess Mark (again) */
  47 #define ST2_BC          0x02            /* Bad Cylinder */
  48 #define ST2_SNS         0x04            /* Scan Not Satisfied */
  49 #define ST2_SEH         0x08            /* Scan Equal Hit */
  50 #define ST2_WC          0x10            /* Wrong Cylinder */
  51 #define ST2_CRC         0x20            /* CRC error in data field */
  52 #define ST2_CM          0x40            /* Control Mark = deleted */
  53 
  54 /* Bits of FD_ST3 */
  55 #define ST3_HA          0x04            /* Head (Address) */
  56 #define ST3_TZ          0x10            /* Track Zero signal (1=track 0) */
  57 #define ST3_WP          0x40            /* Write Protect */
  58 
  59 /* Values for FD_COMMAND */
  60 #define FD_RECALIBRATE  0x07            /* move to track 0 */
  61 #define FD_SEEK         0x0F            /* seek track */
  62 #define FD_READ         0xE6            /* read with MT, MFM, SKip deleted */
  63 #define FD_WRITE        0xC5            /* write with MT, MFM */
  64 #define FD_SENSEI       0x08            /* Sense Interrupt Status */
  65 #define FD_SPECIFY      0x03            /* specify HUT etc */
  66 
  67 /* DMA commands */
  68 #define DMA_READ        0x46
  69 #define DMA_WRITE       0x4A
  70 
  71 #endif

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