root/net/drv/we8003/dp8390.h

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INCLUDED FROM


   1 /*
   2  * INET         An implementation of the TCP/IP protocol suite for the LINUX
   3  *              operating system.  INET is implemented using the  BSD Socket
   4  *              interface as the means of communication with the user level.
   5  *
   6  *              Definitions for the DP8390 Network Interface Controller.
   7  *
   8  * Version:     $Id: dp8390.h,v 0.8.4.1 1992/11/10 00:17:18 waltje Exp $
   9  *
  10  * Authors:     Original taken from the 386BSD operating system.
  11  *              Ross Biro, <bir7@leland.Stanford.Edu>
  12  *              Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
  13  *
  14  *              This program is free software; you can redistribute it and/or
  15  *              modify it under the terms of the GNU General Public License
  16  *              as published by the Free Software Foundation; either version
  17  *              2 of the License, or (at your option) any later version.
  18  */
  19 
  20 /* format of status 
  21      bit
  22      0          packet ok
  23      1          crc error
  24      2          frame alignment error
  25      3          fifo overrun
  26 */
  27 #define STRECVD 0xf1
  28 struct wd_ring {
  29   unsigned char status;         /* status                               */
  30   unsigned char next;           /* pointer to next packet               */
  31   unsigned short count;         /* packet length in bytes + 4           */
  32 };
  33 
  34 /* interrupt status defenitions
  35    bits
  36      0          Recv.
  37      1          Transmit
  38      2          RcvErr
  39      3          Transmit  Err
  40      4          Overwrite warning
  41      5          Counter overflow
  42      6          Remote DMA complete
  43      7          Reset Status
  44 */
  45 #define IRCV            0x1
  46 #define ITRS            0x2
  47 #define IRCE            0x4
  48 #define ITRE            0x8
  49 #define IOVER           0x10
  50 #define ICOUNTERS       0x20
  51 #define IDMA            0x40
  52 #define IRESET          0x80
  53 #define IOVER           0x10
  54 #define ICOUNTERS       0x20
  55 #define IDMA            0x40
  56 #define IRESET          0x80
  57 
  58 /* transmit status format
  59    bits
  60     0           Packet transmitted ok.
  61     1           Non Deferred transmition
  62     2           Transmit collied
  63     3           Transmit aborted
  64     4           Carrier Sense Lost
  65     5           Fifo Underrun
  66     6           CD Heartbeat
  67     7           Out of Window Collision
  68 */
  69 #define TROK            0x1
  70 #define TRAB            0x4
  71 
  72 /* Page 0 */
  73 #define CR      (WD_BASE+WD_NIC+0)      /* RW - Command                 */
  74 #define CLDA0   (WD_BASE+WD_NIC+1)      /* R - CurrentLocalDMA Addr 0   */
  75 #define PSTART  (WD_BASE+WD_NIC+1)      /* W - Page Start Register      */
  76 #define CLDA1   (WD_BASE+WD_NIC+2)      /* R - Current Local DMA Addr 1 */
  77 #define PSTOP   (WD_BASE+WD_NIC+2)      /* W - Page Stop Register       */
  78 #define BNRY    (WD_BASE+WD_NIC+3)      /* RW - Boundry Pointer         */
  79 #define TSR     (WD_BASE+WD_NIC+4)      /* R - Transmit Status Register */
  80 #define TPSR    (WD_BASE+WD_NIC+4)      /* W - Transmit Page Start      */
  81 #define NCR     (WD_BASE+WD_NIC+5)      /* R - Number of Collisions     */
  82 #define TBCR0   (WD_BASE+WD_NIC+5)      /* W - Transmit Byte Count 0    */
  83 #define FIFO    (WD_BASE+WD_NIC+6)      /* R - FIFO                     */
  84 #define TBCR1   (WD_BASE+WD_NIC+6)      /* W - Transmit Byte Count 1    */
  85 #define ISR     (WD_BASE+WD_NIC+7)      /* RW - Interrupt Status Reg    */
  86 #define CRDA0   (WD_BASE+WD_NIC+8)      /* R - Current Remote DMA Add 0 */
  87 #define RSAR0   (WD_BASE+WD_NIC+8)      /* W - Remote Start Address 0   */
  88 #define CRDA1   (WD_BASE+WD_NIC+9)      /* R - CurrentRemote DMA Addr 1 */
  89                 /* R - Reserved */
  90 #define RBCR0   (WD_BASE+WD_NIC+0x0a)   /* W - Remote Byte Count 0      */
  91                 /* R - Reserved */
  92 #define RBCR1   (WD_BASE+WD_NIC+0x0b)   /* W - Remote Byte Count 1      */
  93 #define RSR     (WD_BASE+WD_NIC+0x0c)   /* R - Receive Status Register  */
  94 #define RCR     (WD_BASE+WD_NIC+0x0c)   /* W - Receive Configuration    */
  95 #define CNTR0   (WD_BASE+WD_NIC+0x0d)   /* R - Frame Alignment Errors 0 */
  96 #define TCR     (WD_BASE+WD_NIC+0x0d)   /* W - Transmit Configuration   */
  97 #define CNTR1   (WD_BASE+WD_NIC+0x0e)   /* R - Frame Alignment Errors 1 */ 
  98 #define DCR     (WD_BASE+WD_NIC+0x0e)   /* W - Data Configuration       */
  99 #define CNTR2   (WD_BASE+WD_NIC+0x0f)   /* R - Missed Packet Errors     */
 100 #define IMR     (WD_BASE+WD_NIC+0x0f)   /* W - Interrupt Mask Register  */
 101 
 102 /* Page 1 */
 103                 /* RW - Command */
 104 #define PAR0    (WD_BASE+WD_NIC+0x01)   /* RW - Physical Address 0      */
 105 #define PAR1    (WD_BASE+WD_NIC+0x02)   /* RW - Physical Address 1      */
 106 #define PAR2    (WD_BASE+WD_NIC+0x03)   /* RW - Physical Address 2      */
 107 #define PAR3    (WD_BASE+WD_NIC+0x04)   /* RW - Physical Address 3      */
 108 #define PAR4    (WD_BASE+WD_NIC+0x04)   /* RW - Physical Address 4      */
 109 #define PAR5    (WD_BASE+WD_NIC+0x05)   /* RW - Physical Address 5      */
 110 #define PAR6    (WD_BASE+WD_NIC+0x06)   /* RW - Physical Address 6      */
 111 #define CURR    (WD_BASE+WD_NIC+0x07)   /* RW - Current Page            */
 112 #define MAR0    (WD_BASE+WD_NIC+0x08)   /* RW - Multicast Address 0     */
 113 #define MAR1    (WD_BASE+WD_NIC+0x09)   /* RW - Multicast Address 1     */
 114 #define MAR2    (WD_BASE+WD_NIC+0x0a)   /* RW - Multicast Address 2     */
 115 #define MAR3    (WD_BASE+WD_NIC+0x0b)   /* RW - Multicast Address 3     */
 116 #define MAR4    (WD_BASE+WD_NIC+0x0c)   /* RW - Multicast Address 4     */
 117 #define MAR5    (WD_BASE+WD_NIC+0x0d)   /* RW - Multicast Address 5     */
 118 #define MAR6    (WD_BASE+WD_NIC+0x0e)   /* RW - Multicast Address 6     */
 119 #define MAR7    (WD_BASE+WD_NIC+0x0f)   /* RW - Multicast Address 7     */
 120 
 121 /* Page 2 */
 122 /* Page 2 Registers are RW opposite Page 0 */
 123 /* and should be used for diagnostic purposes only */
 124 
 125 /* Command Register bits */
 126 #define STOP    1               /* In progress jobs finished, reset     */
 127 #define STA     2               /* Activate the NIC                     */
 128 #define TXP     4               /* Initiate TX packet                   */
 129 #define RD0     8               /* Remote DMA commands                  */
 130 #define RD1     0x10    
 131 #define RD2     0x20
 132 #define PS0     0x40            /* Page Select                          */
 133 #define PS1     0x80            /* 00 = 0, 01 = 1, 10 = 2, 11=reserved  */
 134 
 135 #define PAGE0   ~(PS0|PS1)      /* Remember to AND this                 */
 136 #define PAGE1   PS0             /* these can be OR'd                    */
 137 #define PAGE2   PS1
 138 #define NO_DMA  RD2
 139 
 140 /* Interrupt Status Register bits */
 141 #define PRX     1               /* Packet received with no errors       */
 142 #define PTX     2               /* Packet transmitted with no errors    */
 143 #define RXE     4               /* Packet received with errors          */
 144 #define TXE     8               /* Transmit aborted with errors         */
 145 #define OVW     0x10            /* Overwrite warning                    */
 146 #define CNT     0x20            /* Counter overflow warning             */
 147 #define RDC     0x40            /* Remote DMA complete                  */
 148 #define RST     0x80            /* Reset status - does not cause intr   */
 149 
 150 /* Interrupt Mask Register - 1 = enabled */
 151 #define PRXE    1               /* Packet received                      */
 152 #define PTXE    2               /* Packet transmitted                   */
 153 #define RXEE    4               /* Receive error                        */
 154 #define TXEE    8               /* Transmit error                       */
 155 #define OVWE    0x10            /* Overwrite error                      */
 156 #define CNTE    0x20            /* Counter overflow                     */
 157 #define RDCE    0x40            /* Remote DMA complete                  */
 158 
 159 /* Data Configuration Register */
 160 #define WTS     1               /* Word Transfer 0 = byte, 1 = word     */
 161 #define BOS     2               /* Byte Order 0 = 8086, 1 = 68000       */
 162 #define LAS     4               /* Long Address 0=16bit, 1=32 bit DMA   */
 163 #define LS      8               /* Loopback = 0, 1 = Normal             */
 164 #define AR      0x10            /* Autoinitialize = 1 DMA, 0 = software */
 165 #define FT0     0x20            /* FIFO Threshold (word mode /2 )       */
 166 #define FT1     0x40            /* 00 = 2, 01 = 4, 10 = 8, 11=12 bytes  */
 167 
 168 /* Transmit Configuration Register */
 169 #define CRCI    1               /* CRC inhibit = 1, append = 0          */
 170 #define LB0     2               /* Loopback control 00=normal loopback  */
 171 #define LB1     4               /* 01=internal, 10=ext1, 11=ext2        */
 172 #define ATD     8               /* Auto Transmit Enable=1 tx inh enb    */
 173 #define OFST    0x10            /* Collision offset 1 = modify to low
 174                                    priority mode                        */
 175 
 176 /* Transmitter Status Register */
 177 #define PTXOK   1               /* Packet transmitted without error     */
 178                 /* reserved */
 179 #define COL     4               /* Xmit, check NCR for count            */
 180 #define ABT     8               /* Xmit aborted - 16 tries              */
 181 #define CRS     0x10            /* Carrier Sense lost                   */
 182 #define FU      0x20            /* FIFO underrun                        */
 183 #define CDH     0x40            /* CD Heartbeat failed                  */
 184 #define OWC     0x80            /* Out of window collision              */
 185 
 186 /* Receive configuration Register */
 187 #define SEP     1               /* Save error packets = 1               */
 188 #define ARUNT   2               /* Accept RUNT packets < 64 bytes       */
 189 #define AB      4               /* Accept Broadcast packets             */
 190 #define AM      8               /* Accept Multicast packets             */
 191 #define PRO     0x10            /* Promiscuous mode                     */
 192 #define MON     0x20            /* Monitor mode                         */
 193 
 194 /* Receive Status Register */
 195 #define PRX     1               /* Packet received without error        */
 196 #define CRC     2               /* CRC error                            */
 197 #define FAE     4               /* Frame Alignment error                */
 198 #define FO      8               /* FIFO overrun error                   */
 199 #define MPA     0x10            /* Missed packet                        */
 200 #define PHY     0x20            /* Physical=0, Multicast/Broadcast = 1  */
 201 #define DIS     0x40            /* Receiver disabled (monitor mode)     */
 202 #define DFR     0x80            /* Deferring - jabber on line           */

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