tag	line	file	source code
ioaddr	27	include/linux/ddi.h	int    ioaddr;      /* main I/O (port) address  */
ioaddr	97	include/linux/kd.h	ushort ioaddr[MKDIOADDR];  /* valid i/o addresses */
ioaddr	614	net/drv/slip/slip.c	ddi->ioaddr, ddi->memaddr, ddi->memsize));
ioaddr	579	net/drv/we8003/handler.c	io = conf->ioaddr;
ioaddr	601	net/drv/we8003/handler.c	io = dev->config.ioaddr;
ioaddr	628	net/drv/we8003/handler.c	io = dev->config.ioaddr;
ioaddr	642	net/drv/we8003/handler.c	io = dev->config.ioaddr;
ioaddr	659	net/drv/we8003/handler.c	if (dev->config.ioaddr == 0) return(0);  /* fake it's OK */
ioaddr	35	net/drv/we8003/main.c	cp->ioaddr = dev->config.ioaddr;  /* I/O base address    */
ioaddr	48	net/drv/we8003/main.c	dev->config.ioaddr = cp->ioaddr;  /* I/O base address    */
ioaddr	53	net/drv/we8003/main.c	dev->name, dev->config.ioaddr, dev->config.irq,
ioaddr	75	net/inet/3c509.c	#define EL3WINDOW(win_num) outw(0x0800+(win_num), ioaddr + EL3_CMD)
ioaddr	105	net/inet/3c509.c	short ioaddr, irq;
ioaddr	138	net/inet/3c509.c	ioaddr = 0x200 + ((iobase & 0x1f) << 4);
ioaddr	146	net/inet/3c509.c	&&  dev->base_addr != (unsigned short)ioaddr) {
ioaddr	157	net/inet/3c509.c	if (inw(ioaddr) != 0x6d50)
ioaddr	160	net/inet/3c509.c	dev->base_addr = ioaddr;
ioaddr	245	net/inet/3c509.c	int ioaddr = dev->base_addr;
ioaddr	255	net/inet/3c509.c	dev->irq, ioaddr + EL3_STATUS, inw(ioaddr + EL3_STATUS));
ioaddr	258	net/inet/3c509.c	outw(0x0001, ioaddr + 4);
ioaddr	263	net/inet/3c509.c	outw((dev->irq << 12) | 0x0f00, ioaddr + 8);
ioaddr	269	net/inet/3c509.c	outb(dev->dev_addr[i], ioaddr + i);
ioaddr	273	net/inet/3c509.c	outw(0x1000, ioaddr + EL3_CMD);
ioaddr	277	net/inet/3c509.c	outw(inw(ioaddr + WN4_MEDIA) | 0x00C0, ioaddr + WN4_MEDIA);
ioaddr	283	net/inet/3c509.c	outw(0x8005, ioaddr + EL3_CMD); /* Accept b-case and phys addr only. */
ioaddr	284	net/inet/3c509.c	outw(0xA800, ioaddr + EL3_CMD); /* Turn on statistics. */
ioaddr	285	net/inet/3c509.c	outw(0x2000, ioaddr + EL3_CMD); /* Enable the receiver. */
ioaddr	286	net/inet/3c509.c	outw(0x4800, ioaddr + EL3_CMD); /* Enable transmitter. */
ioaddr	287	net/inet/3c509.c	outw(0x78ff, ioaddr + EL3_CMD); /* Allow all status bits to be seen. */
ioaddr	291	net/inet/3c509.c	outw(0x7098, ioaddr + EL3_CMD); /* Set interrupt mask. */
ioaddr	295	net/inet/3c509.c	dev->name, dev->irq, inw(ioaddr + EL3_STATUS));
ioaddr	304	net/inet/3c509.c	int ioaddr = dev->base_addr;
ioaddr	312	net/inet/3c509.c	dev->name, inb(ioaddr + TX_STATUS), inw(ioaddr + EL3_STATUS));
ioaddr	315	net/inet/3c509.c	outw(0x5800, ioaddr + EL3_CMD);  /* TX_RESET */
ioaddr	316	net/inet/3c509.c	outw(0x4800, ioaddr + EL3_CMD);  /* TX_START */
ioaddr	337	net/inet/3c509.c	dev->name, skb->len, inw(ioaddr + EL3_STATUS));
ioaddr	340	net/inet/3c509.c	if (inw(ioaddr + EL3_STATUS) & 0x0001) { /* IRQ line active, missed one. */
ioaddr	342	net/inet/3c509.c	dev->name, inw(ioaddr + EL3_STATUS), inb(ioaddr + TX_STATUS),
ioaddr	343	net/inet/3c509.c	inw(ioaddr + RX_STATUS));
ioaddr	344	net/inet/3c509.c	outw(0x7800, ioaddr + EL3_CMD); /* Fake interrupt trigger. */
ioaddr	345	net/inet/3c509.c	outw(0x6899, ioaddr + EL3_CMD); /* Ack IRQ */
ioaddr	346	net/inet/3c509.c	outw(0x78ff, ioaddr + EL3_CMD); /* Allow all status bits to be seen. */
ioaddr	353	net/inet/3c509.c	outw(skb->len, ioaddr + TX_FIFO);
ioaddr	354	net/inet/3c509.c	outw(0x00, ioaddr + TX_FIFO);
ioaddr	356	net/inet/3c509.c	port_write_l(ioaddr + TX_FIFO, (void *)(skb+1), (skb->len + 3) >> 2);
ioaddr	362	net/inet/3c509.c	if (inw(ioaddr + TX_FREE) > 1536) {
ioaddr	366	net/inet/3c509.c	outw(0x9000 + 1536, ioaddr + EL3_CMD);
ioaddr	370	net/inet/3c509.c	inw(ioaddr + TX_FREE));
ioaddr	376	net/inet/3c509.c	while (--i > 0  &&  (tx_status = inb(ioaddr + TX_STATUS)) > 0) {
ioaddr	380	net/inet/3c509.c	if (tx_status & 0x30) outw(0x5800, ioaddr + EL3_CMD);
ioaddr	381	net/inet/3c509.c	if (tx_status & 0x3C) outw(0x4800, ioaddr + EL3_CMD);
ioaddr	382	net/inet/3c509.c	outb(0x00, ioaddr + TX_STATUS); /* Pop the status stack. */
ioaddr	394	net/inet/3c509.c	int ioaddr, status;
ioaddr	406	net/inet/3c509.c	ioaddr = dev->base_addr;
ioaddr	407	net/inet/3c509.c	status = inw(ioaddr + EL3_STATUS);
ioaddr	412	net/inet/3c509.c	while ((status = inw(ioaddr + EL3_STATUS)) & 0x01) {
ioaddr	421	net/inet/3c509.c	outw(0x6808, ioaddr + EL3_CMD); /* Ack IRQ */
ioaddr	426	net/inet/3c509.c	update_stats(ioaddr, dev);
ioaddr	434	net/inet/3c509.c	outw(0x6899, ioaddr + EL3_CMD); /* Ack IRQ */
ioaddr	439	net/inet/3c509.c	inw(ioaddr + EL3_STATUS));
ioaddr	462	net/inet/3c509.c	static void update_stats(int ioaddr, struct device *dev)
ioaddr	469	net/inet/3c509.c	outw(0xB000, ioaddr + EL3_CMD);
ioaddr	472	net/inet/3c509.c	lp->stats.tx_carrier_errors  += inb(ioaddr + 0);
ioaddr	473	net/inet/3c509.c	lp->stats.tx_heartbeat_errors  += inb(ioaddr + 1);
ioaddr	474	net/inet/3c509.c	/* Multiple collisions. */     inb(ioaddr + 2);
ioaddr	475	net/inet/3c509.c	lp->stats.collisions    += inb(ioaddr + 3);
ioaddr	476	net/inet/3c509.c	lp->stats.tx_window_errors  += inb(ioaddr + 4);
ioaddr	477	net/inet/3c509.c	lp->stats.rx_fifo_errors  += inb(ioaddr + 5);
ioaddr	478	net/inet/3c509.c	lp->stats.tx_packets    += inb(ioaddr + 6);
ioaddr	479	net/inet/3c509.c	lp->stats.rx_packets    += inb(ioaddr + 7);
ioaddr	480	net/inet/3c509.c	/* Tx deferrals */       inb(ioaddr + 8);
ioaddr	481	net/inet/3c509.c	inw(ioaddr + 10);  /* Total Rx and Tx octets. */
ioaddr	482	net/inet/3c509.c	inw(ioaddr + 12);
ioaddr	486	net/inet/3c509.c	outw(0xA800, ioaddr + EL3_CMD);
ioaddr	494	net/inet/3c509.c	int ioaddr = dev->base_addr;
ioaddr	499	net/inet/3c509.c	inw(ioaddr+EL3_STATUS), inw(ioaddr+RX_STATUS));
ioaddr	500	net/inet/3c509.c	while ((rx_status = inw(ioaddr + RX_STATUS)) > 0) {
ioaddr	530	net/inet/3c509.c	port_read_l(ioaddr+RX_FIFO, (void *)(skb+1),
ioaddr	535	net/inet/3c509.c	outw(0x4000, ioaddr + EL3_CMD); /* Rx discard */
ioaddr	543	net/inet/3c509.c	inb(ioaddr + EL3_STATUS));
ioaddr	544	net/inet/3c509.c	outw(0x4000, ioaddr + EL3_CMD); /* Rx discard */
ioaddr	545	net/inet/3c509.c	while (inw(ioaddr + EL3_STATUS) & 0x1000)
ioaddr	547	net/inet/3c509.c	inw(ioaddr + EL3_STATUS) );
ioaddr	550	net/inet/3c509.c	inb(ioaddr + EL3_STATUS));
ioaddr	562	net/inet/3c509.c	outw(0x4000, ioaddr + EL3_CMD); /* Rx discard */
ioaddr	563	net/inet/3c509.c	while (inw(ioaddr + EL3_STATUS) & 0x1000)
ioaddr	565	net/inet/3c509.c	inw(ioaddr + EL3_STATUS) );
ioaddr	570	net/inet/3c509.c	inw(ioaddr+EL3_STATUS), inw(ioaddr+8));
ioaddr	578	net/inet/3c509.c	int ioaddr = dev->base_addr;
ioaddr	587	net/inet/3c509.c	outw(0xB000, ioaddr + EL3_CMD);
ioaddr	590	net/inet/3c509.c	outw(0x1800, ioaddr + EL3_CMD);
ioaddr	591	net/inet/3c509.c	outw(0x5000, ioaddr + EL3_CMD);
ioaddr	595	net/inet/3c509.c	outw(0xb800, ioaddr + EL3_CMD);
ioaddr	599	net/inet/3c509.c	outw(inw(ioaddr + WN4_MEDIA) & ~ 0x00C0, ioaddr + WN4_MEDIA);
ioaddr	606	net/inet/3c509.c	outw(0x0f00, ioaddr + 8);
ioaddr	611	net/inet/3c509.c	update_stats(ioaddr, dev);
ioaddr	34	net/inet/el.c	int el2autoprobe(int ioaddr, struct device *dev);
ioaddr	35	net/inet/el.c	int el2probe(int ioaddr, struct device *dev);
ioaddr	46	net/inet/el.c	el2autoprobe(int ioaddr, struct device *dev)
ioaddr	52	net/inet/el.c	if (ioaddr > 0)
ioaddr	53	net/inet/el.c	return el2probe(ioaddr, dev);
ioaddr	87	net/inet/el.c	el2probe(int ioaddr, struct device *dev)
ioaddr	94	net/inet/el.c	printk("3c503 probe at %#3x:", ioaddr);
ioaddr	95	net/inet/el.c	iobase_reg = inb(ioaddr+0x403);
ioaddr	96	net/inet/el.c	membase_reg = inb(ioaddr+0x404);
ioaddr	103	net/inet/el.c	saved_406 = inb_p(ioaddr + 0x406);
ioaddr	104	net/inet/el.c	outb_p(ECNTRL_RESET|ECNTRL_THIN, ioaddr + 0x406); /* Reset it... */
ioaddr	105	net/inet/el.c	outb_p(ECNTRL_THIN, ioaddr + 0x406);
ioaddr	107	net/inet/el.c	outb(ECNTRL_SAPROM|ECNTRL_THIN, ioaddr + 0x406);
ioaddr	109	net/inet/el.c	printk(" %2.2X", (station_addr[i] = inb(ioaddr + i)));
ioaddr	116	net/inet/el.c	outb_p(saved_406, ioaddr + 0x406);
ioaddr	120	net/inet/el.c	outb(ECNTRL_THIN, ioaddr + 0x406);
ioaddr	121	net/inet/el.c	dev->base_addr = ioaddr;
ioaddr	124	net/inet/el.c	outb(EGACFR_NORM, ioaddr + 0x405);  /* Enable RAM */
ioaddr	224	net/inet/el.c	return ioaddr;
ioaddr	35	net/inet/el2.c	int el2probe1(int ioaddr, struct device *dev);
ioaddr	61	net/inet/el2.c	short ioaddr = dev->base_addr;
ioaddr	63	net/inet/el2.c	if (ioaddr < 0)
ioaddr	65	net/inet/el2.c	if (ioaddr > 0)
ioaddr	66	net/inet/el2.c	return ! el2probe1(ioaddr, dev);
ioaddr	116	net/inet/el2.c	el2probe1(int ioaddr, struct device *dev)
ioaddr	123	net/inet/el2.c	printk("3c503 probe at %#3x:", ioaddr);
ioaddr	124	net/inet/el2.c	iobase_reg = inb(ioaddr+0x403);
ioaddr	125	net/inet/el2.c	membase_reg = inb(ioaddr+0x404);
ioaddr	132	net/inet/el2.c	saved_406 = inb_p(ioaddr + 0x406);
ioaddr	133	net/inet/el2.c	outb_p(ECNTRL_RESET|ECNTRL_THIN, ioaddr + 0x406); /* Reset it... */
ioaddr	134	net/inet/el2.c	outb_p(ECNTRL_THIN, ioaddr + 0x406);
ioaddr	136	net/inet/el2.c	outb(ECNTRL_SAPROM|ECNTRL_THIN, ioaddr + 0x406);
ioaddr	138	net/inet/el2.c	printk(" %2.2X", (station_addr[i] = inb(ioaddr + i)));
ioaddr	145	net/inet/el2.c	outb(saved_406, ioaddr + 0x406);
ioaddr	150	net/inet/el2.c	snarf_region(ioaddr, 16);
ioaddr	155	net/inet/el2.c	outb(ECNTRL_THIN, ioaddr + 0x406);
ioaddr	156	net/inet/el2.c	dev->base_addr = ioaddr;
ioaddr	159	net/inet/el2.c	outb(EGACFR_NORM, ioaddr + 0x405);  /* Enable RAM */
ioaddr	240	net/inet/el2.c	return ioaddr;
ioaddr	44	net/inet/hp.c	int hpprobe1(int ioaddr, struct device *dev);
ioaddr	65	net/inet/hp.c	short ioaddr = dev->base_addr;
ioaddr	67	net/inet/hp.c	if (ioaddr < 0)
ioaddr	69	net/inet/hp.c	if (ioaddr > 0x100)
ioaddr	70	net/inet/hp.c	return ! hpprobe1(ioaddr, dev);
ioaddr	81	net/inet/hp.c	dev->base_addr = ioaddr;
ioaddr	85	net/inet/hp.c	int hpprobe1(int ioaddr, struct device *dev)
ioaddr	92	net/inet/hp.c	if (inb(ioaddr) != 0x08
ioaddr	93	net/inet/hp.c	|| inb(ioaddr+1) != 0x00
ioaddr	94	net/inet/hp.c	|| inb(ioaddr+2) != 0x09)
ioaddr	103	net/inet/hp.c	if ((tmp = inb(ioaddr + HP_ID)) & 0x80) {
ioaddr	113	net/inet/hp.c	printk("%s: %s at %#3x,", dev->name, ei_status.name, ioaddr);
ioaddr	116	net/inet/hp.c	printk(" %2.2x", station_addr[i] = inb(ioaddr + i));
ioaddr	120	net/inet/hp.c	dev->base_addr = ioaddr + NIC_OFFSET;
ioaddr	131	net/inet/hp.c	outb_p(irqmap[dev->irq] | HP_RUN, ioaddr + HP_CONFIGURE);
ioaddr	132	net/inet/hp.c	outb_p( 0x00 | HP_RUN, ioaddr + HP_CONFIGURE);
ioaddr	154	net/inet/hp.c	snarf_region(ioaddr, 32);
ioaddr	170	net/inet/lance.c	short ioaddr = dev->base_addr;
ioaddr	174	net/inet/lance.c	printk("%s: LANCE at %#3x, address", dev->name, ioaddr);
ioaddr	179	net/inet/lance.c	printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
ioaddr	182	net/inet/lance.c	inw(ioaddr+LANCE_RESET);
ioaddr	202	net/inet/lance.c	outw(0, ioaddr+LANCE_RESET);
ioaddr	212	net/inet/lance.c	outw(0x0001, ioaddr+LANCE_ADDR);
ioaddr	213	net/inet/lance.c	outw((short) (int) &lp->init_block, ioaddr+LANCE_DATA);
ioaddr	214	net/inet/lance.c	outw(0x0002, ioaddr+LANCE_ADDR);
ioaddr	215	net/inet/lance.c	outw(((int)&lp->init_block) >> 16, ioaddr+LANCE_DATA);
ioaddr	216	net/inet/lance.c	outw(0x0000, ioaddr+LANCE_ADDR);
ioaddr	224	net/inet/lance.c	outw(0x0041, ioaddr+LANCE_DATA);
ioaddr	242	net/inet/lance.c	outw(0x0002, ioaddr+LANCE_ADDR);
ioaddr	243	net/inet/lance.c	outw(0x0002, ioaddr+LANCE_BUS_IF);
ioaddr	247	net/inet/lance.c	snarf_region(ioaddr, LANCE_TOTAL_SIZE);
ioaddr	295	net/inet/lance.c	int ioaddr = dev->base_addr;
ioaddr	311	net/inet/lance.c	inw(ioaddr+LANCE_RESET);
ioaddr	318	net/inet/lance.c	outw(0, ioaddr+LANCE_RESET);
ioaddr	323	net/inet/lance.c	outw(0x0002, ioaddr+LANCE_ADDR);
ioaddr	324	net/inet/lance.c	outw(0x0002, ioaddr+LANCE_BUS_IF);
ioaddr	334	net/inet/lance.c	outw(0x0001, ioaddr+LANCE_ADDR);
ioaddr	335	net/inet/lance.c	outw((short) (int) &lp->init_block, ioaddr+LANCE_DATA);
ioaddr	336	net/inet/lance.c	outw(0x0002, ioaddr+LANCE_ADDR);
ioaddr	337	net/inet/lance.c	outw(((int)&lp->init_block) >> 16, ioaddr+LANCE_DATA);
ioaddr	339	net/inet/lance.c	outw(0x0004, ioaddr+LANCE_ADDR);
ioaddr	340	net/inet/lance.c	outw(0x0d15, ioaddr+LANCE_DATA);
ioaddr	342	net/inet/lance.c	outw(0x0000, ioaddr+LANCE_ADDR);
ioaddr	343	net/inet/lance.c	outw(0x0001, ioaddr+LANCE_DATA);
ioaddr	350	net/inet/lance.c	if (inw(ioaddr+LANCE_DATA) & 0x0100)
ioaddr	352	net/inet/lance.c	outw(0x0142, ioaddr+LANCE_DATA);
ioaddr	356	net/inet/lance.c	dev->name, i, (int) &lp->init_block, inw(ioaddr+LANCE_DATA));
ioaddr	390	net/inet/lance.c	int ioaddr = dev->base_addr;
ioaddr	397	net/inet/lance.c	outw(0, ioaddr+LANCE_ADDR);
ioaddr	399	net/inet/lance.c	dev->name, inw(ioaddr+LANCE_DATA));
ioaddr	402	net/inet/lance.c	outw(0x43, ioaddr+LANCE_DATA);
ioaddr	426	net/inet/lance.c	outw(0x0000, ioaddr+LANCE_ADDR);
ioaddr	428	net/inet/lance.c	inw(ioaddr+LANCE_DATA));
ioaddr	429	net/inet/lance.c	outw(0x0000, ioaddr+LANCE_DATA);
ioaddr	457	net/inet/lance.c	outw(0x0000, ioaddr+LANCE_ADDR);
ioaddr	458	net/inet/lance.c	outw(0x0048, ioaddr+LANCE_DATA);
ioaddr	489	net/inet/lance.c	int csr0, ioaddr;
ioaddr	496	net/inet/lance.c	ioaddr = dev->base_addr;
ioaddr	560	net/inet/lance.c	dev->name, inw(ioaddr + LANCE_ADDR),
ioaddr	629	net/inet/lance.c	int ioaddr = dev->base_addr;
ioaddr	635	net/inet/lance.c	outw(112, ioaddr+LANCE_ADDR);
ioaddr	636	net/inet/lance.c	lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
ioaddr	638	net/inet/lance.c	outw(0, ioaddr+LANCE_ADDR);
ioaddr	642	net/inet/lance.c	dev->name, inw(ioaddr+LANCE_DATA));
ioaddr	646	net/inet/lance.c	outw(0x0004, ioaddr+LANCE_DATA);
ioaddr	662	net/inet/lance.c	short ioaddr = dev->base_addr;
ioaddr	666	net/inet/lance.c	saved_addr = inw(ioaddr+LANCE_ADDR);
ioaddr	667	net/inet/lance.c	outw(112, ioaddr+LANCE_ADDR);
ioaddr	668	net/inet/lance.c	lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
ioaddr	669	net/inet/lance.c	outw(saved_addr, ioaddr+LANCE_ADDR);
ioaddr	46	net/inet/ne.c	static int neprobe1(int ioaddr, struct device *dev, int verbose);
ioaddr	79	net/inet/ne.c	short ioaddr = dev->base_addr;
ioaddr	81	net/inet/ne.c	if (ioaddr < 0)
ioaddr	83	net/inet/ne.c	if (ioaddr > 0x100)
ioaddr	84	net/inet/ne.c	return ! neprobe1(ioaddr, dev, 1);
ioaddr	96	net/inet/ne.c	dev->base_addr = ioaddr;
ioaddr	100	net/inet/ne.c	static int neprobe1(int ioaddr, struct device *dev, int verbose)
ioaddr	108	net/inet/ne.c	int reg0 = inb(ioaddr);
ioaddr	115	net/inet/ne.c	outb_p(E8390_NODMA+E8390_PAGE1+E8390_STOP, ioaddr + E8390_CMD);
ioaddr	116	net/inet/ne.c	regd = inb_p(ioaddr + 0x0d);
ioaddr	117	net/inet/ne.c	outb_p(0xff, ioaddr + 0x0d);
ioaddr	118	net/inet/ne.c	outb_p(E8390_NODMA+E8390_PAGE0, ioaddr + E8390_CMD);
ioaddr	119	net/inet/ne.c	inb_p(ioaddr + EN0_COUNTER0); /* Clear the counter by reading. */
ioaddr	120	net/inet/ne.c	if (inb_p(ioaddr + EN0_COUNTER0) != 0) {
ioaddr	121	net/inet/ne.c	outb_p(reg0, ioaddr);
ioaddr	122	net/inet/ne.c	outb(regd, ioaddr + 0x0d);  /* Restore the old values. */
ioaddr	127	net/inet/ne.c	printk("NE*000 ethercard probe at %#3x:", ioaddr);
ioaddr	151	net/inet/ne.c	outb_p(program_seq[i].value, ioaddr + program_seq[i].offset);
ioaddr	154	net/inet/ne.c	SA_prom[i] = inb_p(ioaddr + NE_DATAPORT);
ioaddr	155	net/inet/ne.c	SA_prom[i+1] = inb_p(ioaddr + NE_DATAPORT);
ioaddr	163	net/inet/ne.c	outb_p(0x49, ioaddr + EN0_DCFG);
ioaddr	208	net/inet/ne.c	outb_p(0x50, ioaddr + EN0_IMR);  /* Enable one interrupt. */
ioaddr	209	net/inet/ne.c	outb_p(0x00, ioaddr + EN0_RCNTLO);
ioaddr	210	net/inet/ne.c	outb_p(0x00, ioaddr + EN0_RCNTHI);
ioaddr	211	net/inet/ne.c	outb_p(E8390_RREAD+E8390_START, ioaddr); /* Trigger it... */
ioaddr	212	net/inet/ne.c	outb_p(0x00, ioaddr + EN0_IMR);     /* Mask it again. */
ioaddr	231	net/inet/ne.c	dev->base_addr = ioaddr;
ioaddr	234	net/inet/ne.c	snarf_region(ioaddr, 32);
ioaddr	239	net/inet/ne.c	dev->name, name, ioaddr, dev->irq);
ioaddr	122	net/inet/plip.c	extern int plip_probe(int ioaddr, struct device *dev);
ioaddr	31	net/inet/wd.c	int wdprobe(int ioaddr, struct device *dev);
ioaddr	32	net/inet/wd.c	int wdprobe1(int ioaddr, struct device *dev);
ioaddr	66	net/inet/wd.c	short ioaddr = dev->base_addr;
ioaddr	68	net/inet/wd.c	if (ioaddr < 0)
ioaddr	70	net/inet/wd.c	if (ioaddr > 0x100)
ioaddr	71	net/inet/wd.c	return ! wdprobe1(ioaddr, dev);
ioaddr	83	net/inet/wd.c	dev->base_addr = ioaddr;
ioaddr	87	net/inet/wd.c	int wdprobe1(int ioaddr, struct device *dev)
ioaddr	97	net/inet/wd.c	checksum += inb(ioaddr + 8 + i);
ioaddr	101	net/inet/wd.c	printk("%s: WD80x3 at %#3x, ", dev->name, ioaddr);
ioaddr	103	net/inet/wd.c	printk(" %2.2X", station_addr[i] = inb(ioaddr + 8 + i));
ioaddr	110	net/inet/wd.c	if (inb(ioaddr+0) == 'P' && inb(ioaddr+1) == 'D') {
ioaddr	111	net/inet/wd.c	unsigned char reg5 = inb(ioaddr+5);
ioaddr	113	net/inet/wd.c	switch (inb(ioaddr+2)) {
ioaddr	130	net/inet/wd.c	if (inb(ioaddr+i) != inb(ioaddr+8+i))
ioaddr	137	net/inet/wd.c	int tmp = inb(ioaddr+1); /* fiddle with 16bit bit */
ioaddr	138	net/inet/wd.c	outb( tmp ^ 0x01, ioaddr+1 ); /* attempt to clear 16bit bit */
ioaddr	139	net/inet/wd.c	if (((inb( ioaddr+1) & 0x01) == 0x01) /* A 16 bit card */
ioaddr	141	net/inet/wd.c	int asic_reg5 = inb(ioaddr+WD_CMDREG5);
ioaddr	143	net/inet/wd.c	outb( NIC16 | (asic_reg5&0x1f), ioaddr+WD_CMDREG5);
ioaddr	144	net/inet/wd.c	outb(tmp, ioaddr+1);
ioaddr	151	net/inet/wd.c	outb(tmp, ioaddr+1);    /* Restore original reg1 value. */
ioaddr	154	net/inet/wd.c	if ( !ancient && (inb(ioaddr+1) & 0x01) != (word16 & 0x01))
ioaddr	156	net/inet/wd.c	word16 ? 16 : 8, (inb(ioaddr+1) & 0x01) ? 16 : 8);
ioaddr	166	net/inet/wd.c	int reg0 = inb(ioaddr);
ioaddr	172	net/inet/wd.c	int high_addr_bits = inb(ioaddr+WD_CMDREG5) & 0x1f;
ioaddr	182	net/inet/wd.c	dev->base_addr = ioaddr+WD_NIC_OFFSET;
ioaddr	186	net/inet/wd.c	int reg1 = inb(ioaddr+1);
ioaddr	187	net/inet/wd.c	int reg4 = inb(ioaddr+4);
ioaddr	206	net/inet/wd.c	snarf_region(ioaddr, 32);
ioaddr	239	net/inet/wd.c	int ioaddr = dev->base_addr - WD_NIC_OFFSET; /* WD_CMDREG */
ioaddr	247	net/inet/wd.c	outb(ei_status.reg5, ioaddr+WD_CMDREG5);
ioaddr	248	net/inet/wd.c	outb(ei_status.reg0, ioaddr); /* WD_CMDREG */