taglinefilesource code
reg_sub40drivers/FPU-emu/fpu_arith.creg_sub(FPU_st0_ptr, &st(FPU_rm), FPU_st0_ptr, control_word);
reg_sub48drivers/FPU-emu/fpu_arith.creg_sub(&st(FPU_rm), FPU_st0_ptr, FPU_st0_ptr, control_word);
reg_sub91drivers/FPU-emu/fpu_arith.creg_sub(FPU_st0_ptr, &st(FPU_rm), &st(FPU_rm), control_word);
reg_sub101drivers/FPU-emu/fpu_arith.creg_sub(&st(FPU_rm), FPU_st0_ptr, &st(FPU_rm), control_word);
reg_sub147drivers/FPU-emu/fpu_arith.cif ( !reg_sub(FPU_st0_ptr, &st(FPU_rm), &st(FPU_rm), control_word) )
reg_sub158drivers/FPU-emu/fpu_arith.cif ( !reg_sub(&st(FPU_rm), FPU_st0_ptr, &st(FPU_rm), control_word) )
reg_sub425drivers/FPU-emu/fpu_entry.creg_sub(FPU_st0_ptr, &FPU_loaded_data, FPU_st0_ptr,
reg_sub430drivers/FPU-emu/fpu_entry.creg_sub(&FPU_loaded_data, FPU_st0_ptr, FPU_st0_ptr,
reg_sub90drivers/FPU-emu/fpu_proto.hextern int reg_sub(FPU_REG const *a, FPU_REG const *b,
reg_sub79drivers/FPU-emu/fpu_trig.creg_sub(&CONST_PI2, X, X, FULL_PRECISION);
reg_sub112drivers/FPU-emu/fpu_trig.creg_sub(X, &tmp, X, FULL_PRECISION);
reg_sub1198drivers/FPU-emu/fpu_trig.creg_sub(&CONST_PI2, &sum, &sum, FULL_PRECISION);
reg_sub1202drivers/FPU-emu/fpu_trig.creg_sub(&CONST_PI, &sum, &sum, FULL_PRECISION);
reg_sub175drivers/FPU-emu/poly_atan.creg_sub(&CONST_PI4, arg, arg, FULL_PRECISION);
reg_sub141drivers/FPU-emu/poly_tan.creg_sub(&CONST_1, &even_poly, &even_poly, FULL_PRECISION);