drivers/FPU-emu/reg

/* */
   1 /*---------------------------------------------------------------------------+
   2  |  reg_norm.S                                                               |
   3  |                                                                           |
   4  | Copyright (C) 1992,1993                                                   |
   5  |                       W. Metzenthen, 22 Parker St, Ormond, Vic 3163,      |
   6  |                       Australia.  E-mail   billm@vaxc.cc.monash.edu.au    |
   7  |                                                                           |
   8  | Normalize the value in a FPU_REG.                                         |
   9  |                                                                           |
  10  | Call from C as:                                                           |
  11  |   void normalize(FPU_REG *n)                                              |
  12  |                                                                           |
  13  |   void normalize_nuo(FPU_REG *n)                                          |
  14  |                                                                           |
  15  +---------------------------------------------------------------------------*/
  16 
  17 #include "fpu_asm.h"
  18 
  19 
  20 .text
  21 
  22         .align 2,144
  23 .globl _normalize
  24 
  25 _normalize:
  26         pushl   %ebp
  27         movl    %esp,%ebp
  28         pushl   %ebx
  29 
  30         movl    PARAM1,%ebx
  31 
  32         movl    SIGH(%ebx),%edx
  33         movl    SIGL(%ebx),%eax
  34 
  35         orl     %edx,%edx       /* ms bits */
  36         js      L_done          /* Already normalized */
  37         jnz     L_shift_1       /* Shift left 1 - 31 bits */
  38 
  39         orl     %eax,%eax
  40         jz      L_zero          /* The contents are zero */
  41 
  42         movl    %eax,%edx
  43         xorl    %eax,%eax
  44         subl    $32,EXP(%ebx)   /* This can cause an underflow */
  45 
  46 /* We need to shift left by 1 - 31 bits */
  47 L_shift_1:
  48         bsrl    %edx,%ecx       /* get the required shift in %ecx */
  49         subl    $31,%ecx
  50         negl    %ecx
  51         shld    %cl,%eax,%edx
  52         shl     %cl,%eax
  53         subl    %ecx,EXP(%ebx)  /* This can cause an underflow */
  54 
  55         movl    %edx,SIGH(%ebx)
  56         movl    %eax,SIGL(%ebx)
  57 
  58 L_done:
  59         cmpl    EXP_OVER,EXP(%ebx)
  60         jge     L_overflow
  61 
  62         cmpl    EXP_UNDER,EXP(%ebx)
  63         jle     L_underflow
  64 
  65 L_exit:
  66         popl    %ebx
  67         leave
  68         ret
  69 
  70 
  71 L_zero:
  72         movl    EXP_UNDER,EXP(%ebx)
  73         movb    TW_Zero,TAG(%ebx)
  74         jmp     L_exit
  75 
  76 L_underflow:
  77         push    %ebx
  78         call    _arith_underflow
  79         pop     %ebx
  80         jmp     L_exit
  81 
  82 L_overflow:
  83         push    %ebx
  84         call    _arith_overflow
  85         pop     %ebx
  86         jmp     L_exit
  87 
  88 
  89 
  90 /* Normalise without reporting underflow or overflow */
  91         .align 2,144
  92 .globl _normalize_nuo
  93 
  94 _normalize_nuo:
  95         pushl   %ebp
  96         movl    %esp,%ebp
  97         pushl   %ebx
  98 
  99         movl    PARAM1,%ebx
 100 
 101         movl    SIGH(%ebx),%edx
 102         movl    SIGL(%ebx),%eax
 103 
 104         orl     %edx,%edx       /* ms bits */
 105         js      L_exit          /* Already normalized */
 106         jnz     L_nuo_shift_1   /* Shift left 1 - 31 bits */
 107 
 108         orl     %eax,%eax
 109         jz      L_zero          /* The contents are zero */
 110 
 111         movl    %eax,%edx
 112         xorl    %eax,%eax
 113         subl    $32,EXP(%ebx)   /* This can cause an underflow */
 114 
 115 /* We need to shift left by 1 - 31 bits */
 116 L_nuo_shift_1:
 117         bsrl    %edx,%ecx       /* get the required shift in %ecx */
 118         subl    $31,%ecx
 119         negl    %ecx
 120         shld    %cl,%eax,%edx
 121         shl     %cl,%eax
 122         subl    %ecx,EXP(%ebx)  /* This can cause an underflow */
 123 
 124         movl    %edx,SIGH(%ebx)
 125         movl    %eax,SIGL(%ebx)
 126         jmp     L_exit
 127 
 128
/* */
root/drivers/FPU-emu/reg_norm.S
