1 /* depca.c: A DIGITAL DEPCA ethernet driver for linux. 2
3 Written 1994 by David C. Davies. 4
5 Copyright 1994 David C. Davies and United States Government as 6 represented by the Director, National Security Agency. This software 7 may be used and distributed according to the terms of the GNU Public 8 License, incorporated herein by reference. 9
10 This driver is written for the Digital Equipment Corporation series 11 of DEPCA ethernet cards: 12
13 DE100 DEPCA 14 DE200 DEPCA Turbo 15 DE202 DEPCA Turbo (TP BNC) 16 DE210 DEPCA 17
18 The driver has been tested on DE100 and DE20x cards in a relatively busy 19 network. 20
21 The author may be reached as davies@wanton.enet.dec.com or 22 Digital Equipment Corporation, 146 Main Street, Maynard MA 01754. 23
24 ========================================================================= 25 The driver was based on the 'lance.c' driver from Donald Becker which is 26 included with the standard driver distribution for linux. Modifications 27 were made to most routines and the hardware recognition routines were 28 written from scratch. Primary references used were: 29
30 1) Lance.c code in /linux/drivers/net/ 31 2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook", 32 AMD, 1992 [(800) 222-9323]. 33 3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)", 34 AMD, Pub. #17881, May 1993. 35 4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA", 36 AMD, Pub. #16907, May 1992 37 5) "DEC EtherWORKS LC Ethernet Controller Owners Manual", 38 Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003 39 6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual", 40 Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003 41 7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR 42 Digital Equipment Corporation, 1989 43 8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual", 44 Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001 45 46 Peter Bauer's depca.c (V0.5) was referred to when debugging this driver. 47 The hash filter code was derived from Reference 3 and has been tested 48 only to the extent that the Table A-1, page A-7, was confirmed to fill 49 the filter bit positions correctly. Hash filtering is not yet 50 implemented in the current driver set. 51
52 The DE200 series boards have on-board 64kB RAM for use as a shared 53 memory network buffer. Only the DE100 cards make use of a 2kB buffer 54 mode which has not been implemented in this driver (only the 32kB and 55 64kB modes are supported). 56
57 At the most only 2 DEPCA cards can be supported because there is only 58 provision for two I/O base addresses on the cards (0x300 and 0x200). The 59 base address is 'autoprobed' by looking for the self test PROM and 60 detecting the card name. The shared memory base address is decoded by 61 'autoprobing' the Ethernet PROM address information. The second DEPCA is 62 detected and information placed in the base_addr variable of the next 63 device structure (which is created if necessary), thus enabling 64 ethif_probe initialization for the device. 65
66 ************************************************************************ 67
68 NOTE: If you are using two DEPCAs, it is important that you assign the 69 base memory addresses correctly. The driver autoprobes I/O 0x300 then 70 0x200. The base memory address for the first device must be less than 71 that of the second so that the auto probe will correctly assign the I/O 72 and memory addresses on the same card. I can't think of a way to do 73 this unambiguously at the moment, since there is nothing on the cards to 74 tie I/O and memory information together. 75
76 I am unable to test 2 DEPCAs together for now, so this code is 77 unchecked. All reports, good or bad, are welcome. 78
79 ************************************************************************ 80
81 The board IRQ setting must be at an unused IRQ which is auto-probed 82 using Donald Becker's autoprobe routines. DE100 board IRQs are 83 {2,3,4,5,7}, whereas the DE200 is at {5,9,10,11,15}. Note that IRQ2 is 84 really IRQ9 in machines with 16 IRQ lines. 85
86 No 16MB memory limitation should exist with this driver as DMA is not 87 used and the common memory area is in low memory on the network card (my 88 current system has 20MB and I've not had problems yet). 89
90 The DE203, DE204 and DE205 cards may also work with this driver (I 91 haven't tested them so I don't know). If you have one of these cards, 92 place the name in the DEPCA_SIGNATURE string around line 160, recompile 93 the kernel and reboot. Check if the card is recognised and works - mail 94 me if so, so that I can add it into the list of supported cards! 95
96 TO DO: 97 ------ 98
99 1. Implement the 2k buffer mode - does anyone need it?? 100
101 Revision History 102 ---------------- 103
104 Version Date Description 105 106 0.1 25-jan-94 Initial writing 107 0.2 27-jan-94 Added LANCE TX buffer chaining 108 0.3 1-feb-94 Added multiple DEPCA support 109 0.31 4-feb-94 Added DE202 recognition 110 0.32 19-feb-94 Tidy up. Improve multi-DEPCA support. 111
112 ========================================================================= 113 */ 114
115 staticchar *version = "depca.c:v0.32 2/19/94 davies@wanton.enet.dec.com\n";
116
117 #include <stdarg.h>
118 #include <linux/config.h>
119 #include <linux/kernel.h>
120 #include <linux/sched.h>
121 #include <linux/string.h>
122 #include <linux/ptrace.h>
123 #include <linux/errno.h>
124 #include <linux/ioport.h>
125 #include <linux/malloc.h>
126 #include <linux/interrupt.h>
127 #include <asm/bitops.h>
128 #include <asm/io.h>
129 #include <asm/dma.h>
130
131 #include "dev.h"
132 #include "iow.h"
133 #include "eth.h"
134 #include "skbuff.h"
135 #include "arp.h"
136 #include "depca.h"
137
138 externintvsprintf(char *buf, constchar *fmt, ...);
139
140 #ifdefDEPCA_DEBUG 141 intdepca_debug = DEPCA_DEBUG;
142 #else 143 intdepca_debug = 1;
144 #endif 145
146 #ifndefDEPCA_IRQ 147 /*#define DEPCA_IRQ {5,9,10,11,15,0}*/ 148 #defineDEPCA_IRQ 5
149 #endif 150
151 #ifndefPROBE_LENGTH 152 #definePROBE_LENGTH 32
153 #endif 154
155 #ifndefPROBE_SEQUENCE 156 #definePROBE_SEQUENCE "FF0055AAFF0055AA"
157 #endif 158
159 #ifndefDEPCA_SIGNATURE 160 #defineDEPCA_SIGNATURE{"DEPCA","DE100","DE200","DE202","DE210",""} 161 #defineDEPCA_NAME_LENGTH 8
162 #endif 163
164 #ifndefDEPCA_RAM_BASE_ADDRESSES 165 #defineDEPCA_RAM_BASE_ADDRESSES{0xc0000,0xd0000,0xe0000,0x00000} 166 #endif 167 staticshortmem_chkd = 0; /* holds which base addrs have been */ 168 /* checked, for multi-DEPCA case */ 169
170 #ifndefDEPCA_IO_PORTS 171 #defineDEPCA_IO_PORTS{0x300, 0x200, 0} 172 #endif 173
174 #ifndefDEPCA_TOTAL_SIZE 175 #defineDEPCA_TOTAL_SIZE 0x10
176 #endif 177
178 #ifndefMAX_NUM_DEPCAS 179 #defineMAX_NUM_DEPCAS 2
180 #endif 181
182 /* 183 ** Set the number of Tx and Rx buffers. 184 */ 185 #ifndef DEPCA_BUFFER_LOG_SZ
186 #defineRING_SIZE 16 /* 16 buffers */ 187 #else 188 #defineRING_SIZE (1 << (DEPCA_BUFFERS_LOG_SZ))
189 #endif/* DEPCA_BUFFER_LOG_SZ */ 190
191 #definePKT_BUF_SZ 1544 /* Buffer size for each Tx/Rx buffer */ 192 #definePKT_SZ 1514 /* Maximum ethernet packet length */ 193 #defineDAT_SZ 1500 /* Maximum ethernet data length */ 194 #definePKT_HDR_LEN 14 /* Addresses and data length info */ 195
196 #ifdefHAVE_MULTICAST 197 #ifndefCRC_POLYNOMIAL 198 #defineCRC_POLYNOMIAL 0x04c11db7 /* Ethernet CRC polynomial */ 199 #endif/* CRC_POLYNOMIAL */ 200 #endif/* HAVE_MULTICAST */ 201
202 #ifndefHAVE_ALLOC_SKB 203 #definealloc_skb(size, priority) (structsk_buff *) kmalloc(size,priority)
204 #definekfree_skbmem(buff, size) kfree_s(buff,size)
205 #endif/* HAVE_ALLOC_SKB */ 206
207 /* 208 ** The DEPCA Rx and Tx ring descriptors. 209 */ 210 structdepca_rx_head{ 211 longbase;
212 shortbuf_length; /* This length is negative 2's complement! */ 213 shortmsg_length; /* This length is "normal". */ 214 };
215
216 structdepca_tx_head{ 217 longbase;
218 shortlength; /* This length is negative 2's complement! */ 219 shortmisc; /* Errors and TDR info */ 220 };
221
222 struct depca_ring_info { 223 };
224
225 /* 226 ** The Lance initialization block, described in databook, in common memory. 227 */ 228 structdepca_init{ 229 unsignedshortmode; /* Mode register */ 230 unsignedcharphys_addr[ETH_ALEN]; /* Physical ethernet address */ 231 unsignedshortfilter[4]; /* Multicast filter. */ 232 unsignedlongrx_ring; /* Rx ring base pointer & ring length */ 233 unsignedlongtx_ring; /* Tx ring base pointer & ring length */ 234 };
235
236 structdepca_private{ 237 chardevname[8]; /* Not used */ 238 structdepca_rx_head *rx_ring; /* Pointer to start of RX descriptor ring */ 239 structdepca_tx_head *tx_ring; /* Pointer to start of TX descriptor ring */ 240 structdepca_initinit_block;/* Initialization block */ 241 longdma_buffs; /* Start address of Rx and Tx buffers. */ 242 intcur_rx, cur_tx; /* The next free ring entry */ 243 intdirty_rx, dirty_tx; /* The ring entries to be free()ed. */ 244 intdma;
245 structenet_statisticsstats;
246 char old_depca;
247 shortringSize; /* ring size based on available memory */ 248 shortrmask; /* modulus mask based on ring size */ 249 longrlen; /* log2(ringSize) for the descriptors */ 250 };
251
252 /* 253 ** Public Functions 254 */ 255 staticintdepca_open(structdevice *dev);
256 staticintdepca_start_xmit(structsk_buff *skb, structdevice *dev);
257 staticvoiddepca_interrupt(intreg_ptr);
258 staticintdepca_close(structdevice *dev);
259 staticstructenet_statistics *depca_get_stats(structdevice *dev);
260 #ifdefHAVE_MULTICAST 261 staticvoidset_multicast_list(structdevice *dev, intnum_addrs, void *addrs);
262 #endif 263
264 /* 265 ** Private functions 266 */ 267 staticintdepca_probe1(structdevice *dev, shortioaddr);
268 staticvoiddepca_init_ring(structdevice *dev);
269 staticintdepca_rx(structdevice *dev);
270 staticintdepca_tx(structdevice *dev);
271
272 staticvoidLoadCSRs(structdevice *dev);
273 staticintInitRestartDepca(structdevice *dev);
274 staticchar *DepcaSignature(unsignedlongmem_addr);
275 staticintDevicePresent(shortioaddr);
276 #ifdefHAVE_MULTICAST 277 staticvoidSetMulticastFilter(intnum_addrs, char *addrs, char *multicast_table);
278 #endif 279
280 staticintnum_depcas = 0, num_eth = 0;;
281
282 /* 283 ** Miscellaneous defines... 284 */ 285 #defineSTOP_DEPCA \
286 outw(CSR0, DEPCA_ADDR);\
287 outw(STOP, DEPCA_DATA)
288
289
290
291 intdepca_probe(structdevice *dev)
/* */ 292 { 293 int *port, ports[] = DEPCA_IO_PORTS;
294 intbase_addr = dev->base_addr;
295 intstatus;
296 structdevice *eth0 = (structdevice *) NULL;
297
298 if (base_addr > 0x1ff) {/* Check a single specified location. */ 299 status = depca_probe1(dev, base_addr);
300 }elseif (base_addr > 0) {/* Don't probe at all. */ 301 status = -ENXIO;
302 }else{/* First probe for the DEPCA test */ 303 /* pattern in ROM */ 304
305 for (status = -ENODEV, port = &ports[0];
306 *port && (num_depcas < MAX_NUM_DEPCAS); port++) { 307 intioaddr = *port;
308
309 #ifdefHAVE_PORTRESERVE 310 if (check_region(ioaddr, DEPCA_TOTAL_SIZE))
311 continue;
312 #endif 313 if (DevicePresent(DEPCA_PROM) == 0) { 314 if (num_depcas > 0) {/* only gets here in autoprobe */ 315
316 /* 317 ** Check the device structures for an end of list or unused device 318 */ 319 while (dev->next != (structdevice *)NULL) { 320 if (dev->next->base_addr == 0xffe0) break;
321 dev = dev->next; /* walk through eth device list */ 322 num_eth++; /* increment eth device number */ 323 } 324
325 /* 326 ** If no more device structures, malloc one up. If memory could 327 ** not be allocated, print an error message. 328 ** 329 */ 330 if (dev->next == (structdevice *)NULL) { 331 dev->next = (structdevice *)kmalloc(sizeof(structdevice) + 8,
332 GFP_KERNEL);
333 }else{ 334 printk("eth%d: Device not initialised, insufficient memory\n",
335 num_eth);
336 } 337
338 /* 339 ** If the memory was allocated, point to the new memory area 340 ** and initialize it (name, I/O address, next device (NULL) and 341 ** initialisation probe routine). 342 */ 343 if ((dev->next != (structdevice *)NULL) &&
344 (num_eth > 0) && (num_eth < 9999)) { 345 dev = dev->next; /* point to the new device */ 346 dev->name = (char *)(dev + sizeof(structdevice));
347 vsprintf(dev->name,"eth%d", num_eth); /* New device name */ 348 dev->base_addr = ioaddr; /* assign the io address */ 349 dev->next = (structdevice *)NULL; /* mark the end of list */ 350 dev->init = &depca_probe;/* initialisation routine */ 351 } 352 }else{ 353 eth0 = dev; /* remember the first device */ 354 status = depca_probe1(dev, ioaddr);
355 } 356 num_depcas++;
357 num_eth++;
358 } 359 } 360 if (eth0) dev = eth0; /* restore the first device */ 361 } 362
363 if (status) dev->base_addr = base_addr;
364
365 returnstatus; /* ENODEV would be more accurate. */ 366 } 367
368 staticint 369 depca_probe1(structdevice *dev, shortioaddr)
/* */ 370 { 371 structdepca_private *lp;
372 inti,j, status=0;
373 unsignedlongmem_start, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
374 char *name=(char *)NULL;
375 intnicsr, offset;
376
377
378 /* 379 ** Stop the DEPCA. Enable the DBR ROM. Disable interrupts and remote boot 380 */ 381 STOP_DEPCA;
382
383 nicsr = inw(DEPCA_NICSR);
384 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
385 outw(nicsr, DEPCA_NICSR);
386
387 if (inw(DEPCA_DATA) == STOP) { 388
389 /* Now find out what kind of DEPCA we have. The DE100 uses a different 390 ** addressing scheme for some registers compared to the DE2xx series. 391 ** Note that a base address location is marked as checked if no DEPCA is 392 ** there or one is found (when the search is immediately terminated). This 393 ** shortens the search time a little for multiple DEPCAs. 394 */ 395
396 for (j = 0, i = 0; mem_base[i] && (j == 0);) { 397 if (((mem_chkd >> i) & 0x01) == 0) {/* has the memory been checked? */ 398 name = DepcaSignature(mem_base[i]);/* check for a DEPCA here */ 399 mem_chkd |= (0x01 << i); /* mark location checked */ 400 if (*name != (char)NULL) {/* one found? */ 401 j = 1; /* set exit flag */ 402 }else{ 403 i++; /* increment search index */ 404 } 405 } 406 } 407
408 if (*name != (char)NULL) {/* found a DEPCA device */ 409 mem_start = mem_base[i];
410 dev->base_addr = ioaddr;
411
412 printk("%s: DEPCA at %#3x is a %s, ", dev->name, ioaddr, name);
413
414 /* There is a 32 byte station address PROM at DEPCA_PROM address. 415 The first six bytes are the station address. They can be read 416 directly since the signature search set up the ROM address 417 counter correctly just before this function. 418
419 For the DE100 we have to be careful about which port is used to 420 read the ROM info. 421 */ 422
423 if (strstr(name,"DE100")!=(char *)NULL) { 424 j = 1;
425 }else{ 426 j = 0;
427 } 428
429 printk("ethernet address ");
430 for (i = 0; i < ETH_ALEN - 1; i++) {/* get the ethernet address */ 431 printk("%2.2x:", dev->dev_addr[i] = inb(DEPCA_PROM + j));
432 } 433 printk("%2.2x", dev->dev_addr[i] = inb(DEPCA_PROM + j));
434
435 for (;i<32;i++) {/* leave ROM counter in known state */ 436 j=inb(DEPCA_PROM);
437 } 438
439 #ifdefHAVE_PORTRESERVE 440 snarf_region(ioaddr, DEPCA_TOTAL_SIZE);
441 #endif 442
443 /* 444 ** Determine the base address for the DEPCA RAM from the NI-CSR 445 ** and make up a DEPCA-specific-data structure. 446 */ 447
448 if (nicsr & BUF) { 449 offset = 0x8000; /* 32kbyte RAM */ 450 nicsr &= ~BS; /* DEPCA RAM in top 32k */ 451 printk(",\n with 32kB RAM");
452 }else{ 453 offset = 0x0000; /* 64kbyte RAM */ 454 printk(",\n with 64kB RAM");
455 } 456
457 mem_start += offset;
458 printk(" starting at 0x%.5lx", mem_start);
459
460 /* 461 ** Enable the shadow RAM. 462 */ 463 nicsr |= SHE;
464 outw(nicsr, DEPCA_NICSR);
465
466 /* 467 ** Calculate the ring size based on the available RAM 468 ** found above. Allocate an equal number of buffers, each 469 ** of size PKT_BUF_SZ (1544 bytes) to the Tx and Rx. Make sure 470 ** that this ring size is <= RING_SIZE. The ring size must be 471 ** a power of 2. 472 */ 473
474 j = ((0x10000 - offset) / PKT_BUF_SZ) >> 1;
475 for (i=0;j>1;i++) { 476 j >>= 1;
477 } 478
479 /* Hold the ring size information here before the depca 480 ** private structure is allocated. Need this for the memory 481 ** space calculations. 482 */ 483 j = 1 << i;
484
485 /* 486 ** Set up memory information in the device structure. 487 ** Align the descriptor rings on an 8 byte (quadword) boundary. 488 ** 489 ** depca_private area 490 ** rx ring descriptors 491 ** tx ring descriptors 492 ** rx buffers 493 ** tx buffers 494 ** 495 */ 496
497 /* private area & initialise */ 498 dev->priv = (void *)((mem_start + 0x07) & ~0x07);
499 lp = (structdepca_private *)dev->priv;
500 memset(dev->priv, 0, sizeof(structdepca_private));
501
502 /* Tx & Rx descriptors (aligned to a quadword boundary) */ 503 mem_start = ((((unsignedlong)dev->priv +
504 sizeof(structdepca_private)) +
505 (unsignedlong)0x07) & (unsignedlong)~0x07);
506 lp->rx_ring = (structdepca_rx_head *)mem_start;
507
508 mem_start += (sizeof(structdepca_rx_head) * j);
509 lp->tx_ring = (structdepca_tx_head *)mem_start;
510
511 mem_start += (sizeof(structdepca_tx_head) * j);
512 lp->dma_buffs = mem_start & 0x00ffffff;
513
514 mem_start += (PKT_BUF_SZ * j);
515 /* (mem_start now points to the start of the Tx buffers) */ 516
517 /* Initialise the data structures */ 518 memset(lp->rx_ring, 0, sizeof(structdepca_rx_head)*j);
519 memset(lp->tx_ring, 0, sizeof(structdepca_tx_head)*j);
520
521 /* This should never happen. */ 522 if ((int)(lp->rx_ring) & 0x07) { 523 printk("\n **ERROR** DEPCA Rx and Tx descriptor rings not on a quadword boundary.\n");
524 return -ENXIO;
525 } 526
527 /* 528 ** Finish initialising the ring information. 529 */ 530 lp->ringSize = j;
531 if (lp->ringSize > RING_SIZE) lp->ringSize = RING_SIZE;
532 lp->rmask = lp->ringSize - 1;
533
534 /* 535 ** calculate the real RLEN size for the descriptors. It is 536 ** log2(ringSize). 537 */ 538 for (i=0, j = lp->ringSize; j>1; i++) { 539 j >>= 1;
540 } 541 lp->rlen = (unsignedlong)(i << 29);
542
543 /* 544 ** load the initialisation block 545 */ 546 depca_init_ring(dev);
547
548 /* 549 ** Initialise the control and status registers 550 */ 551 LoadCSRs(dev);
552
553 /* 554 ** Enable DEPCA board interrupts for autoprobing 555 */ 556 nicsr = ((nicsr & ~IM)|IEN);
557 outw(nicsr, DEPCA_NICSR);
558
559 /* The DMA channel may be passed in on this parameter. */ 560 dev->dma = 0;
561
562 /* To auto-IRQ we enable the initialization-done and DMA err, 563 interrupts. For now we will always get a DMA error. */ 564 if (dev->irq < 2) { 565 autoirq_setup(0);
566
567 /* Trigger an initialization just for the interrupt. */ 568 outw(INEA | INIT, DEPCA_DATA);
569
570 dev->irq = autoirq_report(1);
571 if (dev->irq) { 572 printk(" and probed IRQ%d.\n", dev->irq);
573 }else{ 574 printk(". Failed to detect IRQ line.\n");
575 status = -EAGAIN;
576 } 577 }else{ 578 printk(". Assigned IRQ%d.\n", dev->irq);
579 } 580 }else{ 581 status = -ENXIO;
582 } 583 if (!status) { 584 if (depca_debug > 0) { 585 printk(version);
586 } 587
588 /* The DEPCA-specific entries in the device structure. */ 589 dev->open = &depca_open;
590 dev->hard_start_xmit = &depca_start_xmit;
591 dev->stop = &depca_close;
592 dev->get_stats = &depca_get_stats;
593 #ifdefHAVE_MULTICAST 594 dev->set_multicast_list = &set_multicast_list;
595 #endif 596
597 dev->mem_start = 0;
598
599 /* Fill in the generic field of the device structure. */ 600 for (i = 0; i < DEV_NUMBUFFS; i++) { 601 dev->buffs[i] = NULL;
602 } 603
604 dev->hard_header = eth_header;
605 dev->add_arp = eth_add_arp;
606 dev->queue_xmit = dev_queue_xmit;
607 dev->rebuild_header = eth_rebuild_header;
608 dev->type_trans = eth_type_trans;
609
610 dev->type = ARPHRD_ETHER;
611 dev->hard_header_len = ETH_HLEN;
612 dev->mtu = 1500; /* eth_mtu */ 613 dev->addr_len = ETH_ALEN;
614
615 for (i = 0; i < dev->addr_len; i++) { 616 dev->broadcast[i]=0xff;
617 } 618
619 /* New-style flags. */ 620 dev->flags = IFF_BROADCAST;
621 dev->family = AF_INET;
622 dev->pa_addr = 0;
623 dev->pa_brdaddr = 0;
624 dev->pa_mask = 0;
625 dev->pa_alen = sizeof(unsignedlong);
626 } 627 }else{ 628 status = -ENXIO;
629 } 630
631 returnstatus;
632 } 633
634
635 staticint 636 depca_open(structdevice *dev)
/* */ 637 { 638 structdepca_private *lp = (structdepca_private *)dev->priv;
639 inti,nicsr,ioaddr = dev->base_addr;
640
641 if (request_irq(dev->irq, &depca_interrupt)) { 642 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
643 return -EAGAIN;
644 } 645
646 irq2dev_map[dev->irq] = dev;
647
648 /* 649 ** Stop the DEPCA & get the board status information. 650 */ 651 STOP_DEPCA;
652 nicsr = inw(DEPCA_NICSR);
653
654 /* 655 ** Re-initialize the DEPCA... 656 */ 657 depca_init_ring(dev); /* initialize the descriptor rings */ 658 LoadCSRs(dev);
659
660 if (depca_debug > 1){ 661 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
662 printk("Descriptor head addresses:\n");
663 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring,(long)lp->tx_ring);
664 printk("Descriptor addresses:\n");
665 for (i=0;i<lp->ringSize;i++){ 666 printk("\t0x%8.8lx 0x%8.8lx\n",(long)&lp->rx_ring[i].base,
667 (long)&lp->tx_ring[i].base);
668 } 669 printk("Buffer addresses:\n");
670 for (i=0;i<lp->ringSize;i++){ 671 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring[i].base,
672 (long)lp->tx_ring[i].base);
673 } 674 printk("Initialisation block at 0x%8.8lx\n",(long)&lp->init_block);
675 printk("\tmode: 0x%4.4x\n",lp->init_block.mode);
676 printk("\tphysical address: ");
677 for (i=0;i<6;i++){ 678 printk("%2.2x:",(short)lp->init_block.phys_addr[i]);
679 } 680 printk("\n\tlogical address filter: 0x");
681 for (i=0;i<4;i++){ 682 printk("%2.2x",(short)lp->init_block.filter[i]);
683 } 684 printk("\n\trx_ring at: 0x%8.8lx\n",(long)lp->init_block.rx_ring);
685 printk("\ttx_ring at: 0x%8.8lx\n",(long)lp->init_block.tx_ring);
686 printk("dma_buffs: 0x%8.8lx\n",(long)lp->dma_buffs);
687 printk("Ring size: %d\nMask: 0x%2.2x\nLog2(ringSize): 0x%8.8lx\n",
688 (short)lp->ringSize,
689 (char)lp->rmask,
690 (long)lp->rlen);
691 outw(CSR2,DEPCA_ADDR);
692 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
693 outw(CSR1,DEPCA_ADDR);
694 printk("%4.4x\n",inw(DEPCA_DATA));
695 outw(CSR3,DEPCA_ADDR);
696 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
697 } 698
699 /* 700 ** Enable DEPCA board interrupts 701 */ 702 nicsr = ((nicsr & ~IM & ~LED)|SHE|IEN);
703 outw(nicsr, DEPCA_NICSR);
704 outw(CSR0,DEPCA_ADDR);
705
706 dev->tbusy = 0;
707 dev->interrupt = 0;
708 dev->start = 1;
709
710 InitRestartDepca(dev); /* ignore the return status */ 711
712 if (depca_debug > 1){ 713 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
714 printk("nicsr: 0x%4.4x\n",inw(DEPCA_NICSR));
715 } 716
717 return 0; /* Always succeed */ 718 } 719
720 /* Initialize the lance Rx and Tx descriptor rings. */ 721 staticvoid 722 depca_init_ring(structdevice *dev)
/* */ 723 { 724 structdepca_private *lp = (structdepca_private *)dev->priv;
725 unsignedlongi;
726
727 lp->init_block.mode = DTX | DRX; /* Disable Rx and Tx. */ 728 lp->cur_rx = lp->cur_tx = 0;
729 lp->dirty_rx = lp->dirty_tx = 0;
730
731 /* Initialize the base addresses and length of each buffer in the ring */ 732 for (i = 0; i < lp->ringSize; i++) { 733 lp->rx_ring[i].base = (lp->dma_buffs + i*PKT_BUF_SZ) | R_OWN;
734 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
735 lp->tx_ring[i].base = (lp->dma_buffs + (i+lp->ringSize) * PKT_BUF_SZ) &
736 (unsignedlong)(0x00ffffff);
737 } 738
739 /* Set up the initialization block */ 740 for (i = 0; i < ETH_ALEN; i++) { 741 lp->init_block.phys_addr[i] = dev->dev_addr[i];
742 } 743 for (i = 0; i < 4; i++) { 744 lp->init_block.filter[i] = 0x0000;
745 } 746 lp->init_block.rx_ring = (unsignedlong)lp->rx_ring | lp->rlen;
747 lp->init_block.tx_ring = (unsignedlong)lp->tx_ring | lp->rlen;
748
749 lp->init_block.mode = 0x0000; /* Enable the Tx and Rx */ 750 } 751
752 /* 753 ** Writes a socket buffer to TX descriptor ring and starts transmission 754 */ 755 staticint 756 depca_start_xmit(structsk_buff *skb, structdevice *dev)
/* */ 757 { 758 structdepca_private *lp = (structdepca_private *)dev->priv;
759 intioaddr = dev->base_addr;
760 intstatus = 0;
761
762 /* Transmitter timeout, serious problems. */ 763 if (dev->tbusy) { 764 inttickssofar = jiffies - dev->trans_start;
765 if (tickssofar < 5) { 766 status = -1;
767 }else{ 768 STOP_DEPCA;
769 printk("%s: transmit timed out, status %4.4x, resetting.\n",
770 dev->name, inw(DEPCA_DATA));
771
772 depca_init_ring(dev);
773 LoadCSRs(dev);
774 InitRestartDepca(dev);
775 dev->tbusy=0;
776 dev->trans_start = jiffies;
777 } 778 returnstatus;
779 } 780
781 if (skb == NULL) { 782 dev_tint(dev);
783 return 0;
784 } 785
786 /* Fill in the ethernet header. */ 787 if (!skb->arp && dev->rebuild_header(skb+1, dev)) { 788 skb->dev = dev;
789 arp_queue (skb);
790 return 0;
791 } 792 skb->arp=1;
793
794 if (skb->len <= 0) { 795 return 0;
796 } 797
798 if (depca_debug > 3) { 799 outw(CSR0, DEPCA_ADDR);
800 printk("%s: depca_start_xmit() called, csr0 %4.4x.\n", dev->name,
801 inw(DEPCA_DATA));
802 } 803
804 /* Block a timer-based transmit from overlapping. This could better be 805 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */ 806 if (set_bit(0, (void*)&dev->tbusy) != 0)
807 printk("%s: Transmitter access conflict.\n", dev->name);
808
809 /* 810 ** The TX buffer, skb, has to be copied into the local network RAM 811 ** for the LANCE to access it. The skb may be at > 16MB for large 812 ** (memory) systems. 813 */ 814 {/* Fill in a Tx ring entry */ 815 unsignedchar *buf;
816 intentry = lp->cur_tx++;
817 intlen;
818 longskbL = skb->len;
819 char *p = (char *)(skb + 1);
820
821 entry &= lp->rmask; /* Ring around buffer number. */ 822 buf = (unsignedchar *)(lp->tx_ring[entry].base & 0x00ffffff);
823
824 /* Wait for a full ring to free up */ 825 while (lp->tx_ring[entry].base < 0);
826
827 /* 828 ** Caution: the write order is important here... don't set up the 829 ** ownership rights until all the other information is in place. 830 */ 831 len = ((skbL > PKT_SZ) ? PKT_SZ : skbL); /* skb too long */ 832 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */ 833 skbL -= len;
834 lp->tx_ring[entry].length = -len;
835
836 /* Clears various error flags */ 837 lp->tx_ring[entry].misc = 0x0000;
838
839 /* copy the data from the socket buffer to the net memory */ 840 memcpy((unsignedchar *)(buf), (unsignedchar *)(skb + 1), len);
841
842 /* Hand over buffer ownership to the LANCE */ 843 if (skbL <= 0) lp->tx_ring[entry].base |= (T_ENP);
844 lp->tx_ring[entry].base |= (T_OWN|T_STP);
845
846 /* Trigger an immediate send demand. */ 847 outw(CSR0, DEPCA_ADDR);
848 outw(INEA | TDMD, DEPCA_DATA);
849
850 dev->trans_start = jiffies;
851
852 for (p += len; skbL > 0; p += len) { 853
854 /* Get new buffer pointer */ 855 entry = lp->cur_tx++;
856 entry &= lp->rmask; /* Ring around buffer number. */ 857 buf = (unsignedchar *)(lp->tx_ring[entry].base & 0x00ffffff);
858
859 /* Wait for a full ring to free up */ 860 while (lp->tx_ring[entry].base < 0);
861 dev->tbusy=0;
862
863 /* Copy ethernet header to the new buffer */ 864 memcpy((unsignedchar *)buf, (unsignedchar *)(skb + 1), PKT_HDR_LEN);
865
866 /* Determine length of data buffer */ 867 len = ((skbL > DAT_SZ) ? DAT_SZ : skbL); /* skbL too long */ 868 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */ 869 skbL -= len;
870 lp->tx_ring[entry].length = -len;
871
872 /* Clears various error flags */ 873 lp->tx_ring[entry].misc = 0x0000;
874
875 /* copy the data from the socket buffer to the net memory */ 876 memcpy((unsignedchar *)(buf + PKT_HDR_LEN), (unsignedchar *)p, len);
877
878 /* Hand over buffer ownership to the LANCE */ 879 if (skbL <= 0) lp->tx_ring[entry].base |= T_ENP;
880 lp->tx_ring[entry].base |= T_OWN;
881 } 882
883 if (depca_debug > 4) { 884 unsignedchar *pkt =
885 (unsignedchar *)(lp->tx_ring[entry].base & 0x00ffffff);
886
887 printk("%s: tx ring[%d], %#lx, sk_buf %#lx len %d.\n",
888 dev->name, entry, (unsignedlong) &lp->tx_ring[entry],
889 lp->tx_ring[entry].base, -lp->tx_ring[entry].length);
890 printk("%s: Tx %2.2x %2.2x %2.2x ... %2.2x %2.2x %2.2x %2.2x...%2.2x len %2.2x %2.2x %2.2x %2.2x.\n",
891 dev->name, pkt[0], pkt[1], pkt[2], pkt[5], pkt[6],
892 pkt[7], pkt[8], pkt[11], pkt[12], pkt[13],
893 pkt[14], pkt[15]);
894 } 895
896 /* Check if the TX ring is full or not - 'tbusy' cleared if not full. */ 897 if (lp->tx_ring[(entry+1) & lp->rmask].base >= 0) { 898 dev->tbusy=0;
899 } 900
901 if (skb->free) { 902 kfree_skb (skb, FREE_WRITE);
903 } 904 } 905
906 return 0;
907 } 908
909 /* 910 ** The DEPCA interrupt handler. 911 */ 912 staticvoid 913 depca_interrupt(intreg_ptr)
/* */ 914 { 915 intirq = -(((structpt_regs *)reg_ptr)->orig_eax+2);
916 structdevice *dev = (structdevice *)(irq2dev_map[irq]);
917 structdepca_private *lp;
918 intcsr0, ioaddr, nicsr;
919
920 if (dev == NULL) { 921 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
922 return;
923 }else{ 924 lp = (structdepca_private *)dev->priv;
925 ioaddr = dev->base_addr;
926 } 927
928 if (dev->interrupt)
929 printk("%s: Re-entering the interrupt handler.\n", dev->name);
930
931 dev->interrupt = MASK_INTERRUPTS;
932
933 /* mask the DEPCA board interrupts and turn on the LED */ 934 nicsr = inw(DEPCA_NICSR);
935 nicsr |= (IM|LED);
936 outw(nicsr, DEPCA_NICSR);
937
938 outw(CSR0, DEPCA_ADDR);
939 csr0 = inw(DEPCA_DATA);
940
941 /* Acknowledge all of the current interrupt sources ASAP. */ 942 outw(csr0 & ~(INEA|TDMD|STOP|STRT|INIT), DEPCA_DATA);
943
944 if (depca_debug > 5)
945 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
946 dev->name, csr0, inw(DEPCA_DATA));
947
948 if (csr0 & RINT) /* Rx interrupt (packet arrived) */ 949 depca_rx(dev);
950
951 if (csr0 & TINT) /* Tx interrupt (packet sent) */ 952 depca_tx(dev);
953
954 /* Clear the interrupts we've handled. */ 955 outw(CSR0, DEPCA_ADDR);
956 outw(BABL|CERR|MISS|MERR|RINT|TINT|IDON|INEA, DEPCA_DATA);
957
958 if (depca_debug > 4) { 959 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
960 dev->name, inw(DEPCA_ADDR),
961 inw(DEPCA_DATA));
962 } 963
964 /* Unmask the DEPCA board interrupts and turn off the LED */ 965 nicsr = (nicsr & ~IM & ~LED);
966 outw(nicsr, DEPCA_NICSR);
967
968 dev->interrupt = UNMASK_INTERRUPTS;
969 return;
970 } 971
972 staticint 973 depca_rx(structdevice *dev)
/* */ 974 { 975 structdepca_private *lp = (structdepca_private *)dev->priv;
976 intentry = lp->cur_rx & lp->rmask;
977
978 /* If we own the next entry, it's a new packet. Send it up. */ 979 for (; lp->rx_ring[entry].base >= 0; entry = (++lp->cur_rx) & lp->rmask) { 980 intstatus = lp->rx_ring[entry].base >> 16 ;
981
982 if (status & R_ERR) {/* There was an error. */ 983 lp->stats.rx_errors++; /* Update the error stats. */ 984 if (status & R_FRAM) lp->stats.rx_frame_errors++;
985 if (status & R_OFLO) lp->stats.rx_over_errors++;
986 if (status & R_CRC) lp->stats.rx_crc_errors++;
987 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
988 }else{/* Malloc up new buffer, compatible with net-2e. */ 989 shortpkt_len = lp->rx_ring[entry].msg_length;
990 intsksize = sizeof(structsk_buff) + pkt_len;
991 structsk_buff *skb;
992
993 skb = alloc_skb(sksize, GFP_ATOMIC);
994 if (skb == NULL) { 995 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
996 lp->stats.rx_dropped++; /* Really, deferred. */ 997 break;
998 } 999 skb->mem_len = sksize;
1000 skb->mem_addr = skb;
1001 skb->len = pkt_len;
1002 skb->dev = dev;
1003 memcpy((unsignedchar *)(skb + 1),
1004 (unsignedchar *)(lp->rx_ring[entry].base & 0x00ffffff),
1005 pkt_len);
1006 /* 1007 ** Notify the upper protocol layers that there is another 1008 ** packet to handle1009 */1010 #ifdefHAVE_NETIF_RX1011 netif_rx(skb);
1012 #else1013 skb->lock = 0;
1014 if (dev_rint((unsignedchar*)skb, pkt_len, IN_SKBUFF, dev) != 0) {1015 kfree_skbmem(skb, sksize);
1016 lp->stats.rx_dropped++;
1017 break;
1018 }1019 #endif1020 lp->stats.rx_packets++;
1021 }1022
1023 /* turn over ownership of the current entry back to the LANCE */1024 lp->rx_ring[entry].base |= R_OWN;
1025 }1026
1027 /* 1028 ** We should check that at least two ring entries are free. If not,1029 ** we should free one and mark stats->rx_dropped++. 1030 */1031
1032 return 0;
1033 }1034
1035 /*1036 ** Buffer sent - check for buffer errors.1037 */1038 staticint1039 depca_tx(structdevice *dev)
/* */1040 {1041 structdepca_private *lp = (structdepca_private *)dev->priv;
1042 intdirty_tx = lp->dirty_tx & lp->rmask;
1043
1044 if (depca_debug > 5)
1045 printk("%s: Cleaning tx ring, dirty %d clean %d.\n",
1046 dev->name, dirty_tx, (lp->cur_tx & lp->rmask));
1047
1048 /* 1049 ** While the dirty entry is not the current one AND 1050 ** the LANCE doesn't own it... 1051 */1052 for (; dirty_tx!=(lp->cur_tx & lp->rmask) && lp->tx_ring[dirty_tx].base>0;
1053 dirty_tx = ++lp->dirty_tx & lp->rmask) {1054 unsignedlong *tmdp = (unsignedlong *)(&lp->tx_ring[dirty_tx]);
1055 intstatus = lp->tx_ring[dirty_tx].base >> 16;
1056
1057 if (status < 0) {/* Packet not yet sent! */1058 printk("interrupt for packet not yet sent!\n");
1059 break;
1060 }1061 if (status & T_ERR) {/* There was an major error, log it. */1062 interr_status = lp->tx_ring[dirty_tx].misc;
1063
1064 lp->stats.tx_errors++;
1065 if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1066 if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1067 if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
1068 if (err_status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1069 /* We should re-init() after the FIFO error. */1070 }elseif (status & (T_MORE | T_ONE)) {1071 lp->stats.collisions++;
1072 }else{1073 lp->stats.tx_packets++;
1074 }1075
1076 if (depca_debug > 5)
1077 printk("%s: Tx done entry %d, %4.4lx %4.4lx %4.4lx %4.4lx.\n",
1078 dev->name, dirty_tx,
1079 tmdp[0], tmdp[1], tmdp[2], tmdp[3]);
1080 }1081 /*mark_bh(INET_BH);*/1082 return 0;
1083 }1084
1085 staticint1086 depca_close(structdevice *dev)
/* */1087 {1088 intioaddr = dev->base_addr;
1089
1090 dev->start = 0;
1091 dev->tbusy = 1;
1092
1093 outw(CSR0, DEPCA_ADDR);
1094
1095 if (depca_debug > 1) {1096 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1097 dev->name, inw(DEPCA_DATA));
1098 }1099
1100 /* 1101 ** We stop the DEPCA here -- it occasionally polls1102 ** memory if we don't. 1103 */1104 outw(STOP, DEPCA_DATA);
1105
1106 free_irq(dev->irq);
1107
1108 irq2dev_map[dev->irq] = 0;
1109
1110 return 0;
1111 }1112
1113 staticvoidLoadCSRs(structdevice *dev)
/* */1114 {1115 structdepca_private *lp = (structdepca_private *)dev->priv;
1116 intioaddr = dev->base_addr;
1117
1118 outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */1119 outw((unsignedshort)(unsignedlong)&lp->init_block, DEPCA_DATA);
1120 outw(CSR2, DEPCA_ADDR); /* initialisation block address MSW */1121 outw((unsignedshort)((unsignedlong)&lp->init_block >> 16), DEPCA_DATA);
1122 outw(CSR3, DEPCA_ADDR); /* ALE control */1123 outw(ACON, DEPCA_DATA);
1124 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */1125 }1126
1127 staticintInitRestartDepca(structdevice *dev)
/* */1128 {1129 structdepca_private *lp = (structdepca_private *)dev->priv;
1130 intioaddr = dev->base_addr;
1131 inti, status=0;
1132
1133 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */1134 outw(INIT, DEPCA_DATA); /* initialize DEPCA */1135
1136 /* wait for lance to complete initialisation */1137 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1138
1139 if (i!=100) {1140 /* clear IDON by writing a "1", enable interrupts and start lance */1141 outw(IDON | INEA | STRT, DEPCA_DATA);
1142 if (depca_debug > 2) {1143 printk("%s: DEPCA open after %d ticks, init block %#lx csr0 %4.4x.\n",
1144 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1145 }1146 }else{1147 status = -1;
1148 printk("%s: DEPCA unopened after %d ticks, init block %#lx csr0 %4.4x.\n",
1149 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1150 }1151
1152 returnstatus;
1153 }1154
1155 staticstructenet_statistics *
1156 depca_get_stats(structdevice *dev)
/* */1157 {1158 structdepca_private *lp = (structdepca_private *)dev->priv;
1159
1160 /* Null body since there is no framing error counter */1161
1162 return &lp->stats;
1163 }1164
1165 #ifdefHAVE_MULTICAST1166 /*1167 ** Set or clear the multicast filter for this adaptor.1168 ** num_addrs == -1 Promiscuous mode, receive all packets1169 ** num_addrs == 0 Normal mode, clear multicast list1170 ** num_addrs > 0 Multicast mode, receive normal and MC packets, and do1171 ** best-effort filtering.1172 */1173 staticvoid1174 set_multicast_list(structdevice *dev, intnum_addrs, void *addrs)
/* */1175 {1176 shortioaddr = dev->base_addr;
1177 structdepca_private *lp = (structdepca_private *)dev->priv;
1178
1179 /* We take the simple way out and always enable promiscuous mode. */1180 STOP_DEPCA; /* Temporarily stop the depca. */1181
1182 lp->init_block.mode = PROM; /* Set promiscuous mode */1183 if (num_addrs >= 0) {1184 shortmulticast_table[4];
1185 inti;
1186
1187 SetMulticastFilter(num_addrs, (char *)addrs, (char *)multicast_table);
1188
1189 /* We don't use the multicast table, but rely on upper-layer filtering. */1190 memset(multicast_table, (num_addrs==0) ? 0 : -1, sizeof(multicast_table));
1191
1192 for (i = 0; i < 4; i++) {1193 lp->init_block.filter[i] = multicast_table[i];
1194 }1195 lp->init_block.mode &= ~PROM; /* Unset promiscuous mode */1196 }else{1197 lp->init_block.mode |= PROM; /* Set promiscuous mode */1198 }1199
1200 outw(CSR0, DEPCA_ADDR);
1201 outw(IDON|INEA|STRT, DEPCA_DATA); /* Resume normal operation. */1202 }1203
1204 /*1205 ** Calculate the hash code and update the logical address filter1206 ** from a list of ethernet multicast addresses.1207 ** Derived from a 'C' program in the AMD data book:1208 ** "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)", 1209 ** Pub #17781, Rev. A, May 19931210 */1211 staticvoidSetMulticastFilter(intnum_addrs, char *addrs, char *multicast_table)
/* */1212 {1213 charj, ctrl, bit, octet, hashcode;
1214 shortinti;
1215 longintCRC, poly = (longint) CRC_POLYNOMIAL;
1216
1217 for (i=0;i<num_addrs;i++) {/* for each address in the list */1218 if (((char) *(addrs+ETH_ALEN*i) & 0x01) == 1) {/* is multicast address? */1219 CRC = (longint) 0xffffffff; /* init CRC for each address */1220 for (octet=0;octet<ETH_ALEN;octet++) {/* for each address octet */1221 for(j=0;j<8;j++) {/* process each address bit */1222 bit = (((char)* (addrs+ETH_ALEN*i+octet)) >> j) & 0x01;
1223 ctrl = ((CRC < 0) ? 1 : 0); /* shift the control bit */1224 CRC <<= 1; /* shift the CRC */1225 if (bit ^ ctrl) {/* (bit) XOR (control bit) */1226 CRC ^= poly; /* (CRC) XOR (polynomial) */1227 }1228 }1229 }1230 hashcode = (CRC & 0x00000001); /* hashcode is 6 LSb of CRC ... */1231 for (j=0;j<5;j++) {/* ... in reverse order. */1232 hashcode <<= 1;
1233 CRC >>= 1;
1234 hashcode |= (CRC & 0x00000001);
1235 }1236 octet = hashcode >> 3; /* bit[3-5] -> octet in filter */1237 /* bit[0-2] -> bit in octet */1238 multicast_table[octet] |= (1 << (hashcode & 0x07));
1239 }1240 }1241 return;
1242 }1243
1244 #endif/* HAVE_MULTICAST */1245
1246 /*1247 ** Look for a particular board name in the on-board Remote Diagnostics1248 ** and Boot (RDB) ROM. This will also give us a clue to the network RAM1249 ** base address.1250 */1251 staticchar *DepcaSignature(unsignedlongmem_addr)
/* */1252 {1253 unsignedlongi,j,k;
1254 staticcharsignatures[][DEPCA_NAME_LENGTH] = DEPCA_SIGNATURE;
1255 staticcharthisName[DEPCA_NAME_LENGTH];
1256 chartmpstr[17];
1257
1258 for (i=0;i<16;i++) {/* copy the first 16 bytes of ROM to */1259 tmpstr[i] = *(unsignedchar *)(mem_addr+0xc000+i); /* a temporary string */1260 }1261 tmpstr[i]=(char)NULL;
1262
1263 strcpy(thisName,"");
1264 for (i=0;*signatures[i]!=(char)NULL && *thisName==(char)NULL;i++) {1265 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {1266 if (signatures[i][k] == tmpstr[j]) {/* track signature */1267 k++;
1268 }else{/* lost signature; begin search again */1269 k=0;
1270 }1271 }1272 if (k == strlen(signatures[i])) {1273 strcpy(thisName,signatures[i]);
1274 }1275 }1276
1277 returnthisName; /* return the device name string */1278 }1279
1280 /*1281 ** Look for a special sequence in the Ethernet station address PROM that1282 ** is common across all DEPCA products.1283 */1284
1285 staticintDevicePresent(shortioaddr)
/* */1286 {1287 staticshortfp=1,sigLength=0;
1288 staticchardevSig[] = PROBE_SEQUENCE;
1289 chardata;
1290 inti, j, status = 0;
1291 staticcharasc2hex(charvalue);
1292
1293 /* 1294 ** Convert the ascii signature to a hex equivalent & pack in place 1295 */1296 if (fp) {/* only do this once!... */1297 for (i=0,j=0;devSig[i]!=(char)NULL && !status;i+=2,j++) {1298 if ((devSig[i]=asc2hex(devSig[i]))>=0) {1299 devSig[i]<<=4;
1300 if((devSig[i+1]=asc2hex(devSig[i+1]))>=0){1301 devSig[j]=devSig[i]+devSig[i+1];
1302 }else{1303 status= -1;
1304 }1305 }else{1306 status= -1;
1307 }1308 }1309 sigLength=j;
1310 fp = 0;
1311 }1312
1313 /* 1314 ** Search the Ethernet address ROM for the signature. Since the ROM address1315 ** counter can start at an arbitrary point, the search must include the entire1316 ** probe sequence length plus the length of the (signature - 1).1317 ** Stop the search IMMEDIATELY after the signature is found so that the1318 ** PROM address counter is correctly positioned at the start of the1319 ** ethernet address for later read out.1320 */1321 if (!status) {1322 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {1323 data = inb(ioaddr);
1324 if (devSig[j] == data) {/* track signature */1325 j++;
1326 }else{/* lost signature; begin search again */1327 j=0;
1328 }1329 }1330
1331 if (j!=sigLength) {1332 status = -ENODEV; /* search failed */1333 }1334 }1335
1336 returnstatus;
1337 }1338
1339 staticcharasc2hex(charvalue)
/* */1340 {1341 value -= 0x30; /* normalise to 0..9 range */1342 if (value >= 0) {1343 if (value > 9) {/* but may not be 10..15 */1344 value &= 0x1f; /* make A..F & a..f be the same */1345 value -= 0x07; /* normalise to 10..15 range */1346 if ((value < 0x0a) || (value > 0x0f)) {/* if outside range then... */1347 value = -1; /* ...signal error */1348 }1349 }1350 }else{/* outside 0..9 range... */1351 value = -1; /* ...signal error */1352 }1353 returnvalue; /* return hex char or error */1354 }1355
1356
1357 /*1358 * Local variables:1359 * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c depca.c"1360 * End:1361 */1362
1363
1364