1 /* depca.c: A DIGITAL DEPCA & EtherWORKS ethernet driver for linux. 2
3 Written 1994 by David C. Davies. 4
5
6 Copyright 1994 David C. Davies 7 and 8 United States Government 9 (as represented by the Director, National Security Agency). 10
11
12 This software may be used and distributed according to the terms of 13 the GNU Public License, incorporated herein by reference. 14
15 This driver is written for the Digital Equipment Corporation series 16 of DEPCA and EtherWORKS ethernet cards: 17
18 DEPCA (the original) 19 DE100 20 DE200 Turbo 21 DE201 Turbo 22 DE202 Turbo (TP BNC) 23 DE210 24
25 The driver has been tested on DE100, DE200 and DE202 cards in a 26 relatively busy network. 27
28 This driver will not work for the DE203, DE204 and DE205 series of 29 cards, since they have a new custom ASIC in place of the AMD LANCE chip. 30
31 The author may be reached as davies@wanton.lkg.dec.com or 32 Digital Equipment Corporation, 146 Main Street, Maynard MA 01754. 33
34 ========================================================================= 35 The driver was based on the 'lance.c' driver from Donald Becker which is 36 included with the standard driver distribution for linux. Modifications 37 were made to most routines and the hardware recognition routines were 38 written from scratch. Primary references used were: 39
40 1) Lance.c code in /linux/drivers/net/ 41 2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook", 42 AMD, 1992 [(800) 222-9323]. 43 3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)", 44 AMD, Pub. #17881, May 1993. 45 4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA", 46 AMD, Pub. #16907, May 1992 47 5) "DEC EtherWORKS LC Ethernet Controller Owners Manual", 48 Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003 49 6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual", 50 Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003 51 7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR 52 Digital Equipment Corporation, 1989 53 8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual", 54 Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001 55 56 Peter Bauer's depca.c (V0.5) was referred to when debugging this driver. 57 The hash filter code was derived from Reference 3 and has been tested 58 only to the extent that the Table A-1, page A-7, was confirmed to fill 59 the filter bit positions correctly. Hash filtering is not yet 60 implemented in the current driver set. 61
62 The original DEPCA card requires that the ethernet ROM address counter 63 be enabled to count and has an 8 bit NICSR. The ROM counter enabling is 64 only done when a 0x08 is read as the first address octet (to minimise 65 the chances of writing over some other hardware's I/O register). The 66 size of the NICSR is tested by a word read: if both bytes are the same, 67 the register is 8 bits wide. Also, there is a maximum of only 48kB 68 network RAM for this card. My thanks to Torbjorn Lindh for help 69 debugging all this (and holding my feet to the fire until I got it 70 right). 71
72 The DE200 series boards have on-board 64kB RAM for use as a shared 73 memory network buffer. Only the DE100 cards make use of a 2kB buffer 74 mode which has not been implemented in this driver (only the 32kB and 75 64kB modes are supported [16kB/48kB for the original DEPCA]). 76
77 At the most only 2 DEPCA cards can be supported because there is only 78 provision for two I/O base addresses on the cards (0x300 and 0x200). The 79 base address is 'autoprobed' by looking for the self test PROM and 80 detecting the card name. The shared memory base address is decoded by 81 'autoprobing' the Ethernet PROM address information. The second DEPCA is 82 detected and information placed in the base_addr variable of the next 83 device structure (which is created if necessary), thus enabling 84 ethif_probe initialization for the device. 85
86 ************************************************************************ 87
88 NOTE: If you are using two DEPCAs, it is important that you assign the 89 base memory addresses correctly. The driver autoprobes I/O 0x300 then 90 0x200. The base memory address for the first device must be less than 91 that of the second so that the auto probe will correctly assign the I/O 92 and memory addresses on the same card. I can't think of a way to do 93 this unambiguously at the moment, since there is nothing on the cards to 94 tie I/O and memory information together. 95
96 I am unable to test 2 cards together for now, so this code is 97 unchecked. All reports, good or bad, are welcome. 98
99 ************************************************************************ 100
101 The board IRQ setting must be at an unused IRQ which is auto-probed 102 using Donald Becker's autoprobe routines. DEPCA and DE100 board IRQs are 103 {2,3,4,5,7}, whereas the DE200 is at {5,9,10,11,15}. Note that IRQ2 is 104 really IRQ9 in machines with 16 IRQ lines. 105
106 No 16MB memory limitation should exist with this driver as DMA is not 107 used and the common memory area is in low memory on the network card (my 108 current system has 20MB and I've not had problems yet). 109
110 TO DO: 111 ------ 112
113 1. Implement the 2k buffer mode - does anyone need it?? 114
115 Revision History 116 ---------------- 117
118 Version Date Description 119 120 0.1 25-jan-94 Initial writing. 121 0.2 27-jan-94 Added LANCE TX buffer chaining. 122 0.3 1-feb-94 Added multiple DEPCA support. 123 0.31 4-feb-94 Added DE202 recognition. 124 0.32 19-feb-94 Tidy up. Improve multi-DEPCA support. 125 0.33 25-feb-94 Fix DEPCA ethernet ROM counter enable. 126 Add jabber packet fix from murf@perftech.com 127 and becker@super.org 128 0.34 7-mar-94 Fix DEPCA max network memory RAM & NICSR access. 129 0.35 8-mar-94 Added DE201 recognition. 130
131 ========================================================================= 132 */ 133
134 staticchar *version = "depca.c:v0.35 3/8/94 davies@wanton.lkg.dec.com\n";
135
136 #include <stdarg.h>
137 #include <linux/config.h>
138 #include <linux/kernel.h>
139 #include <linux/sched.h>
140 #include <linux/string.h>
141 #include <linux/ptrace.h>
142 #include <linux/errno.h>
143 #include <linux/ioport.h>
144 #include <linux/malloc.h>
145 #include <linux/interrupt.h>
146 #include <asm/bitops.h>
147 #include <asm/io.h>
148 #include <asm/dma.h>
149
150 #include <linux/netdevice.h>
151 #include "iow.h" /* left in for pl13/14 compatibility... */ 152 #include <linux/etherdevice.h>
153 #include <linux/skbuff.h>
154 #include "depca.h"
155
156 #ifdefDEPCA_DEBUG 157 intdepca_debug = DEPCA_DEBUG;
158 #else 159 intdepca_debug = 1;
160 #endif 161
162 #ifndefDEPCA_IRQ 163 /*#define DEPCA_IRQ {5,9,10,11,15,0}*/ 164 #defineDEPCA_IRQ 5
165 #endif 166
167 #ifndefPROBE_LENGTH 168 #definePROBE_LENGTH 32
169 #endif 170
171 #ifndefPROBE_SEQUENCE 172 #definePROBE_SEQUENCE "FF0055AAFF0055AA"
173 #endif 174
175 #ifndefDEPCA_SIGNATURE 176 #defineDEPCA_SIGNATURE{"DEPCA","DE100","DE200","DE201","DE202","DE210",""} 177 #defineDEPCA_NAME_LENGTH 8
178 #endif 179
180 #ifndefDEPCA_RAM_BASE_ADDRESSES 181 #defineDEPCA_RAM_BASE_ADDRESSES{0xc0000,0xd0000,0xe0000,0x00000} 182 #endif 183 staticshortmem_chkd = 0; /* holds which base addrs have been */ 184 /* checked, for multi-DEPCA case */ 185
186 #ifndefDEPCA_IO_PORTS 187 #defineDEPCA_IO_PORTS{0x300, 0x200, 0} 188 #endif 189
190 #ifndefDEPCA_TOTAL_SIZE 191 #defineDEPCA_TOTAL_SIZE 0x10
192 #endif 193
194 #ifndefMAX_NUM_DEPCAS 195 #defineMAX_NUM_DEPCAS 2
196 #endif 197
198 /* 199 ** Set the number of Tx and Rx buffers. 200 */ 201 #ifndef DEPCA_BUFFER_LOG_SZ
202 #defineRING_SIZE 16 /* 16 buffers */ 203 #else 204 #defineRING_SIZE (1 << (DEPCA_BUFFERS_LOG_SZ))
205 #endif/* DEPCA_BUFFER_LOG_SZ */ 206
207 #definePKT_BUF_SZ 1544 /* Buffer size for each Tx/Rx buffer */ 208 #definePKT_SZ 1514 /* Maximum ethernet packet length */ 209 #defineDAT_SZ 1500 /* Maximum ethernet data length */ 210 #definePKT_HDR_LEN 14 /* Addresses and data length info */ 211
212 #ifdefHAVE_MULTICAST 213 #ifndefCRC_POLYNOMIAL 214 #defineCRC_POLYNOMIAL 0x04c11db7 /* Ethernet CRC polynomial */ 215 #endif/* CRC_POLYNOMIAL */ 216 #endif/* HAVE_MULTICAST */ 217
218 /* 219 ** The DEPCA Rx and Tx ring descriptors. 220 */ 221 structdepca_rx_head{ 222 longbase;
223 shortbuf_length; /* This length is negative 2's complement! */ 224 shortmsg_length; /* This length is "normal". */ 225 };
226
227 structdepca_tx_head{ 228 longbase;
229 shortlength; /* This length is negative 2's complement! */ 230 shortmisc; /* Errors and TDR info */ 231 };
232
233 struct depca_ring_info { 234 };
235
236 /* 237 ** The Lance initialization block, described in databook, in common memory. 238 */ 239 structdepca_init{ 240 unsignedshortmode; /* Mode register */ 241 unsignedcharphys_addr[ETH_ALEN]; /* Physical ethernet address */ 242 unsignedshortfilter[4]; /* Multicast filter. */ 243 unsignedlongrx_ring; /* Rx ring base pointer & ring length */ 244 unsignedlongtx_ring; /* Tx ring base pointer & ring length */ 245 };
246
247 structdepca_private{ 248 chardevname[8]; /* Not used */ 249 structdepca_rx_head *rx_ring; /* Pointer to start of RX descriptor ring */ 250 structdepca_tx_head *tx_ring; /* Pointer to start of TX descriptor ring */ 251 structdepca_initinit_block;/* Initialization block */ 252 longdma_buffs; /* Start address of Rx and Tx buffers. */ 253 intcur_rx, cur_tx; /* The next free ring entry */ 254 intdirty_rx, dirty_tx; /* The ring entries to be free()ed. */ 255 intdma;
256 structenet_statisticsstats;
257 chardepca_na; /* NICSR access width: 0=>byte, 1=>word */ 258 shortringSize; /* ring size based on available memory */ 259 shortrmask; /* modulus mask based on ring size */ 260 longrlen; /* log2(ringSize) for the descriptors */ 261 };
262
263 /* 264 ** Public Functions 265 */ 266 staticintdepca_open(structdevice *dev);
267 staticintdepca_start_xmit(structsk_buff *skb, structdevice *dev);
268 staticvoiddepca_interrupt(intreg_ptr);
269 staticintdepca_close(structdevice *dev);
270 staticstructenet_statistics *depca_get_stats(structdevice *dev);
271 #ifdefHAVE_MULTICAST 272 staticvoidset_multicast_list(structdevice *dev, intnum_addrs, void *addrs);
273 #endif 274
275 /* 276 ** Private functions 277 */ 278 staticintdepca_probe1(structdevice *dev, shortioaddr);
279 staticvoiddepca_init_ring(structdevice *dev);
280 staticintdepca_rx(structdevice *dev);
281 staticintdepca_tx(structdevice *dev);
282
283 staticvoidLoadCSRs(structdevice *dev);
284 staticintInitRestartDepca(structdevice *dev);
285 staticchar *DepcaSignature(unsignedlongmem_addr);
286 staticintDevicePresent(shortioaddr);
287 #ifdefHAVE_MULTICAST 288 staticvoidSetMulticastFilter(intnum_addrs, char *addrs, char *multicast_table);
289 #endif 290
291 staticintdepca_na;
292 staticintnum_depcas = 0, num_eth = 0;;
293
294 /* 295 ** Miscellaneous defines... 296 */ 297 #defineSTOP_DEPCA \
298 outw(CSR0, DEPCA_ADDR);\
299 outw(STOP, DEPCA_DATA)
300
301 #defineGET_NICSR(a,b) \
302 if (depca_na) { \
303 (a) = inw((b)); \
304 }else{ \
305 (a) = inb((b)); \
306 } 307
308 #definePUT_NICSR(a,b) \
309 if (depca_na) { \
310 outw((a), (b)); \
311 }else{ \
312 outb((a), (b)); \
313 } 314
315
316
317
318 intdepca_probe(structdevice *dev)
/* */ 319 { 320 int *port, ports[] = DEPCA_IO_PORTS;
321 intbase_addr = dev->base_addr;
322 intstatus;
323 structdevice *eth0 = (structdevice *) NULL;
324
325 if (base_addr > 0x1ff) {/* Check a single specified location. */ 326 status = -ENODEV;
327 if (DevicePresent(base_addr) == 0) {/* Is DEPCA really here? */ 328 status = depca_probe1(dev, base_addr);
329 } 330 }elseif (base_addr > 0) {/* Don't probe at all. */ 331 status = -ENXIO;
332 }else{/* First probe for the DEPCA test */ 333 /* pattern in ROM */ 334
335 for (status = -ENODEV, port = &ports[0];
336 *port && (num_depcas < MAX_NUM_DEPCAS); port++) { 337 intioaddr = *port;
338
339 #ifdefHAVE_PORTRESERVE 340 if (check_region(ioaddr, DEPCA_TOTAL_SIZE))
341 continue;
342 #endif 343 if (DevicePresent(ioaddr) == 0) { 344 if (num_depcas > 0) {/* only gets here in autoprobe */ 345
346 /* 347 ** Check the device structures for an end of list or unused device 348 */ 349 while (dev->next != (structdevice *)NULL) { 350 if (dev->next->base_addr == 0xffe0) break;
351 dev = dev->next; /* walk through eth device list */ 352 num_eth++; /* increment eth device number */ 353 } 354
355 /* 356 ** If no more device structures, malloc one up. If memory could 357 ** not be allocated, print an error message. 358 ** 359 */ 360 if (dev->next == (structdevice *)NULL) { 361 dev->next = (structdevice *)kmalloc(sizeof(structdevice) + 8,
362 GFP_KERNEL);
363 }else{ 364 printk("eth%d: Device not initialised, insufficient memory\n",
365 num_eth);
366 } 367
368 /* 369 ** If the memory was allocated, point to the new memory area 370 ** and initialize it (name, I/O address, next device (NULL) and 371 ** initialisation probe routine). 372 */ 373 if ((dev->next != (structdevice *)NULL) &&
374 (num_eth > 0) && (num_eth < 9999)) { 375 dev = dev->next; /* point to the new device */ 376 dev->name = (char *)(dev + sizeof(structdevice));
377 sprintf(dev->name,"eth%d", num_eth); /* New device name */ 378 dev->base_addr = ioaddr; /* assign the io address */ 379 dev->next = (structdevice *)NULL; /* mark the end of list */ 380 dev->init = &depca_probe;/* initialisation routine */ 381 } 382 }else{ 383 eth0 = dev; /* remember the first device */ 384 status = depca_probe1(dev, ioaddr);
385 } 386 num_depcas++;
387 num_eth++;
388 } 389 } 390 if (eth0) dev = eth0; /* restore the first device */ 391 } 392
393 if (status) dev->base_addr = base_addr;
394
395 returnstatus; /* ENODEV would be more accurate. */ 396 } 397
398 staticint 399 depca_probe1(structdevice *dev, shortioaddr)
/* */ 400 { 401 structdepca_private *lp;
402 inti,j, status=0;
403 unsignedlongmem_start, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
404 char *name=(char *)NULL;
405 unsignedintnicsr, offset, netRAM;
406
407
408 /* 409 ** Stop the DEPCA. Enable the DBR ROM and the ethernet ROM address counter 410 ** (for the really old DEPCAs). Disable interrupts and remote boot. 411 */ 412 STOP_DEPCA;
413
414 GET_NICSR(nicsr, DEPCA_NICSR);
415 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | AAC | IM);
416 PUT_NICSR(nicsr, DEPCA_NICSR);
417
418 if (inw(DEPCA_DATA) == STOP) { 419
420 /* Now find out what kind of DEPCA we have. The DE100 uses a different 421 ** addressing scheme for some registers compared to the DE2xx series. 422 ** Note that a base address location is marked as checked if no DEPCA is 423 ** there or one is found (when the search is immediately terminated). This 424 ** shortens the search time a little for multiple DEPCAs. 425 */ 426
427 for (j = 0, i = 0; mem_base[i] && (j == 0);) { 428 if (((mem_chkd >> i) & 0x01) == 0) {/* has the memory been checked? */ 429 name = DepcaSignature(mem_base[i]);/* check for a DEPCA here */ 430 mem_chkd |= (0x01 << i); /* mark location checked */ 431 if (*name != (char)NULL) {/* one found? */ 432 j = 1; /* set exit flag */ 433 }else{ 434 i++; /* increment search index */ 435 } 436 } 437 } 438
439 if (*name != (char)NULL) {/* found a DEPCA device */ 440 mem_start = mem_base[i];
441 dev->base_addr = ioaddr;
442
443 printk("%s: DEPCA at %#3x is a %s, ", dev->name, ioaddr, name);
444
445 /* There is a 32 byte station address PROM at DEPCA_PROM address. 446 The first six bytes are the station address. They can be read 447 directly since the signature search set up the ROM address 448 counter correctly just before this function. 449
450 For the DE100 we have to be careful about which port is used to 451 read the ROM info. 452 */ 453
454 if (strstr(name,"DE100")!=(char *)NULL) { 455 j = 1;
456 }else{ 457 j = 0;
458 } 459
460 printk("ethernet address ");
461 for (i = 0; i < ETH_ALEN - 1; i++) {/* get the ethernet address */ 462 printk("%2.2x:", dev->dev_addr[i] = inb(DEPCA_PROM + j));
463 } 464 printk("%2.2x", dev->dev_addr[i] = inb(DEPCA_PROM + j));
465
466 for (;i<32;i++) {/* leave ROM counter in known state */ 467 j=inb(DEPCA_PROM);
468 } 469
470 #ifdefHAVE_PORTRESERVE 471 snarf_region(ioaddr, DEPCA_TOTAL_SIZE);
472 #endif 473
474 /* 475 ** Set up the maximum amount of network RAM(kB) 476 */ 477 if (strstr(name,"DEPCA")==(char *)NULL) { 478 netRAM=64;
479 }else{ 480 netRAM=48;
481 } 482
483 /* 484 ** Determine the base address for the DEPCA RAM from the NI-CSR 485 ** and make up a DEPCA-specific-data structure. 486 */ 487
488 if (nicsr & BUF) { 489 offset = 0x8000; /* 32kbyte RAM offset*/ 490 nicsr &= ~BS; /* DEPCA RAM in top 32k */ 491 printk(",\n with %dkB RAM", netRAM-(offset >> 10));
492 }else{ 493 offset = 0x0000; /* 64k/48k bytes RAM */ 494 printk(",\n with %dkB RAM", netRAM);
495 } 496
497 mem_start += offset;
498 printk(" starting at 0x%.5lx", mem_start);
499
500 /* 501 ** Enable the shadow RAM. 502 */ 503 nicsr |= SHE;
504 PUT_NICSR(nicsr, DEPCA_NICSR);
505
506 /* 507 ** Calculate the ring size based on the available RAM 508 ** found above. Allocate an equal number of buffers, each 509 ** of size PKT_BUF_SZ (1544 bytes) to the Tx and Rx, allowing one 510 ** descriptor entry (8 bytes) for each buffer. Make sure 511 ** that this ring size is <= RING_SIZE. The ring size must be 512 ** a power of 2. 513 */ 514
515 j = (((netRAM << 10) - offset - sizeof(structdepca_private)) /
516 (PKT_BUF_SZ + 8)) >> 1;
517 for (i=0;j>1;i++) { 518 j >>= 1;
519 } 520
521 /* Hold the ring size information here before the depca 522 ** private structure is allocated. Need this for the memory 523 ** space calculations. 524 */ 525 j = 1 << i;
526
527 /* 528 ** Set up memory information in the device structure. 529 ** Align the descriptor rings on an 8 byte (quadword) boundary. 530 ** 531 ** depca_private area 532 ** rx ring descriptors 533 ** tx ring descriptors 534 ** rx buffers 535 ** tx buffers 536 ** 537 */ 538
539 /* private area & initialise */ 540 dev->priv = (void *)((mem_start + 0x07) & ~0x07);
541 lp = (structdepca_private *)dev->priv;
542 memset(dev->priv, 0, sizeof(structdepca_private));
543
544 /* Tx & Rx descriptors (aligned to a quadword boundary) */ 545 mem_start = ((((unsignedlong)dev->priv +
546 sizeof(structdepca_private)) +
547 (unsignedlong)0x07) & (unsignedlong)~0x07);
548 lp->rx_ring = (structdepca_rx_head *)mem_start;
549
550 mem_start += (sizeof(structdepca_rx_head) * j);
551 lp->tx_ring = (structdepca_tx_head *)mem_start;
552
553 mem_start += (sizeof(structdepca_tx_head) * j);
554 lp->dma_buffs = mem_start & 0x00ffffff;
555
556 mem_start += (PKT_BUF_SZ * j);
557 /* (mem_start now points to the start of the Tx buffers) */ 558
559 /* Initialise the data structures */ 560 memset(lp->rx_ring, 0, sizeof(structdepca_rx_head)*j);
561 memset(lp->tx_ring, 0, sizeof(structdepca_tx_head)*j);
562
563 /* This should never happen. */ 564 if ((int)(lp->rx_ring) & 0x07) { 565 printk("\n **ERROR** DEPCA Rx and Tx descriptor rings not on a quadword boundary.\n");
566 return -ENXIO;
567 } 568
569 /* 570 ** Finish initialising the ring information. 571 */ 572 lp->ringSize = j;
573 if (lp->ringSize > RING_SIZE) lp->ringSize = RING_SIZE;
574 lp->rmask = lp->ringSize - 1;
575
576 /* 577 ** calculate the real RLEN size for the descriptors. It is 578 ** log2(ringSize). 579 */ 580 for (i=0, j = lp->ringSize; j>1; i++) { 581 j >>= 1;
582 } 583 lp->rlen = (unsignedlong)(i << 29);
584
585 /* 586 ** load the initialisation block 587 */ 588 depca_init_ring(dev);
589
590 /* 591 ** Initialise the control and status registers 592 */ 593 LoadCSRs(dev);
594
595 /* 596 ** Store the NICSR width for this DEPCA 597 */ 598 lp->depca_na = depca_na;
599
600 /* 601 ** Enable DEPCA board interrupts for autoprobing 602 */ 603 nicsr = ((nicsr & ~IM)|IEN);
604 PUT_NICSR(nicsr, DEPCA_NICSR);
605
606 /* The DMA channel may be passed in on this parameter. */ 607 dev->dma = 0;
608
609 /* To auto-IRQ we enable the initialization-done and DMA err, 610 interrupts. For now we will always get a DMA error. */ 611 if (dev->irq < 2) { 612 autoirq_setup(0);
613
614 /* Trigger an initialization just for the interrupt. */ 615 outw(INEA | INIT, DEPCA_DATA);
616
617 dev->irq = autoirq_report(1);
618 if (dev->irq) { 619 printk(" and probed IRQ%d.\n", dev->irq);
620 }else{ 621 printk(". Failed to detect IRQ line.\n");
622 status = -EAGAIN;
623 } 624 }else{ 625 printk(". Assigned IRQ%d.\n", dev->irq);
626 } 627 }else{ 628 status = -ENXIO;
629 } 630 if (!status) { 631 if (depca_debug > 0) { 632 printk(version);
633 } 634
635 /* The DEPCA-specific entries in the device structure. */ 636 dev->open = &depca_open;
637 dev->hard_start_xmit = &depca_start_xmit;
638 dev->stop = &depca_close;
639 dev->get_stats = &depca_get_stats;
640 #ifdefHAVE_MULTICAST 641 dev->set_multicast_list = &set_multicast_list;
642 #endif 643
644 dev->mem_start = 0;
645
646 /* Fill in the generic field of the device structure. */ 647 ether_setup(dev);
648 } 649 }else{ 650 status = -ENXIO;
651 } 652
653 returnstatus;
654 } 655
656
657 staticint 658 depca_open(structdevice *dev)
/* */ 659 { 660 structdepca_private *lp = (structdepca_private *)dev->priv;
661 inti,nicsr,ioaddr = dev->base_addr;
662
663 if (request_irq(dev->irq, &depca_interrupt)) { 664 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
665 return -EAGAIN;
666 } 667
668 irq2dev_map[dev->irq] = dev;
669
670 /* 671 ** Stop the DEPCA & get the board status information. 672 */ 673 depca_na=lp->depca_na;
674 STOP_DEPCA;
675 GET_NICSR(nicsr, DEPCA_NICSR);
676
677 /* 678 ** Re-initialize the DEPCA... 679 */ 680 depca_init_ring(dev); /* initialize the descriptor rings */ 681 LoadCSRs(dev);
682
683 if (depca_debug > 1){ 684 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
685 printk("Descriptor head addresses:\n");
686 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring,(long)lp->tx_ring);
687 printk("Descriptor addresses:\n");
688 for (i=0;i<lp->ringSize;i++){ 689 printk("\t0x%8.8lx 0x%8.8lx\n",(long)&lp->rx_ring[i].base,
690 (long)&lp->tx_ring[i].base);
691 } 692 printk("Buffer addresses:\n");
693 for (i=0;i<lp->ringSize;i++){ 694 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring[i].base,
695 (long)lp->tx_ring[i].base);
696 } 697 printk("Initialisation block at 0x%8.8lx\n",(long)&lp->init_block);
698 printk("\tmode: 0x%4.4x\n",lp->init_block.mode);
699 printk("\tphysical address: ");
700 for (i=0;i<6;i++){ 701 printk("%2.2x:",(short)lp->init_block.phys_addr[i]);
702 } 703 printk("\n\tlogical address filter: 0x");
704 for (i=0;i<4;i++){ 705 printk("%2.2x",(short)lp->init_block.filter[i]);
706 } 707 printk("\n\trx_ring at: 0x%8.8lx\n",(long)lp->init_block.rx_ring);
708 printk("\ttx_ring at: 0x%8.8lx\n",(long)lp->init_block.tx_ring);
709 printk("dma_buffs: 0x%8.8lx\n",(long)lp->dma_buffs);
710 printk("Ring size: %d\nMask: 0x%2.2x\nLog2(ringSize): 0x%8.8lx\n",
711 (short)lp->ringSize,
712 (char)lp->rmask,
713 (long)lp->rlen);
714 outw(CSR2,DEPCA_ADDR);
715 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
716 outw(CSR1,DEPCA_ADDR);
717 printk("%4.4x\n",inw(DEPCA_DATA));
718 outw(CSR3,DEPCA_ADDR);
719 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
720 } 721
722 /* 723 ** Enable DEPCA board interrupts 724 */ 725 nicsr = ((nicsr & ~IM & ~LED)|SHE|IEN);
726 PUT_NICSR(nicsr, DEPCA_NICSR);
727 outw(CSR0,DEPCA_ADDR);
728
729 dev->tbusy = 0;
730 dev->interrupt = 0;
731 dev->start = 1;
732
733 InitRestartDepca(dev); /* ignore the return status */ 734
735 if (depca_debug > 1){ 736 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
737 GET_NICSR(nicsr, DEPCA_NICSR);
738 printk("nicsr: 0x%4.4x\n",nicsr);
739 } 740
741 return 0; /* Always succeed */ 742 } 743
744 /* Initialize the lance Rx and Tx descriptor rings. */ 745 staticvoid 746 depca_init_ring(structdevice *dev)
/* */ 747 { 748 structdepca_private *lp = (structdepca_private *)dev->priv;
749 unsignedlongi;
750
751 lp->init_block.mode = DTX | DRX; /* Disable Rx and Tx. */ 752 lp->cur_rx = lp->cur_tx = 0;
753 lp->dirty_rx = lp->dirty_tx = 0;
754
755 /* Initialize the base addresses and length of each buffer in the ring */ 756 for (i = 0; i < lp->ringSize; i++) { 757 lp->rx_ring[i].base = (lp->dma_buffs + i*PKT_BUF_SZ) | R_OWN;
758 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
759 lp->tx_ring[i].base = (lp->dma_buffs + (i+lp->ringSize) * PKT_BUF_SZ) &
760 (unsignedlong)(0x00ffffff);
761 } 762
763 /* Set up the initialization block */ 764 for (i = 0; i < ETH_ALEN; i++) { 765 lp->init_block.phys_addr[i] = dev->dev_addr[i];
766 } 767 for (i = 0; i < 4; i++) { 768 lp->init_block.filter[i] = 0x0000;
769 } 770 lp->init_block.rx_ring = (unsignedlong)lp->rx_ring | lp->rlen;
771 lp->init_block.tx_ring = (unsignedlong)lp->tx_ring | lp->rlen;
772
773 lp->init_block.mode = 0x0000; /* Enable the Tx and Rx */ 774 } 775
776 /* 777 ** Writes a socket buffer to TX descriptor ring and starts transmission 778 */ 779 staticint 780 depca_start_xmit(structsk_buff *skb, structdevice *dev)
/* */ 781 { 782 structdepca_private *lp = (structdepca_private *)dev->priv;
783 intioaddr = dev->base_addr;
784 intstatus = 0;
785
786 /* Transmitter timeout, serious problems. */ 787 if (dev->tbusy) { 788 inttickssofar = jiffies - dev->trans_start;
789 if (tickssofar < 10) { 790 status = -1;
791 }else{ 792 STOP_DEPCA;
793 printk("%s: transmit timed out, status %4.4x, resetting.\n",
794 dev->name, inw(DEPCA_DATA));
795
796 depca_init_ring(dev);
797 LoadCSRs(dev);
798 InitRestartDepca(dev);
799 dev->tbusy=0;
800 dev->trans_start = jiffies;
801 } 802 returnstatus;
803 } 804
805 if (skb == NULL) { 806 dev_tint(dev);
807 return 0;
808 } 809
810 if (skb->len <= 0) { 811 return 0;
812 } 813
814 if (depca_debug > 3) { 815 outw(CSR0, DEPCA_ADDR);
816 printk("%s: depca_start_xmit() called, csr0 %4.4x.\n", dev->name,
817 inw(DEPCA_DATA));
818 } 819
820 /* Block a timer-based transmit from overlapping. This could better be 821 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */ 822 if (set_bit(0, (void*)&dev->tbusy) != 0)
823 printk("%s: Transmitter access conflict.\n", dev->name);
824
825 /* 826 ** The TX buffer, skb, has to be copied into the local network RAM 827 ** for the LANCE to access it. The skb may be at > 16MB for large 828 ** (memory) systems. 829 */ 830 {/* Fill in a Tx ring entry */ 831 unsignedchar *buf;
832 intentry = lp->cur_tx++;
833 intlen;
834 longskbL = skb->len;
835 char *p = (char *) skb->data;
836
837 entry &= lp->rmask; /* Ring around buffer number. */ 838 buf = (unsignedchar *)(lp->tx_ring[entry].base & 0x00ffffff);
839
840 /* Wait for a full ring to free up */ 841 while (lp->tx_ring[entry].base < 0);
842
843 /* 844 ** Caution: the write order is important here... don't set up the 845 ** ownership rights until all the other information is in place. 846 */ 847 len = ((skbL > PKT_SZ) ? PKT_SZ : skbL); /* skb too long */ 848 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */ 849 skbL -= len;
850 lp->tx_ring[entry].length = -len;
851
852 /* Clears various error flags */ 853 lp->tx_ring[entry].misc = 0x0000;
854
855 /* copy the data from the socket buffer to the net memory */ 856 memcpy((unsignedchar *)(buf), skb->data, len);
857
858 /* Hand over buffer ownership to the LANCE */ 859 if (skbL <= 0) lp->tx_ring[entry].base |= (T_ENP);
860 lp->tx_ring[entry].base |= (T_OWN|T_STP);
861
862 /* Trigger an immediate send demand. */ 863 outw(CSR0, DEPCA_ADDR);
864 outw(INEA | TDMD, DEPCA_DATA);
865
866 dev->trans_start = jiffies;
867
868 for (p += len; skbL > 0; p += len) { 869
870 /* Get new buffer pointer */ 871 entry = lp->cur_tx++;
872 entry &= lp->rmask; /* Ring around buffer number. */ 873 buf = (unsignedchar *)(lp->tx_ring[entry].base & 0x00ffffff);
874
875 /* Wait for a full ring to free up */ 876 while (lp->tx_ring[entry].base < 0);
877 dev->tbusy=0;
878
879 /* Copy ethernet header to the new buffer */ 880 memcpy((unsignedchar *)buf, skb->data, PKT_HDR_LEN);
881
882 /* Determine length of data buffer */ 883 len = ((skbL > DAT_SZ) ? DAT_SZ : skbL); /* skbL too long */ 884 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */ 885 skbL -= len;
886 lp->tx_ring[entry].length = -len;
887
888 /* Clears various error flags */ 889 lp->tx_ring[entry].misc = 0x0000;
890
891 /* copy the data from the socket buffer to the net memory */ 892 memcpy((unsignedchar *)(buf + PKT_HDR_LEN), (unsignedchar *)p, len);
893
894 /* Hand over buffer ownership to the LANCE */ 895 if (skbL <= 0) lp->tx_ring[entry].base |= T_ENP;
896 lp->tx_ring[entry].base |= T_OWN;
897 } 898
899 if (depca_debug > 4) { 900 unsignedchar *pkt =
901 (unsignedchar *)(lp->tx_ring[entry].base & 0x00ffffff);
902
903 printk("%s: tx ring[%d], %#lx, sk_buf %#lx len %d.\n",
904 dev->name, entry, (unsignedlong) &lp->tx_ring[entry],
905 lp->tx_ring[entry].base, -lp->tx_ring[entry].length);
906 printk("%s: Tx %2.2x %2.2x %2.2x ... %2.2x %2.2x %2.2x %2.2x...%2.2x len %2.2x %2.2x %2.2x %2.2x.\n",
907 dev->name, pkt[0], pkt[1], pkt[2], pkt[5], pkt[6],
908 pkt[7], pkt[8], pkt[11], pkt[12], pkt[13],
909 pkt[14], pkt[15]);
910 } 911
912 /* Check if the TX ring is full or not - 'tbusy' cleared if not full. */ 913 if (lp->tx_ring[(entry+1) & lp->rmask].base >= 0) { 914 dev->tbusy=0;
915 } 916
917 if (skb->free) { 918 kfree_skb (skb, FREE_WRITE);
919 } 920 } 921
922 return 0;
923 } 924
925 /* 926 ** The DEPCA interrupt handler. 927 */ 928 staticvoid 929 depca_interrupt(intreg_ptr)
/* */ 930 { 931 intirq = -(((structpt_regs *)reg_ptr)->orig_eax+2);
932 structdevice *dev = (structdevice *)(irq2dev_map[irq]);
933 structdepca_private *lp;
934 intcsr0, ioaddr, nicsr;
935
936 if (dev == NULL) { 937 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
938 return;
939 }else{ 940 lp = (structdepca_private *)dev->priv;
941 ioaddr = dev->base_addr;
942 depca_na = lp->depca_na;
943 } 944
945 if (dev->interrupt)
946 printk("%s: Re-entering the interrupt handler.\n", dev->name);
947
948 dev->interrupt = MASK_INTERRUPTS;
949
950 /* mask the DEPCA board interrupts and turn on the LED */ 951 GET_NICSR(nicsr, DEPCA_NICSR);
952 nicsr |= (IM|LED);
953 PUT_NICSR(nicsr, DEPCA_NICSR);
954
955 outw(CSR0, DEPCA_ADDR);
956 csr0 = inw(DEPCA_DATA);
957
958 /* Acknowledge all of the current interrupt sources ASAP. */ 959 outw(csr0 & ~(INEA|TDMD|STOP|STRT|INIT), DEPCA_DATA);
960
961 if (depca_debug > 5)
962 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
963 dev->name, csr0, inw(DEPCA_DATA));
964
965 if (csr0 & RINT) /* Rx interrupt (packet arrived) */ 966 depca_rx(dev);
967
968 if (csr0 & TINT) /* Tx interrupt (packet sent) */ 969 depca_tx(dev);
970
971 /* Clear the interrupts we've handled. */ 972 outw(CSR0, DEPCA_ADDR);
973 outw(BABL|CERR|MISS|MERR|RINT|TINT|IDON|INEA, DEPCA_DATA);
974
975 if (depca_debug > 4) { 976 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
977 dev->name, inw(DEPCA_ADDR),
978 inw(DEPCA_DATA));
979 } 980
981 /* Unmask the DEPCA board interrupts and turn off the LED */ 982 nicsr = (nicsr & ~IM & ~LED);
983 PUT_NICSR(nicsr, DEPCA_NICSR);
984
985 dev->interrupt = UNMASK_INTERRUPTS;
986 return;
987 } 988
989 staticint 990 depca_rx(structdevice *dev)
/* */ 991 { 992 structdepca_private *lp = (structdepca_private *)dev->priv;
993 intentry = lp->cur_rx & lp->rmask;
994
995 /* If we own the next entry, it's a new packet. Send it up. */ 996 for (; lp->rx_ring[entry].base >= 0; entry = (++lp->cur_rx) & lp->rmask) { 997 intstatus = lp->rx_ring[entry].base >> 16 ;
998 intchained;
999
1000 /*1001 ** There is a tricky error noted by John Murphy, <murf@perftech.com>1002 ** to Russ Nelson: even with full-sized buffers, it's possible for a1003 ** jabber packet to use two buffers, with only the last one correctly1004 ** noting the error.1005 */1006
1007 /* Check for a chaining buffer */1008 chained = 0;
1009 if (status == R_STP) {1010 chained = 1;
1011
1012 /* 1013 ** Wait for next buffer to complete to check for errors. This1014 ** is slow but infrequent and allows for correct hardware buffer1015 ** chaining (whilst defeating the chaining's purpose).1016 */1017 while ((status=(lp->rx_ring[(entry+1)&lp->rmask].base >> 16)) < 0);
1018
1019 /* NB: 'status' now comes from the buffer following 'entry'. */1020 }1021
1022 if (status & R_ERR) {/* There was an error. */1023 lp->stats.rx_errors++; /* Update the error stats. */1024 if (status & R_FRAM) lp->stats.rx_frame_errors++;
1025 if (status & R_OFLO) lp->stats.rx_over_errors++;
1026 if (status & R_CRC) lp->stats.rx_crc_errors++;
1027 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
1028 }else{/* Malloc up new buffer, compatible with net-2e. */1029 shortpkt_len = lp->rx_ring[entry].msg_length;
1030 structsk_buff *skb;
1031
1032 skb = alloc_skb(pkt_len, GFP_ATOMIC);
1033 if (skb == NULL) {1034 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1035 lp->stats.rx_dropped++; /* Really, deferred. */1036 break;
1037 }1038 skb->len = pkt_len;
1039 skb->dev = dev;
1040 memcpy(skb->data,
1041 (unsignedchar *)(lp->rx_ring[entry].base & 0x00ffffff),
1042 pkt_len);
1043 /* 1044 ** Notify the upper protocol layers that there is another 1045 ** packet to handle1046 */1047 netif_rx(skb);
1048 lp->stats.rx_packets++;
1049 }1050
1051 /* turn over ownership of the current entry back to the LANCE */1052 lp->rx_ring[entry].base |= R_OWN;
1053 if (chained && (status & R_ERR)) {/* next entry also bad */1054 entry = (++lp->cur_rx) & lp->rmask;
1055 lp->rx_ring[entry].base |= R_OWN;
1056 }1057 }1058
1059 /* 1060 ** We should check that at least two ring entries are free. If not,1061 ** we should free one and mark stats->rx_dropped++. 1062 */1063
1064 return 0;
1065 }1066
1067 /*1068 ** Buffer sent - check for buffer errors.1069 */1070 staticint1071 depca_tx(structdevice *dev)
/* */1072 {1073 structdepca_private *lp = (structdepca_private *)dev->priv;
1074 intdirty_tx = lp->dirty_tx & lp->rmask;
1075
1076 if (depca_debug > 5)
1077 printk("%s: Cleaning tx ring, dirty %d clean %d.\n",
1078 dev->name, dirty_tx, (lp->cur_tx & lp->rmask));
1079
1080 /* 1081 ** While the dirty entry is not the current one AND 1082 ** the LANCE doesn't own it... 1083 */1084 for (; dirty_tx!=(lp->cur_tx & lp->rmask) && lp->tx_ring[dirty_tx].base>0;
1085 dirty_tx = ++lp->dirty_tx & lp->rmask) {1086 unsignedlong *tmdp = (unsignedlong *)(&lp->tx_ring[dirty_tx]);
1087 intstatus = lp->tx_ring[dirty_tx].base >> 16;
1088
1089 if (status < 0) {/* Packet not yet sent! */1090 printk("interrupt for packet not yet sent!\n");
1091 break;
1092 }1093 if (status & T_ERR) {/* There was an major error, log it. */1094 interr_status = lp->tx_ring[dirty_tx].misc;
1095
1096 lp->stats.tx_errors++;
1097 if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1098 if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1099 if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
1100 if (err_status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1101 /* We should re-init() after the FIFO error. */1102 }elseif (status & (T_MORE | T_ONE)) {1103 lp->stats.collisions++;
1104 }else{1105 lp->stats.tx_packets++;
1106 }1107
1108 if (depca_debug > 5)
1109 printk("%s: Tx done entry %d, %4.4lx %4.4lx %4.4lx %4.4lx.\n",
1110 dev->name, dirty_tx,
1111 tmdp[0], tmdp[1], tmdp[2], tmdp[3]);
1112 }1113 /*mark_bh(INET_BH);*/1114 return 0;
1115 }1116
1117 staticint1118 depca_close(structdevice *dev)
/* */1119 {1120 intioaddr = dev->base_addr;
1121
1122 dev->start = 0;
1123 dev->tbusy = 1;
1124
1125 outw(CSR0, DEPCA_ADDR);
1126
1127 if (depca_debug > 1) {1128 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1129 dev->name, inw(DEPCA_DATA));
1130 }1131
1132 /* 1133 ** We stop the DEPCA here -- it occasionally polls1134 ** memory if we don't. 1135 */1136 outw(STOP, DEPCA_DATA);
1137
1138 free_irq(dev->irq);
1139
1140 irq2dev_map[dev->irq] = 0;
1141
1142 return 0;
1143 }1144
1145 staticvoidLoadCSRs(structdevice *dev)
/* */1146 {1147 structdepca_private *lp = (structdepca_private *)dev->priv;
1148 intioaddr = dev->base_addr;
1149
1150 outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */1151 outw((unsignedshort)(unsignedlong)&lp->init_block, DEPCA_DATA);
1152 outw(CSR2, DEPCA_ADDR); /* initialisation block address MSW */1153 outw((unsignedshort)((unsignedlong)&lp->init_block >> 16), DEPCA_DATA);
1154 outw(CSR3, DEPCA_ADDR); /* ALE control */1155 outw(ACON, DEPCA_DATA);
1156 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */1157 }1158
1159 staticintInitRestartDepca(structdevice *dev)
/* */1160 {1161 structdepca_private *lp = (structdepca_private *)dev->priv;
1162 intioaddr = dev->base_addr;
1163 inti, status=0;
1164
1165 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */1166 outw(INIT, DEPCA_DATA); /* initialize DEPCA */1167
1168 /* wait for lance to complete initialisation */1169 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1170
1171 if (i!=100) {1172 /* clear IDON by writing a "1", enable interrupts and start lance */1173 outw(IDON | INEA | STRT, DEPCA_DATA);
1174 if (depca_debug > 2) {1175 printk("%s: DEPCA open after %d ticks, init block %#lx csr0 %4.4x.\n",
1176 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1177 }1178 }else{1179 status = -1;
1180 printk("%s: DEPCA unopened after %d ticks, init block %#lx csr0 %4.4x.\n",
1181 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1182 }1183
1184 returnstatus;
1185 }1186
1187 staticstructenet_statistics *
1188 depca_get_stats(structdevice *dev)
/* */1189 {1190 structdepca_private *lp = (structdepca_private *)dev->priv;
1191
1192 /* Null body since there is no framing error counter */1193
1194 return &lp->stats;
1195 }1196
1197 #ifdefHAVE_MULTICAST1198 /*1199 ** Set or clear the multicast filter for this adaptor.1200 ** num_addrs == -1 Promiscuous mode, receive all packets1201 ** num_addrs == 0 Normal mode, clear multicast list1202 ** num_addrs > 0 Multicast mode, receive normal and MC packets, and do1203 ** best-effort filtering.1204 */1205 staticvoid1206 set_multicast_list(structdevice *dev, intnum_addrs, void *addrs)
/* */1207 {1208 shortioaddr = dev->base_addr;
1209 structdepca_private *lp = (structdepca_private *)dev->priv;
1210
1211 /* We take the simple way out and always enable promiscuous mode. */1212 STOP_DEPCA; /* Temporarily stop the depca. */1213
1214 lp->init_block.mode = PROM; /* Set promiscuous mode */1215 if (num_addrs >= 0) {1216 shortmulticast_table[4];
1217 inti;
1218
1219 SetMulticastFilter(num_addrs, (char *)addrs, (char *)multicast_table);
1220
1221 /* We don't use the multicast table, but rely on upper-layer filtering. */1222 memset(multicast_table, (num_addrs==0) ? 0 : -1, sizeof(multicast_table));
1223
1224 for (i = 0; i < 4; i++) {1225 lp->init_block.filter[i] = multicast_table[i];
1226 }1227 lp->init_block.mode &= ~PROM; /* Unset promiscuous mode */1228 }else{1229 lp->init_block.mode |= PROM; /* Set promiscuous mode */1230 }1231
1232 outw(CSR0, DEPCA_ADDR);
1233 outw(IDON|INEA|STRT, DEPCA_DATA); /* Resume normal operation. */1234 }1235
1236 /*1237 ** Calculate the hash code and update the logical address filter1238 ** from a list of ethernet multicast addresses.1239 ** Derived from a 'C' program in the AMD data book:1240 ** "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)", 1241 ** Pub #17781, Rev. A, May 19931242 */1243 staticvoidSetMulticastFilter(intnum_addrs, char *addrs, char *multicast_table)
/* */1244 {1245 charj, ctrl, bit, octet, hashcode;
1246 shortinti;
1247 longintCRC, poly = (longint) CRC_POLYNOMIAL;
1248
1249 for (i=0;i<num_addrs;i++) {/* for each address in the list */1250 if (((char) *(addrs+ETH_ALEN*i) & 0x01) == 1) {/* is multicast address? */1251 CRC = (longint) 0xffffffff; /* init CRC for each address */1252 for (octet=0;octet<ETH_ALEN;octet++) {/* for each address octet */1253 for(j=0;j<8;j++) {/* process each address bit */1254 bit = (((char)* (addrs+ETH_ALEN*i+octet)) >> j) & 0x01;
1255 ctrl = ((CRC < 0) ? 1 : 0); /* shift the control bit */1256 CRC <<= 1; /* shift the CRC */1257 if (bit ^ ctrl) {/* (bit) XOR (control bit) */1258 CRC ^= poly; /* (CRC) XOR (polynomial) */1259 }1260 }1261 }1262 hashcode = (CRC & 0x00000001); /* hashcode is 6 LSb of CRC ... */1263 for (j=0;j<5;j++) {/* ... in reverse order. */1264 hashcode <<= 1;
1265 CRC >>= 1;
1266 hashcode |= (CRC & 0x00000001);
1267 }1268 octet = hashcode >> 3; /* bit[3-5] -> octet in filter */1269 /* bit[0-2] -> bit in octet */1270 multicast_table[octet] |= (1 << (hashcode & 0x07));
1271 }1272 }1273 return;
1274 }1275
1276 #endif/* HAVE_MULTICAST */1277
1278 /*1279 ** Look for a particular board name in the on-board Remote Diagnostics1280 ** and Boot (RDB) ROM. This will also give us a clue to the network RAM1281 ** base address.1282 */1283 staticchar *DepcaSignature(unsignedlongmem_addr)
/* */1284 {1285 unsignedlongi,j,k;
1286 staticcharsignatures[][DEPCA_NAME_LENGTH] = DEPCA_SIGNATURE;
1287 staticcharthisName[DEPCA_NAME_LENGTH];
1288 chartmpstr[17];
1289
1290 for (i=0;i<16;i++) {/* copy the first 16 bytes of ROM to */1291 tmpstr[i] = *(unsignedchar *)(mem_addr+0xc000+i); /* a temporary string */1292 }1293 tmpstr[i]=(char)NULL;
1294
1295 strcpy(thisName,"");
1296 for (i=0;*signatures[i]!=(char)NULL && *thisName==(char)NULL;i++) {1297 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {1298 if (signatures[i][k] == tmpstr[j]) {/* track signature */1299 k++;
1300 }else{/* lost signature; begin search again */1301 k=0;
1302 }1303 }1304 if (k == strlen(signatures[i])) {1305 strcpy(thisName,signatures[i]);
1306 }1307 }1308
1309 returnthisName; /* return the device name string */1310 }1311
1312 /*1313 ** Look for a special sequence in the Ethernet station address PROM that1314 ** is common across all DEPCA products. Note that the original DEPCA needs1315 ** its ROM address counter to be initialized and enabled. Only enable1316 ** if the first address octet is a 0x08 - this minimises the chances of1317 ** messing around with some other hardware, but it assumes that this DEPCA1318 ** card initialized itself correctly. It also assumes that all past and1319 ** future DEPCA/EtherWORKS cards will have ethernet addresses beginning with1320 ** a 0x08. The choice of byte or word addressing is made here based on whether1321 ** word read of the NICSR returns two identical lower and upper bytes: if so1322 ** the register is 8 bits wide.1323 */1324
1325 staticintDevicePresent(shortioaddr)
/* */1326 {1327 staticshortfp=1,sigLength=0;
1328 staticchardevSig[] = PROBE_SEQUENCE;
1329 chardata;
1330 unsignedcharLSB,MSB;
1331 inti, j, nicsr, status = 0;
1332 staticcharasc2hex(charvalue);
1333
1334 /*1335 ** Initialize the counter on a DEPCA card. Two reads to ensure DEPCA ethernet1336 ** address counter is a) cleared and b) the correct data read.1337 */1338 data = inb(DEPCA_PROM); /* clear counter */1339 data = inb(DEPCA_PROM); /* read data */1340
1341 /*1342 ** Determine whether a byte or word access should be made on the NICSR.1343 ** Since the I/O 'functions' are actually in-line code, the choice not to use1344 ** pointers to functions vs. just set a conditional, is made for us. This code1345 ** assumes that the NICSR has an asymmetric bit pattern already in it.1346 */1347 nicsr = inw(DEPCA_NICSR);
1348 LSB = nicsr & 0xff;
1349 MSB = (((unsigned) nicsr) >> 8) & 0xff;
1350 if (MSB == LSB) {1351 depca_na = 0; /* byte accesses */1352 }else{1353 depca_na = 1; /* word accesses */1354 }1355
1356 /*1357 ** Enable counter1358 */1359 if (data == 0x08) {1360 nicsr |= AAC;
1361 PUT_NICSR(nicsr, DEPCA_NICSR);
1362 }1363
1364 /* 1365 ** Convert the ascii signature to a hex equivalent & pack in place 1366 */1367 if (fp) {/* only do this once!... */1368 for (i=0,j=0;devSig[i]!=(char)NULL && !status;i+=2,j++) {1369 if ((devSig[i]=asc2hex(devSig[i]))>=0) {1370 devSig[i]<<=4;
1371 if((devSig[i+1]=asc2hex(devSig[i+1]))>=0){1372 devSig[j]=devSig[i]+devSig[i+1];
1373 }else{1374 status= -1;
1375 }1376 }else{1377 status= -1;
1378 }1379 }1380 sigLength=j;
1381 fp = 0;
1382 }1383
1384 /* 1385 ** Search the Ethernet address ROM for the signature. Since the ROM address1386 ** counter can start at an arbitrary point, the search must include the entire1387 ** probe sequence length plus the length of the (signature - 1).1388 ** Stop the search IMMEDIATELY after the signature is found so that the1389 ** PROM address counter is correctly positioned at the start of the1390 ** ethernet address for later read out.1391 */1392 if (!status) {1393 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {1394 data = inb(DEPCA_PROM);
1395 if (devSig[j] == data) {/* track signature */1396 j++;
1397 }else{/* lost signature; begin search again */1398 j=0;
1399 }1400 }1401
1402 if (j!=sigLength) {1403 status = -ENODEV; /* search failed */1404 }1405 }1406
1407 returnstatus;
1408 }1409
1410 staticcharasc2hex(charvalue)
/* */1411 {1412 value -= 0x30; /* normalise to 0..9 range */1413 if (value >= 0) {1414 if (value > 9) {/* but may not be 10..15 */1415 value &= 0x1f; /* make A..F & a..f be the same */1416 value -= 0x07; /* normalise to 10..15 range */1417 if ((value < 0x0a) || (value > 0x0f)) {/* if outside range then... */1418 value = -1; /* ...signal error */1419 }1420 }1421 }else{/* outside 0..9 range... */1422 value = -1; /* ...signal error */1423 }1424 returnvalue; /* return hex char or error */1425 }1426
1427
1428 /*1429 * Local variables:1430 * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c depca.c"1431 * End:1432 */1433
1434
1435