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*/
1 /* depca.c: A DIGITAL DEPCA & EtherWORKS ethernet driver for linux.
2
3 Written 1994 by David C. Davies.
4
5
6 Copyright 1994 David C. Davies
7 and
8 United States Government
9 (as represented by the Director, National Security Agency).
10
11
12 This software may be used and distributed according to the terms of
13 the GNU Public License, incorporated herein by reference.
14
15 This driver is written for the Digital Equipment Corporation series
16 of DEPCA and EtherWORKS ethernet cards:
17
18 DEPCA (the original)
19 DE100
20 DE200 Turbo
21 DE201 Turbo
22 DE202 Turbo (TP BNC)
23 DE210
24 DE422 (EISA)
25
26 The driver has been tested on DE100, DE200 and DE202 cards in a
27 relatively busy network. The DE422 has been tested a little.
28
29 This driver will NOT work for the DE203, DE204 and DE205 series of
30 cards, since they have a new custom ASIC in place of the AMD LANCE
31 chip.
32
33 The author may be reached as davies@wanton.lkg.dec.com or
34 Digital Equipment Corporation, 550 King Street, Littleton MA 01460.
35
36 =========================================================================
37 The driver was based on the 'lance.c' driver from Donald Becker which is
38 included with the standard driver distribution for linux. Modifications
39 were made to most routines and the hardware recognition routines were
40 written from scratch. Primary references used were:
41
42 1) Lance.c code in /linux/drivers/net/
43 2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook",
44 AMD, 1992 [(800) 222-9323].
45 3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)",
46 AMD, Pub. #17881, May 1993.
47 4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA",
48 AMD, Pub. #16907, May 1992
49 5) "DEC EtherWORKS LC Ethernet Controller Owners Manual",
50 Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003
51 6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual",
52 Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003
53 7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR
54 Digital Equipment Corporation, 1989
55 8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual",
56 Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001
57
58 Peter Bauer's depca.c (V0.5) was referred to when debugging this driver.
59 The hash filter code was derived from Reference 3 and has been tested
60 only to the extent that the Table A-1, page A-7, was confirmed to fill
61 the filter bit positions correctly. Hash filtering is not yet
62 implemented in the current driver set.
63
64 The original DEPCA card requires that the ethernet ROM address counter
65 be enabled to count and has an 8 bit NICSR. The ROM counter enabling is
66 only done when a 0x08 is read as the first address octet (to minimise
67 the chances of writing over some other hardware's I/O register). The
68 NICSR accesses have been changed to byte accesses for all the cards
69 supported by this driver, since there is only one useful bit in the MSB
70 (remote boot timeout) and it is not used. Also, there is a maximum of
71 only 48kB network RAM for this card. My thanks to Torbjorn Lindh for
72 help debugging all this (and holding my feet to the fire until I got it
73 right).
74
75 The DE200 series boards have on-board 64kB RAM for use as a shared
76 memory network buffer. Only the DE100 cards make use of a 2kB buffer
77 mode which has not been implemented in this driver (only the 32kB and
78 64kB modes are supported [16kB/48kB for the original DEPCA]).
79
80 At the most only 2 DEPCA cards can be supported on the ISA bus because
81 there is only provision for two I/O base addresses on each card (0x300
82 and 0x200). The I/O address is detected by searching for a byte sequence
83 in the Ethernet station address PROM at the expected I/O address for the
84 Ethernet PROM. The shared memory base address is 'autoprobed' by
85 looking for the self test PROM and detecting the card name. When a
86 second DEPCA is detected, information is placed in the base_addr
87 variable of the next device structure (which is created if necessary),
88 thus enabling ethif_probe initialization for the device. More than 2
89 EISA cards can be supported, but care will be needed assigning the
90 shared memory to ensure that each slot has the correct IRQ, I/O address
91 and shared memory address assigned.
92
93 ************************************************************************
94
95 NOTE: If you are using two ISA DEPCAs, it is important that you assign
96 the base memory addresses correctly. The driver autoprobes I/O 0x300
97 then 0x200. The base memory address for the first device must be less
98 than that of the second so that the auto probe will correctly assign the
99 I/O and memory addresses on the same card. I can't think of a way to do
100 this unambiguously at the moment, since there is nothing on the cards to
101 tie I/O and memory information together.
102
103 I am unable to test 2 cards together for now, so this code is
104 unchecked. All reports, good or bad, are welcome.
105
106 ************************************************************************
107
108 The board IRQ setting must be at an unused IRQ which is auto-probed
109 using Donald Becker's autoprobe routines. DEPCA and DE100 board IRQs are
110 {2,3,4,5,7}, whereas the DE200 is at {5,9,10,11,15}. Note that IRQ2 is
111 really IRQ9 in machines with 16 IRQ lines.
112
113 No 16MB memory limitation should exist with this driver as DMA is not
114 used and the common memory area is in low memory on the network card (my
115 current system has 20MB and I've not had problems yet).
116
117 The ability to load this driver as a loadable module has been added. To
118 utilise this ability, you have to do <8 things:
119
120 1) copy depca.c from the /linux/drivers/net directory to your favourite
121 temporary directory.
122 2) edit the source code near line 1530 to reflect the I/O address and
123 IRQ you're using.
124 3) compile depca.c, but include -DMODULE in the command line to ensure
125 that the correct bits are compiled (see end of source code).
126 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
127 kernel with the depca configuration turned off and reboot.
128 5) insmod depca.o
129 6) run the net startup bits for your eth?? interface manually
130 (usually /etc/rc.inet[12] at boot time).
131 7) enjoy!
132
133 Note that autoprobing is not allowed in loadable modules - the system is
134 already up and running and you're messing with interrupts. Also, there
135 is no way to check on the number of depcas installed at the moment.
136
137 To unload a module, turn off the associated interface
138 'ifconfig eth?? down' then 'rmmod depca'.
139
140 TO DO:
141 ------
142
143 1. Implement the 2k buffer mode - does anyone need it??
144
145 Revision History
146 ----------------
147
148 Version Date Description
149
150 0.1 25-jan-94 Initial writing.
151 0.2 27-jan-94 Added LANCE TX hardware buffer chaining.
152 0.3 1-feb-94 Added multiple DEPCA support.
153 0.31 4-feb-94 Added DE202 recognition.
154 0.32 19-feb-94 Tidy up. Improve multi-DEPCA support.
155 0.33 25-feb-94 Fix DEPCA ethernet ROM counter enable.
156 Add jabber packet fix from murf@perftech.com
157 and becker@super.org
158 0.34 7-mar-94 Fix DEPCA max network memory RAM & NICSR access.
159 0.35 8-mar-94 Added DE201 recognition. Tidied up.
160 0.351 30-apr-94 Added EISA support. Added DE422 recognition.
161 0.36 16-may-94 DE422 fix released.
162 0.37 22-jul-94 Added MODULE support
163
164 =========================================================================
165 */
166
167 static char *version = "depca.c:v0.37 7/22/94 davies@wanton.lkg.dec.com\n";
168
169 #include <stdarg.h>
170 #include <linux/config.h>
171 #include <linux/kernel.h>
172 #include <linux/sched.h>
173 #include <linux/string.h>
174 #include <linux/ptrace.h>
175 #include <linux/errno.h>
176 #include <linux/ioport.h>
177 #include <linux/malloc.h>
178 #include <linux/interrupt.h>
179 #include <asm/bitops.h>
180 #include <asm/io.h>
181 #include <asm/dma.h>
182
183 #include <linux/netdevice.h>
184 #include <linux/etherdevice.h>
185 #include <linux/skbuff.h>
186
187 #ifdef MODULE
188 #include <linux/module.h>
189 #include "/linux/tools/version.h"
190 #endif /* MODULE */
191
192 #include "depca.h"
193
194 #ifdef DEPCA_DEBUG
195 static int depca_debug = DEPCA_DEBUG;
196 #else
197 static int depca_debug = 1;
198 #endif
199
200 #ifndef PROBE_LENGTH
201 #define PROBE_LENGTH 32
202 #endif
203
204 #ifndef PROBE_SEQUENCE
205 #define PROBE_SEQUENCE "FF0055AAFF0055AA"
206 #endif
207
208 #ifndef DEPCA_SIGNATURE
209 #define DEPCA_SIGNATURE {"DEPCA","DE100",\
210 "DE200","DE201","DE202","DE210",\
211 "DE422",\
212 ""}
213 #define DEPCA_NAME_LENGTH 8
214 #endif
215
216 #ifndef DEPCA_RAM_BASE_ADDRESSES
217 #define DEPCA_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0xe0000,0x00000}
218 #endif
219 static short mem_chkd = 0; /* holds which base addrs have been */
220 /* checked, for multi-DEPCA case */
221
222 #ifndef DEPCA_IO_PORTS
223 #define DEPCA_IO_PORTS {0x300, 0x200, 0}
224 #endif
225
226 #ifndef DEPCA_TOTAL_SIZE
227 #define DEPCA_TOTAL_SIZE 0x10
228 #endif
229
230 #ifndef MAX_NUM_DEPCAS
231 #define MAX_NUM_DEPCAS 2
232 #endif
233
234 #ifndef DEPCA_EISA_IO_PORTS
235 #define DEPCA_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
236 #endif
237
238 #ifndef MAX_EISA_SLOTS
239 #define MAX_EISA_SLOTS 8
240 #endif
241
242 /*
243 ** Set the number of Tx and Rx buffers.
244 */
245 #ifndef DEPCA_BUFFER_LOG_SZ
246 #define RING_SIZE 16 /* 16 buffers */
247 #else
248 #define RING_SIZE (1 << (DEPCA_BUFFERS_LOG_SZ))
249 #endif /* DEPCA_BUFFER_LOG_SZ */
250
251 #define PKT_BUF_SZ 1544 /* Buffer size for each Tx/Rx buffer */
252 #define PKT_SZ 1514 /* Maximum ethernet packet length */
253 #define DAT_SZ 1500 /* Maximum ethernet data length */
254 #define PKT_HDR_LEN 14 /* Addresses and data length info */
255
256 #ifdef HAVE_MULTICAST
257 #ifndef CRC_POLYNOMIAL
258 #define CRC_POLYNOMIAL 0x04c11db7 /* Ethernet CRC polynomial */
259 #endif /* CRC_POLYNOMIAL */
260 #endif /* HAVE_MULTICAST */
261
262 /*
263 ** The DEPCA Rx and Tx ring descriptors.
264 */
265 struct depca_rx_head {
266 long base;
267 short buf_length; /* This length is negative 2's complement! */
268 short msg_length; /* This length is "normal". */
269 };
270
271 struct depca_tx_head {
272 long base;
273 short length; /* This length is negative 2's complement! */
274 short misc; /* Errors and TDR info */
275 };
276
277 #define LA_MASK 0x0000ffff /* LANCE address mask for mapping network RAM
278 to LANCE memory address space */
279
280 /*
281 ** The Lance initialization block, described in databook, in common memory.
282 */
283 struct depca_init {
284 unsigned short mode; /* Mode register */
285 unsigned char phys_addr[ETH_ALEN]; /* Physical ethernet address */
286 unsigned short filter[4]; /* Multicast filter. */
287 unsigned long rx_ring; /* Rx ring base pointer & ring length */
288 unsigned long tx_ring; /* Tx ring base pointer & ring length */
289 };
290
291 struct depca_private {
292 char devname[8]; /* Not used */
293 struct depca_rx_head *rx_ring; /* Pointer to start of RX descriptor ring */
294 struct depca_tx_head *tx_ring; /* Pointer to start of TX descriptor ring */
295 struct depca_init init_block;/* Initialization block */
296 long bus_offset; /* (E)ISA bus address offset vs LANCE */
297 long dma_buffs; /* Start address of Rx and Tx buffers. */
298 int cur_rx, cur_tx; /* The next free ring entry */
299 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
300 int dma;
301 struct enet_statistics stats;
302 char depca_na; /* NICSR access width: 0=>byte, 1=>word */
303 short ringSize; /* ring size based on available memory */
304 short rmask; /* modulus mask based on ring size */
305 long rlen; /* log2(ringSize) for the descriptors */
306 };
307
308 /*
309 ** Public Functions
310 */
311 static int depca_open(struct device *dev);
312 static int depca_start_xmit(struct sk_buff *skb, struct device *dev);
313 static void depca_interrupt(int reg_ptr);
314 static int depca_close(struct device *dev);
315 static struct enet_statistics *depca_get_stats(struct device *dev);
316 #ifdef HAVE_MULTICAST
317 static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
318 #endif
319
320 /*
321 ** Private functions
322 */
323 static int depca_probe1(struct device *dev, short ioaddr);
324 static void depca_init_ring(struct device *dev);
325 static int depca_rx(struct device *dev);
326 static int depca_tx(struct device *dev);
327
328 static void LoadCSRs(struct device *dev);
329 static int InitRestartDepca(struct device *dev);
330 static char *DepcaSignature(unsigned long mem_addr);
331 static int DevicePresent(short ioaddr);
332 #ifdef HAVE_MULTICAST
333 static void SetMulticastFilter(int num_addrs, char *addrs, char *multicast_table);
334 #endif
335
336 #ifndef MODULE
337 static struct device *isa_probe(struct device *dev);
338 static struct device *eisa_probe(struct device *dev);
339 static struct device *alloc_device(struct device *dev, int ioaddr);
340
341 static int num_depcas = 0, num_eth = 0;;
342
343 #else
344 int init_module(void);
345 void cleanup_module(void);
346
347 #endif /* MODULE */
348
349 /*
350 ** Miscellaneous defines...
351 */
352 #define STOP_DEPCA \
353 outw(CSR0, DEPCA_ADDR);\
354 outw(STOP, DEPCA_DATA)
355
356
357
358
359 int depca_probe(struct device *dev)
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*/
360 {
361 short base_addr = dev->base_addr;
362 int status = -ENODEV;
363 #ifndef MODULE
364 struct device *eth0;
365 #endif
366
367 if (base_addr > 0x1ff) { /* Check a single specified location. */
368 if (DevicePresent(base_addr) == 0) { /* Is DEPCA really here? */
369 status = depca_probe1(dev, base_addr);
370 }
371 } else if (base_addr > 0) { /* Don't probe at all. */
372 status = -ENXIO;
373 } else { /* First probe for the DEPCA test */
374
375 #ifdef MODULE /* pattern in ROM */
376 printk("Autoprobing is not supported when loading a module based driver.\n");
377 status = -EIO;
378 #else
379 eth0=isa_probe(dev);
380 eth0=eisa_probe(eth0);
381 if (dev->priv) status=0;
382 #endif /* MODULE */
383
384 }
385
386 if (status) dev->base_addr = base_addr;
387
388 return status; /* ENODEV would be more accurate. */
389 }
390
391 static int
392 depca_probe1(struct device *dev, short ioaddr)
/* ![[previous]](../icons/left.png)
*/
393 {
394 struct depca_private *lp;
395 int i,j, status=0;
396 unsigned long mem_start, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
397 char *name=(char *)NULL;
398 unsigned int nicsr, offset, netRAM;
399
400
401 /*
402 ** Stop the DEPCA. Enable the DBR ROM. Disable interrupts and remote boot.
403 */
404 STOP_DEPCA;
405
406 nicsr = inb(DEPCA_NICSR);
407 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
408 outb(nicsr, DEPCA_NICSR);
409
410 if (inw(DEPCA_DATA) == STOP) {
411
412 /* Now find out what kind of DEPCA we have. The DE100 uses a different
413 ** addressing scheme for some registers compared to the DE2xx series.
414 ** Note that a base address location is marked as checked if no DEPCA is
415 ** there or one is found (when the search is immediately terminated). This
416 ** shortens the search time a little for multiple DEPCAs.
417 */
418
419 for (j = 0, i = 0; mem_base[i] && (j == 0);) {
420 if (((mem_chkd >> i) & 0x01) == 0) { /* has the memory been checked? */
421 name = DepcaSignature(mem_base[i]);/* check for a DEPCA here */
422 mem_chkd |= (0x01 << i); /* mark location checked */
423 if (*name != (char)NULL) { /* one found? */
424 j = 1; /* set exit flag */
425 } else {
426 i++; /* increment search index */
427 }
428 }
429 }
430
431 if (*name != (char)NULL) { /* found a DEPCA device */
432 mem_start = mem_base[i];
433 dev->base_addr = ioaddr;
434
435 if ((ioaddr&0x0fff)==DEPCA_EISA_IO_PORTS) {/* EISA slot address */
436 printk("%s: %s at %#3x (EISA slot %d)",
437 dev->name, name, ioaddr, ((ioaddr>>12)&0x0f));
438 } else { /* ISA port address */
439 printk("%s: %s at %#3x", dev->name, name, ioaddr);
440 }
441
442 /* There is a 32 byte station address PROM at DEPCA_PROM address.
443 The first six bytes are the station address. They can be read
444 directly since the signature search set up the ROM address
445 counter correctly just before this function.
446
447 For the DE100 we have to be careful about which port is used to
448 read the ROM info.
449 */
450
451 if (strstr(name,"DE100")!=(char *)NULL) {
452 j = 1;
453 } else {
454 j = 0;
455 }
456
457 printk(", h/w address ");
458 for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet address */
459 printk("%2.2x:", dev->dev_addr[i] = inb(DEPCA_PROM + j));
460 }
461 printk("%2.2x", dev->dev_addr[i] = inb(DEPCA_PROM + j));
462
463 for (;i<32;i++) { /* leave ROM counter in known state */
464 j=inb(DEPCA_PROM);
465 }
466
467 #ifdef HAVE_PORTRESERVE
468 snarf_region(ioaddr, DEPCA_TOTAL_SIZE);
469 #endif
470
471 /*
472 ** Set up the maximum amount of network RAM(kB)
473 */
474 if (strstr(name,"DEPCA")==(char *)NULL) {
475 netRAM=64;
476 } else {
477 netRAM=48;
478 }
479
480 /*
481 ** Determine the base address for the DEPCA RAM from the NI-CSR
482 ** and make up a DEPCA-specific-data structure.
483 */
484
485 if (nicsr & BUF) {
486 offset = 0x8000; /* 32kbyte RAM offset*/
487 nicsr &= ~BS; /* DEPCA RAM in top 32k */
488 printk(",\n has %dkB RAM", netRAM - 32);
489 } else if ((nicsr & _128KB) && (netRAM!=48)) {
490 offset = 0x0000;
491 printk(",\n has 128kB RAM");
492 } else {
493 offset = 0x0000; /* 64k/48k bytes RAM */
494 printk(",\n has %dkB RAM", netRAM);
495 }
496
497 mem_start += offset; /* (E)ISA start address */
498 printk(" at 0x%.5lx", mem_start);
499
500 /*
501 ** Enable the shadow RAM.
502 */
503 if (strstr(name,"DEPCA")==(char *)NULL) {
504 nicsr |= SHE;
505 outb(nicsr, DEPCA_NICSR);
506 }
507
508 /*
509 ** Calculate the ring size based on the available RAM
510 ** found above. Allocate an equal number of buffers, each
511 ** of size PKT_BUF_SZ (1544 bytes) to the Tx and Rx, allowing one
512 ** descriptor entry (8 bytes) for each buffer. Make sure
513 ** that this ring size is <= RING_SIZE. The ring size must be
514 ** a power of 2.
515 */
516
517 j = (((netRAM << 10) - offset - sizeof(struct depca_private)) /
518 (PKT_BUF_SZ + 8)) >> 1;
519 for (i=0;j>1;i++) {
520 j >>= 1;
521 }
522
523 /* Hold the ring size information here before the depca
524 ** private structure is allocated. Need this for the memory
525 ** space calculations.
526 */
527 j = 1 << i;
528
529 /*
530 ** Set up memory information in the device structure.
531 ** Align the descriptor rings on an 8 byte (quadword) boundary.
532 **
533 ** depca_private area
534 ** rx ring descriptors
535 ** tx ring descriptors
536 ** rx buffers
537 ** tx buffers
538 **
539 */
540
541 /* private area & initialise */
542 dev->priv = (void *)((mem_start + 0x07) & ~0x07);
543 lp = (struct depca_private *)dev->priv;
544 memset(dev->priv, 0, sizeof(struct depca_private));
545
546 /* Tx & Rx descriptors (aligned to a quadword boundary) */
547 mem_start = ((((unsigned long)dev->priv +
548 sizeof(struct depca_private)) +
549 (unsigned long)0x07) & (unsigned long)~0x07);
550 lp->rx_ring = (struct depca_rx_head *)mem_start;
551
552 mem_start += (sizeof(struct depca_rx_head) * j);
553 lp->tx_ring = (struct depca_tx_head *)mem_start;
554
555 mem_start += (sizeof(struct depca_tx_head) * j);
556 lp->bus_offset = mem_start & 0x00ff0000;
557 mem_start &= LA_MASK; /* LANCE re-mapped start address */
558
559 lp->dma_buffs = mem_start;
560
561 mem_start += (PKT_BUF_SZ * j);
562 /* (mem_start now points to the start of the Tx buffers) */
563
564 /* Initialise the data structures wrt CPU */
565 memset(lp->rx_ring, 0, sizeof(struct depca_rx_head)*j);
566 memset(lp->tx_ring, 0, sizeof(struct depca_tx_head)*j);
567
568 /* This should never happen. */
569 if ((int)(lp->rx_ring) & 0x07) {
570 printk("\n **ERROR** DEPCA Rx and Tx descriptor rings not on a quadword boundary.\n");
571 return -ENXIO;
572 }
573
574 /*
575 ** Finish initialising the ring information.
576 */
577 lp->ringSize = j;
578 if (lp->ringSize > RING_SIZE) lp->ringSize = RING_SIZE;
579 lp->rmask = lp->ringSize - 1;
580
581 /*
582 ** calculate the real RLEN size for the descriptors. It is
583 ** log2(ringSize).
584 */
585 for (i=0, j = lp->ringSize; j>1; i++) {
586 j >>= 1;
587 }
588 lp->rlen = (unsigned long)(i << 29);
589
590 /*
591 ** load the initialisation block
592 */
593 depca_init_ring(dev);
594
595 /*
596 ** Initialise the control and status registers
597 */
598 LoadCSRs(dev);
599
600 /*
601 ** Enable DEPCA board interrupts for autoprobing
602 */
603 nicsr = ((nicsr & ~IM)|IEN);
604 outb(nicsr, DEPCA_NICSR);
605
606 /* The DMA channel may be passed in on this parameter. */
607 dev->dma = 0;
608
609 /* To auto-IRQ we enable the initialization-done and DMA err,
610 interrupts. For now we will always get a DMA error. */
611 if (dev->irq < 2) {
612 #ifndef MODULE
613 autoirq_setup(0);
614
615 /* Trigger an initialization just for the interrupt. */
616 outw(INEA | INIT, DEPCA_DATA);
617
618 dev->irq = autoirq_report(1);
619 if (dev->irq) {
620 printk(" and uses IRQ%d.\n", dev->irq);
621 } else {
622 printk(" and failed to detect IRQ line.\n");
623 status = -EAGAIN;
624 }
625 #endif /* MODULE */
626 } else {
627 printk(" and assigned IRQ%d.\n", dev->irq);
628 }
629 } else {
630 status = -ENXIO;
631 }
632 if (!status) {
633 if (depca_debug > 0) {
634 printk(version);
635 }
636
637 /* The DEPCA-specific entries in the device structure. */
638 dev->open = &depca_open;
639 dev->hard_start_xmit = &depca_start_xmit;
640 dev->stop = &depca_close;
641 dev->get_stats = &depca_get_stats;
642 #ifdef HAVE_MULTICAST
643 dev->set_multicast_list = &set_multicast_list;
644 #endif
645
646 dev->mem_start = 0;
647
648 /* Fill in the generic field of the device structure. */
649 ether_setup(dev);
650 }
651 } else {
652 status = -ENXIO;
653 }
654
655 return status;
656 }
657
658
659 static int
660 depca_open(struct device *dev)
/* */
661 {
662 struct depca_private *lp = (struct depca_private *)dev->priv;
663 int i,nicsr,ioaddr = dev->base_addr;
664
665 if (request_irq(dev->irq, &depca_interrupt)) {
666 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
667 return -EAGAIN;
668 }
669
670 irq2dev_map[dev->irq] = dev;
671
672 /*
673 ** Stop the DEPCA & get the board status information.
674 */
675 STOP_DEPCA;
676 nicsr = inb(DEPCA_NICSR);
677
678 /*
679 ** Re-initialize the DEPCA...
680 */
681 depca_init_ring(dev); /* initialize the descriptor rings */
682 LoadCSRs(dev);
683
684 if (depca_debug > 1){
685 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
686 printk("Descriptor head addresses:\n");
687 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring,(long)lp->tx_ring);
688 printk("Descriptor addresses:\n");
689 for (i=0;i<lp->ringSize;i++){
690 printk("\t0x%8.8lx 0x%8.8lx\n",(long)&lp->rx_ring[i].base,
691 (long)&lp->tx_ring[i].base);
692 }
693 printk("Buffer addresses:\n");
694 for (i=0;i<lp->ringSize;i++){
695 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring[i].base,
696 (long)lp->tx_ring[i].base);
697 }
698 printk("Initialisation block at 0x%8.8lx\n",(long)&lp->init_block);
699 printk("\tmode: 0x%4.4x\n",lp->init_block.mode);
700 printk("\tphysical address: ");
701 for (i=0;i<6;i++){
702 printk("%2.2x:",(short)lp->init_block.phys_addr[i]);
703 }
704 printk("\n\tlogical address filter: 0x");
705 for (i=0;i<4;i++){
706 printk("%2.2x",(short)lp->init_block.filter[i]);
707 }
708 printk("\n\trx_ring at: 0x%8.8lx\n",(long)lp->init_block.rx_ring);
709 printk("\ttx_ring at: 0x%8.8lx\n",(long)lp->init_block.tx_ring);
710 printk("dma_buffs: 0x%8.8lx\n",(long)lp->dma_buffs);
711 printk("Ring size: %d\nMask: 0x%2.2x\nLog2(ringSize): 0x%8.8lx\n",
712 (short)lp->ringSize,
713 (char)lp->rmask,
714 (long)lp->rlen);
715 outw(CSR2,DEPCA_ADDR);
716 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
717 outw(CSR1,DEPCA_ADDR);
718 printk("%4.4x\n",inw(DEPCA_DATA));
719 outw(CSR3,DEPCA_ADDR);
720 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
721 }
722
723 /*
724 ** Enable DEPCA board interrupts
725 */
726 nicsr = ((nicsr & ~IM & ~LED)|SHE|IEN);
727 outb(nicsr, DEPCA_NICSR);
728 outw(CSR0,DEPCA_ADDR);
729
730 dev->tbusy = 0;
731 dev->interrupt = 0;
732 dev->start = 1;
733
734 InitRestartDepca(dev); /* ignore the return status */
735
736 if (depca_debug > 1){
737 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
738 printk("nicsr: 0x%02x\n",inb(DEPCA_NICSR));
739 }
740
741 #ifdef MODULE
742 MOD_INC_USE_COUNT;
743 #endif
744
745 return 0; /* Always succeed */
746 }
747
748 /* Initialize the lance Rx and Tx descriptor rings. */
749 static void
750 depca_init_ring(struct device *dev)
/* */
751 {
752 struct depca_private *lp = (struct depca_private *)dev->priv;
753 unsigned long i;
754
755 lp->init_block.mode = DTX | DRX; /* Disable Rx and Tx. */
756 lp->cur_rx = lp->cur_tx = 0;
757 lp->dirty_rx = lp->dirty_tx = 0;
758
759 /* Initialize the base addresses and length of each buffer in the ring */
760 for (i = 0; i < lp->ringSize; i++) {
761 lp->rx_ring[i].base = (lp->dma_buffs + i*PKT_BUF_SZ) | R_OWN;
762 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
763 lp->tx_ring[i].base = (lp->dma_buffs + (i+lp->ringSize) * PKT_BUF_SZ) &
764 (unsigned long)(0x00ffffff);
765 }
766
767 /* Set up the initialization block */
768 for (i = 0; i < ETH_ALEN; i++) {
769 lp->init_block.phys_addr[i] = dev->dev_addr[i];
770 }
771 for (i = 0; i < 4; i++) {
772 lp->init_block.filter[i] = 0x0000;
773 }
774 lp->init_block.rx_ring = ((unsigned long)lp->rx_ring & LA_MASK) | lp->rlen;
775 lp->init_block.tx_ring = ((unsigned long)lp->tx_ring & LA_MASK) | lp->rlen;
776
777 lp->init_block.mode = 0x0000; /* Enable the Tx and Rx */
778 }
779
780 /*
781 ** Writes a socket buffer to TX descriptor ring and starts transmission
782 */
783 static int
784 depca_start_xmit(struct sk_buff *skb, struct device *dev)
/* */
785 {
786 struct depca_private *lp = (struct depca_private *)dev->priv;
787 int ioaddr = dev->base_addr;
788 int status = 0;
789
790 /* Transmitter timeout, serious problems. */
791 if (dev->tbusy) {
792 int tickssofar = jiffies - dev->trans_start;
793 if (tickssofar < 10) {
794 status = -1;
795 } else {
796 printk("%s: transmit timed out, status %04x, resetting.\n",
797 dev->name, inw(DEPCA_DATA));
798
799 STOP_DEPCA;
800 depca_init_ring(dev);
801 LoadCSRs(dev);
802 InitRestartDepca(dev);
803 dev->tbusy=0;
804 dev->trans_start = jiffies;
805 }
806 return status;
807 }
808
809 if (skb == NULL) {
810 dev_tint(dev);
811 return 0;
812 }
813
814 if (skb->len <= 0) {
815 return 0;
816 }
817
818 if (depca_debug > 3) {
819 outw(CSR0, DEPCA_ADDR);
820 printk("%s: depca_start_xmit() called, csr0 %4.4x.\n", dev->name,
821 inw(DEPCA_DATA));
822 }
823
824 /* Block a timer-based transmit from overlapping. This could better be
825 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
826 if (set_bit(0, (void*)&dev->tbusy) != 0)
827 printk("%s: Transmitter access conflict.\n", dev->name);
828
829 /*
830 ** The TX buffer, skb, has to be copied into the local network RAM
831 ** for the LANCE to access it. The skb may be at > 16MB for large
832 ** (memory) systems.
833 */
834 { /* Fill in a Tx ring entry */
835 unsigned char *buf;
836 int entry = lp->cur_tx++;
837 int len;
838 long skbL = skb->len;
839 char *p = (char *) skb->data;
840
841 entry &= lp->rmask; /* Ring around buffer number. */
842 buf = (unsigned char *)((lp->tx_ring[entry].base+lp->bus_offset) &
843 0x00ffffff);
844
845 /* Wait for a full ring to free up */
846 while (lp->tx_ring[entry].base < 0);
847
848 /*
849 ** Caution: the write order is important here... don't set up the
850 ** ownership rights until all the other information is in place.
851 */
852 len = ((skbL > PKT_SZ) ? PKT_SZ : skbL); /* skb too long */
853 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */
854 skbL -= len;
855 lp->tx_ring[entry].length = -len;
856
857 /* Clears various error flags */
858 lp->tx_ring[entry].misc = 0x0000;
859
860 /* copy the data from the socket buffer to the net memory */
861 memcpy((unsigned char *)(buf), skb->data, len);
862
863 /* Hand over buffer ownership to the LANCE */
864 if (skbL <= 0) lp->tx_ring[entry].base |= (T_ENP);
865 lp->tx_ring[entry].base |= (T_OWN|T_STP);
866
867 /* Trigger an immediate send demand. */
868 outw(CSR0, DEPCA_ADDR);
869 outw(INEA | TDMD, DEPCA_DATA);
870
871 dev->trans_start = jiffies;
872
873 for (p += len; skbL > 0; p += len) {
874
875 /* Get new buffer pointer */
876 entry = lp->cur_tx++;
877 entry &= lp->rmask; /* Ring around buffer number. */
878 buf = (unsigned char *)((lp->tx_ring[entry].base+lp->bus_offset) &
879 0x00ffffff);
880
881 /* Wait for a full ring to free up */
882 while (lp->tx_ring[entry].base < 0);
883 dev->tbusy=0;
884
885 /* Copy ethernet header to the new buffer */
886 memcpy((unsigned char *)buf, skb->data, PKT_HDR_LEN);
887
888 /* Determine length of data buffer */
889 len = ((skbL > DAT_SZ) ? DAT_SZ : skbL); /* skbL too long */
890 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */
891 skbL -= len;
892 lp->tx_ring[entry].length = -len;
893
894 /* Clears various error flags */
895 lp->tx_ring[entry].misc = 0x0000;
896
897 /* copy the data from the socket buffer to the net memory */
898 memcpy((unsigned char *)(buf + PKT_HDR_LEN), (unsigned char *)p, len);
899
900 /* Hand over buffer ownership to the LANCE */
901 if (skbL <= 0) lp->tx_ring[entry].base |= T_ENP;
902 lp->tx_ring[entry].base |= T_OWN;
903 }
904
905 if (depca_debug > 4) {
906 unsigned char *pkt =
907 (unsigned char *)((lp->tx_ring[entry].base+lp->bus_offset) &
908 0x00ffffff);
909
910 printk("%s: tx ring[%d], %#lx, sk_buf %#lx len %d.\n",
911 dev->name, entry, (unsigned long) &lp->tx_ring[entry],
912 lp->tx_ring[entry].base, -lp->tx_ring[entry].length);
913 printk("%s: Tx %2.2x %2.2x %2.2x ... %2.2x %2.2x %2.2x %2.2x...%2.2x len %2.2x %2.2x %2.2x %2.2x.\n",
914 dev->name, pkt[0], pkt[1], pkt[2], pkt[5], pkt[6],
915 pkt[7], pkt[8], pkt[11], pkt[12], pkt[13],
916 pkt[14], pkt[15]);
917 }
918
919 /* Check if the TX ring is full or not - 'tbusy' cleared if not full. */
920 if (lp->tx_ring[(entry+1) & lp->rmask].base >= 0) {
921 dev->tbusy=0;
922 }
923
924 dev_kfree_skb (skb, FREE_WRITE);
925 }
926
927 return 0;
928 }
929
930 /*
931 ** The DEPCA interrupt handler.
932 */
933 static void
934 depca_interrupt(int reg_ptr)
/* */
935 {
936 int irq = -(((struct pt_regs *)reg_ptr)->orig_eax+2);
937 struct device *dev = (struct device *)(irq2dev_map[irq]);
938 struct depca_private *lp;
939 int csr0, ioaddr, nicsr;
940
941 if (dev == NULL) {
942 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
943 } else {
944 lp = (struct depca_private *)dev->priv;
945 ioaddr = dev->base_addr;
946
947 if (dev->interrupt)
948 printk("%s: Re-entering the interrupt handler.\n", dev->name);
949
950 dev->interrupt = MASK_INTERRUPTS;
951
952 /* mask the DEPCA board interrupts and turn on the LED */
953 nicsr = inb(DEPCA_NICSR);
954 nicsr |= (IM|LED);
955 outb(nicsr, DEPCA_NICSR);
956
957 outw(CSR0, DEPCA_ADDR);
958 csr0 = inw(DEPCA_DATA);
959
960 /* Acknowledge all of the current interrupt sources ASAP. */
961 outw(csr0 & ~(INEA|TDMD|STOP|STRT|INIT), DEPCA_DATA);
962
963 if (depca_debug > 5)
964 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
965 dev->name, csr0, inw(DEPCA_DATA));
966
967 if (csr0 & RINT) /* Rx interrupt (packet arrived) */
968 depca_rx(dev);
969
970 if (csr0 & TINT) /* Tx interrupt (packet sent) */
971 depca_tx(dev);
972
973 /* Clear the interrupts we've handled. */
974 outw(CSR0, DEPCA_ADDR);
975 outw(BABL|CERR|MISS|MERR|RINT|TINT|IDON|INEA, DEPCA_DATA);
976
977 if (depca_debug > 4) {
978 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
979 dev->name, inw(DEPCA_ADDR),
980 inw(DEPCA_DATA));
981 }
982
983 /* Unmask the DEPCA board interrupts and turn off the LED */
984 nicsr = (nicsr & ~IM & ~LED);
985 outb(nicsr, DEPCA_NICSR);
986 dev->interrupt = UNMASK_INTERRUPTS;
987 }
988
989 return;
990 }
991
992 static int
993 depca_rx(struct device *dev)
/* */
994 {
995 struct depca_private *lp = (struct depca_private *)dev->priv;
996 int entry = lp->cur_rx & lp->rmask;
997
998 /* If we own the next entry, it's a new packet. Send it up. */
999 for (; lp->rx_ring[entry].base >= 0; entry = (++lp->cur_rx) & lp->rmask) {
1000 int status = lp->rx_ring[entry].base >> 16 ;
1001 int chained;
1002
1003 /*
1004 ** There is a tricky error noted by John Murphy, <murf@perftech.com>
1005 ** to Russ Nelson: even with full-sized buffers, it's possible for a
1006 ** jabber packet to use two buffers, with only the last one correctly
1007 ** noting the error.
1008 */
1009
1010 /* Check for a chaining buffer */
1011 chained = 0;
1012 if (status == R_STP) {
1013 chained = 1;
1014
1015 /*
1016 ** Wait for next buffer to complete to check for errors. This
1017 ** is slow but infrequent and allows for correct hardware buffer
1018 ** chaining (whilst defeating the chaining's purpose).
1019 */
1020 while ((status=(lp->rx_ring[(entry+1)&lp->rmask].base >> 16)) < 0);
1021
1022 /* NB: 'status' now comes from the buffer following 'entry'. */
1023 }
1024
1025 if (status & R_ERR) { /* There was an error. */
1026 lp->stats.rx_errors++; /* Update the error stats. */
1027 if (status & R_FRAM) lp->stats.rx_frame_errors++;
1028 if (status & R_OFLO) lp->stats.rx_over_errors++;
1029 if (status & R_CRC) lp->stats.rx_crc_errors++;
1030 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
1031 } else { /* Malloc up new buffer, compatible with net-2e. */
1032 short pkt_len = lp->rx_ring[entry].msg_length;
1033 struct sk_buff *skb;
1034
1035 skb = alloc_skb(pkt_len, GFP_ATOMIC);
1036 if (skb == NULL) {
1037 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1038 lp->stats.rx_dropped++; /* Really, deferred. */
1039 break;
1040 }
1041 skb->len = pkt_len;
1042 skb->dev = dev;
1043 memcpy(skb->data,
1044 (unsigned char *)((lp->rx_ring[entry].base+lp->bus_offset) &
1045 0x00ffffff),
1046 pkt_len);
1047 /*
1048 ** Notify the upper protocol layers that there is another
1049 ** packet to handle
1050 */
1051 netif_rx(skb);
1052 lp->stats.rx_packets++;
1053 }
1054
1055 /* turn over ownership of the current entry back to the LANCE */
1056 lp->rx_ring[entry].base |= R_OWN;
1057 if (chained && (status & R_ERR)) { /* next entry also bad */
1058 entry = (++lp->cur_rx) & lp->rmask;
1059 lp->rx_ring[entry].base |= R_OWN;
1060 }
1061 }
1062
1063 /*
1064 ** We should check that at least two ring entries are free. If not,
1065 ** we should free one and mark stats->rx_dropped++.
1066 */
1067
1068 return 0;
1069 }
1070
1071 /*
1072 ** Buffer sent - check for buffer errors.
1073 */
1074 static int
1075 depca_tx(struct device *dev)
/* */
1076 {
1077 struct depca_private *lp = (struct depca_private *)dev->priv;
1078 int dirty_tx = lp->dirty_tx & lp->rmask;
1079
1080 if (depca_debug > 5)
1081 printk("%s: Cleaning tx ring, dirty %d clean %d.\n",
1082 dev->name, dirty_tx, (lp->cur_tx & lp->rmask));
1083
1084 /*
1085 ** While the dirty entry is not the current one AND
1086 ** the LANCE doesn't own it...
1087 */
1088 for (; dirty_tx!=(lp->cur_tx & lp->rmask) && lp->tx_ring[dirty_tx].base>0;
1089 dirty_tx = ++lp->dirty_tx & lp->rmask) {
1090 unsigned long *tmdp = (unsigned long *)(&lp->tx_ring[dirty_tx]);
1091 int status = lp->tx_ring[dirty_tx].base >> 16;
1092
1093 if (status < 0) { /* Packet not yet sent! */
1094 printk("interrupt for packet not yet sent!\n");
1095 break;
1096 }
1097 if (status & T_ERR) { /* There was an major error, log it. */
1098 int err_status = lp->tx_ring[dirty_tx].misc;
1099
1100 lp->stats.tx_errors++;
1101 if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1102 if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1103 if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
1104 if (err_status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1105 /* We should re-init() after the FIFO error. */
1106 } else if (status & (T_MORE | T_ONE)) {
1107 lp->stats.collisions++;
1108 } else {
1109 lp->stats.tx_packets++;
1110 }
1111
1112 if (depca_debug > 5)
1113 printk("%s: Tx done entry %d, %4.4lx %4.4lx %4.4lx %4.4lx.\n",
1114 dev->name, dirty_tx,
1115 tmdp[0], tmdp[1], tmdp[2], tmdp[3]);
1116 }
1117 /*mark_bh(INET_BH);*/
1118 return 0;
1119 }
1120
1121 static int
1122 depca_close(struct device *dev)
/* */
1123 {
1124 int ioaddr = dev->base_addr;
1125
1126 dev->start = 0;
1127 dev->tbusy = 1;
1128
1129 outw(CSR0, DEPCA_ADDR);
1130
1131 if (depca_debug > 1) {
1132 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1133 dev->name, inw(DEPCA_DATA));
1134 }
1135
1136 /*
1137 ** We stop the DEPCA here -- it occasionally polls
1138 ** memory if we don't.
1139 */
1140 outw(STOP, DEPCA_DATA);
1141
1142 free_irq(dev->irq);
1143
1144 irq2dev_map[dev->irq] = 0;
1145
1146 #ifdef MODULE
1147 MOD_DEC_USE_COUNT;
1148 #endif
1149
1150 return 0;
1151 }
1152
1153 static void LoadCSRs(struct device *dev)
/* */
1154 {
1155 struct depca_private *lp = (struct depca_private *)dev->priv;
1156 int ioaddr = dev->base_addr;
1157
1158 outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */
1159 outw((unsigned short)((unsigned long)(&lp->init_block) & LA_MASK),
1160 DEPCA_DATA);
1161 outw(CSR2, DEPCA_ADDR); /* initialisation block address MSW */
1162 outw((unsigned short)(((unsigned long)(&lp->init_block) & LA_MASK) >> 16),
1163 DEPCA_DATA);
1164 outw(CSR3, DEPCA_ADDR); /* ALE control */
1165 outw(ACON, DEPCA_DATA);
1166 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */
1167 }
1168
1169 static int InitRestartDepca(struct device *dev)
/* */
1170 {
1171 struct depca_private *lp = (struct depca_private *)dev->priv;
1172 int ioaddr = dev->base_addr;
1173 int i, status=0;
1174
1175 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */
1176 outw(INIT, DEPCA_DATA); /* initialize DEPCA */
1177
1178 /* wait for lance to complete initialisation */
1179 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1180
1181 if (i!=100) {
1182 /* clear IDON by writing a "1", enable interrupts and start lance */
1183 outw(IDON | INEA | STRT, DEPCA_DATA);
1184 if (depca_debug > 2) {
1185 printk("%s: DEPCA open after %d ticks, init block %#lx csr0 %4.4x.\n",
1186 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1187 }
1188 } else {
1189 status = -1;
1190 printk("%s: DEPCA unopened after %d ticks, init block %#lx csr0 %4.4x.\n",
1191 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1192 }
1193
1194 return status;
1195 }
1196
1197 static struct enet_statistics *
1198 depca_get_stats(struct device *dev)
/* */
1199 {
1200 struct depca_private *lp = (struct depca_private *)dev->priv;
1201
1202 /* Null body since there is no framing error counter */
1203
1204 return &lp->stats;
1205 }
1206
1207 #ifdef HAVE_MULTICAST
1208 /*
1209 ** Set or clear the multicast filter for this adaptor.
1210 ** num_addrs == -1 Promiscuous mode, receive all packets
1211 ** num_addrs == 0 Normal mode, clear multicast list
1212 ** num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1213 ** best-effort filtering.
1214 */
1215 static void
1216 set_multicast_list(struct device *dev, int num_addrs, void *addrs)
/* */
1217 {
1218 short ioaddr = dev->base_addr;
1219 struct depca_private *lp = (struct depca_private *)dev->priv;
1220
1221 /* We take the simple way out and always enable promiscuous mode. */
1222 STOP_DEPCA; /* Temporarily stop the depca. */
1223
1224 lp->init_block.mode = PROM; /* Set promiscuous mode */
1225 if (num_addrs >= 0) {
1226 short multicast_table[4];
1227 int i;
1228
1229 SetMulticastFilter(num_addrs, (char *)addrs, (char *)multicast_table);
1230
1231 /* We don't use the multicast table, but rely on upper-layer filtering. */
1232 memset(multicast_table, (num_addrs==0) ? 0 : -1, sizeof(multicast_table));
1233
1234 for (i = 0; i < 4; i++) {
1235 lp->init_block.filter[i] = multicast_table[i];
1236 }
1237 lp->init_block.mode &= ~PROM; /* Unset promiscuous mode */
1238 } else {
1239 lp->init_block.mode |= PROM; /* Set promiscuous mode */
1240 }
1241
1242 outw(CSR0, DEPCA_ADDR);
1243 outw(IDON|INEA|STRT, DEPCA_DATA); /* Resume normal operation. */
1244 }
1245
1246 /*
1247 ** Calculate the hash code and update the logical address filter
1248 ** from a list of ethernet multicast addresses.
1249 ** Derived from a 'C' program in the AMD data book:
1250 ** "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)",
1251 ** Pub #17781, Rev. A, May 1993
1252 */
1253 static void SetMulticastFilter(int num_addrs, char *addrs, char *multicast_table)
/* */
1254 {
1255 char j, ctrl, bit, octet, hashcode;
1256 short int i;
1257 long int CRC, poly = (long int) CRC_POLYNOMIAL;
1258
1259 for (i=0;i<num_addrs;i++) { /* for each address in the list */
1260 if (((char) *(addrs+ETH_ALEN*i) & 0x01) == 1) {/* is multicast address? */
1261 CRC = (long int) 0xffffffff; /* init CRC for each address */
1262 for (octet=0;octet<ETH_ALEN;octet++) { /* for each address octet */
1263 for(j=0;j<8;j++) { /* process each address bit */
1264 bit = (((char)* (addrs+ETH_ALEN*i+octet)) >> j) & 0x01;
1265 ctrl = ((CRC < 0) ? 1 : 0); /* shift the control bit */
1266 CRC <<= 1; /* shift the CRC */
1267 if (bit ^ ctrl) { /* (bit) XOR (control bit) */
1268 CRC ^= poly; /* (CRC) XOR (polynomial) */
1269 }
1270 }
1271 }
1272 hashcode = (CRC & 0x00000001); /* hashcode is 6 LSb of CRC ... */
1273 for (j=0;j<5;j++) { /* ... in reverse order. */
1274 hashcode <<= 1;
1275 CRC >>= 1;
1276 hashcode |= (CRC & 0x00000001);
1277 }
1278 octet = hashcode >> 3; /* bit[3-5] -> octet in filter */
1279 /* bit[0-2] -> bit in octet */
1280 multicast_table[octet] |= (1 << (hashcode & 0x07));
1281 }
1282 }
1283 return;
1284 }
1285
1286 #endif /* HAVE_MULTICAST */
1287
1288 #ifndef MODULE
1289 /*
1290 ** ISA bus I/O device probe
1291 */
1292 static struct device *isa_probe(dev)
/* */
1293 struct device *dev;
1294 {
1295 int *port, ports[] = DEPCA_IO_PORTS;
1296 int status;
1297
1298 for (status = -ENODEV, port = &ports[0];
1299 *port && (num_depcas < MAX_NUM_DEPCAS); port++) {
1300 int ioaddr = *port;
1301
1302 if (DevicePresent(ioaddr) == 0) {
1303 if (num_depcas > 0) { /* only gets here in autoprobe */
1304 dev = alloc_device(dev, ioaddr);
1305 } else {
1306 if ((status = depca_probe1(dev, ioaddr)) == 0) {
1307 num_depcas++;
1308 }
1309 }
1310 num_eth++;
1311 }
1312 }
1313 return dev;
1314 }
1315
1316 /*
1317 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1318 ** the motherboard.
1319 */
1320 static struct device *eisa_probe(dev)
/* */
1321 struct device *dev;
1322 {
1323 int i, ioaddr = DEPCA_EISA_IO_PORTS;
1324 int status;
1325
1326 ioaddr+=0x1000; /* get the first slot address */
1327 for (status = -ENODEV, i=1; i<MAX_EISA_SLOTS; i++, ioaddr+=0x1000) {
1328
1329 if (DevicePresent(ioaddr) == 0) {
1330 if (num_depcas > 0) { /* only gets here in autoprobe */
1331 dev = alloc_device(dev, ioaddr);
1332 } else {
1333 if ((status = depca_probe1(dev, ioaddr)) == 0) {
1334 num_depcas++;
1335 }
1336 }
1337 num_eth++;
1338 }
1339 }
1340 return dev;
1341 }
1342
1343 /*
1344 ** Allocate the device by pointing to the next available space in the
1345 ** device structure. Should one not be available, it is created.
1346 */
1347 static struct device *alloc_device(dev, ioaddr)
/* */
1348 struct device *dev;
1349 int ioaddr;
1350 {
1351 /*
1352 ** Check the device structures for an end of list or unused device
1353 */
1354 while (dev->next != (struct device *)NULL) {
1355 if (dev->next->base_addr == 0xffe0) break;
1356 dev = dev->next; /* walk through eth device list */
1357 num_eth++; /* increment eth device number */
1358 }
1359
1360 /*
1361 ** If no more device structures, malloc one up. If memory could
1362 ** not be allocated, print an error message.
1363 */
1364 if (dev->next == (struct device *)NULL) {
1365 dev->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1366 GFP_KERNEL);
1367 if (dev->next == (struct device *)NULL) {
1368 printk("eth%d: Device not initialised, insufficient memory\n",
1369 num_eth);
1370 }
1371 }
1372
1373 /*
1374 ** If the memory was allocated, point to the new memory area
1375 ** and initialize it (name, I/O address, next device (NULL) and
1376 ** initialisation probe routine).
1377 */
1378 if ((dev->next != (struct device *)NULL) &&
1379 (num_eth > 0) && (num_eth < 9999)) {
1380 dev = dev->next; /* point to the new device */
1381 dev->name = (char *)(dev + sizeof(struct device));
1382 sprintf(dev->name,"eth%d", num_eth);/* New device name */
1383 dev->base_addr = ioaddr; /* assign the io address */
1384 dev->next = (struct device *)NULL; /* mark the end of list */
1385 dev->init = &depca_probe; /* initialisation routine */
1386 num_depcas++;
1387 }
1388
1389 return dev;
1390 }
1391 #endif /* MODULE */
1392
1393 /*
1394 ** Look for a particular board name in the on-board Remote Diagnostics
1395 ** and Boot (RDB) ROM. This will also give us a clue to the network RAM
1396 ** base address.
1397 */
1398 static char *DepcaSignature(unsigned long mem_addr)
/* */
1399 {
1400 unsigned long i,j,k;
1401 static char signatures[][DEPCA_NAME_LENGTH] = DEPCA_SIGNATURE;
1402 static char thisName[DEPCA_NAME_LENGTH];
1403 char tmpstr[17];
1404
1405 for (i=0;i<16;i++) { /* copy the first 16 bytes of ROM to */
1406 tmpstr[i] = *(unsigned char *)(mem_addr+0xc000+i); /* a temporary string */
1407 }
1408 tmpstr[i]=(char)NULL;
1409
1410 strcpy(thisName,"");
1411 for (i=0;*signatures[i]!=(char)NULL && *thisName==(char)NULL;i++) {
1412 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {
1413 if (signatures[i][k] == tmpstr[j]) { /* track signature */
1414 k++;
1415 } else { /* lost signature; begin search again */
1416 k=0;
1417 }
1418 }
1419 if (k == strlen(signatures[i])) {
1420 strcpy(thisName,signatures[i]);
1421 }
1422 }
1423
1424 return thisName; /* return the device name string */
1425 }
1426
1427 /*
1428 ** Look for a special sequence in the Ethernet station address PROM that
1429 ** is common across all DEPCA products. Note that the original DEPCA needs
1430 ** its ROM address counter to be initialized and enabled. Only enable
1431 ** if the first address octet is a 0x08 - this minimises the chances of
1432 ** messing around with some other hardware, but it assumes that this DEPCA
1433 ** card initialized itself correctly. It also assumes that all past and
1434 ** future DEPCA/EtherWORKS cards will have ethernet addresses beginning with
1435 ** a 0x08.
1436 */
1437
1438 static int DevicePresent(short ioaddr)
/* */
1439 {
1440 static short fp=1,sigLength=0;
1441 static char devSig[] = PROBE_SEQUENCE;
1442 char data;
1443 int i, j, nicsr, status = 0;
1444 static char asc2hex(char value);
1445
1446 /*
1447 ** Initialize the counter on a DEPCA card. Two reads to ensure DEPCA ethernet
1448 ** address counter is a) cleared and b) the correct data read.
1449 */
1450 data = inb(DEPCA_PROM); /* clear counter */
1451 data = inb(DEPCA_PROM); /* read data */
1452
1453 /*
1454 ** Enable counter
1455 */
1456 if (data == 0x08) {
1457 nicsr = inb(DEPCA_NICSR);
1458 nicsr |= AAC;
1459 outb(nicsr, DEPCA_NICSR);
1460 }
1461
1462 /*
1463 ** Convert the ascii signature to a hex equivalent & pack in place
1464 */
1465 if (fp) { /* only do this once!... */
1466 for (i=0,j=0;devSig[i]!=(char)NULL && !status;i+=2,j++) {
1467 if ((devSig[i]=asc2hex(devSig[i]))>=0) {
1468 devSig[i]<<=4;
1469 if((devSig[i+1]=asc2hex(devSig[i+1]))>=0){
1470 devSig[j]=devSig[i]+devSig[i+1];
1471 } else {
1472 status= -1;
1473 }
1474 } else {
1475 status= -1;
1476 }
1477 }
1478 sigLength=j;
1479 fp = 0;
1480 }
1481
1482 /*
1483 ** Search the Ethernet address ROM for the signature. Since the ROM address
1484 ** counter can start at an arbitrary point, the search must include the entire
1485 ** probe sequence length plus the (length_of_the_signature - 1).
1486 ** Stop the search IMMEDIATELY after the signature is found so that the
1487 ** PROM address counter is correctly positioned at the start of the
1488 ** ethernet address for later read out.
1489 */
1490 if (!status) {
1491 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
1492 data = inb(DEPCA_PROM);
1493 if (devSig[j] == data) { /* track signature */
1494 j++;
1495 } else { /* lost signature; begin search again */
1496 j=0;
1497 }
1498 }
1499
1500 if (j!=sigLength) {
1501 status = -ENODEV; /* search failed */
1502 }
1503 }
1504
1505 return status;
1506 }
1507
1508 static char asc2hex(char value)
/* */
1509 {
1510 value -= 0x30; /* normalise to 0..9 range */
1511 if (value >= 0) {
1512 if (value > 9) { /* but may not be 10..15 */
1513 value &= 0x1f; /* make A..F & a..f be the same */
1514 value -= 0x07; /* normalise to 10..15 range */
1515 if ((value < 0x0a) || (value > 0x0f)) { /* if outside range then... */
1516 value = -1; /* ...signal error */
1517 }
1518 }
1519 } else { /* outside 0..9 range... */
1520 value = -1; /* ...signal error */
1521 }
1522 return value; /* return hex char or error */
1523 }
1524
1525 #ifdef MODULE
1526 char kernel_version[] = UTS_RELEASE;
1527 static struct device thisDepca = {
1528 " ", /* device name inserted by /linux/drivers/net/net_init.c */
1529 0, 0, 0, 0,
1530 0x200, 7, /* I/O address, IRQ <--- EDIT THIS LINE FOR YOUR CONFIGURATION */
1531 0, 0, 0, NULL, depca_probe };
1532
1533 int
1534 init_module(void)
/* */
1535 {
1536 if (register_netdev(&thisDepca) != 0)
1537 return -EIO;
1538 return 0;
1539 }
1540
1541 void
1542 cleanup_module(void)
/* ![[last]](../icons/n_last.png)
*/
1543 {
1544 if (MOD_IN_USE) {
1545 printk("%s: device busy, remove delayed\n",thisDepca.name);
1546 } else {
1547 unregister_netdev(&thisDepca);
1548 }
1549 }
1550 #endif /* MODULE */
1551
1552
1553 /*
1554 * Local variables:
1555 * kernel-compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c depca.c"
1556 *
1557 * module-compile-command: "gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c depca.c"
1558 * End:
1559 */
![[bottom]](../icons/n_bottom.png){kind=icon}
*/