root/include/linux/fdreg.h

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INCLUDED FROM


   1 #ifndef _LINUX_FDREG_H
   2 #define _LINUX_FDREG_H
   3 /*
   4  * This file contains some defines for the floppy disk controller.
   5  * Various sources. Mostly "IBM Microcomputers: A Programmers
   6  * Handbook", Sanches and Canton.
   7  */
   8 
   9 #ifdef FDPATCHES
  10 /* Fd controller regs. S&C, about page 340 */
  11 #define FD_STATUS       (4 + fdc_state[fdc].address )
  12 #define FD_DATA         (5 + fdc_state[fdc].address )
  13 
  14 /* Digital Output Register */
  15 #define FD_DOR          (2 + fdc_state[fdc].address )
  16 
  17 /* Digital Input Register (read) */
  18 #define FD_DIR          (7 + fdc_state[fdc].address )
  19 
  20 /* Diskette Control Register (write)*/
  21 #define FD_DCR          (7 + fdc_state[fdc].address )
  22 
  23 #else
  24 
  25 #define FD_STATUS       0x3f4
  26 #define FD_DATA         0x3f5
  27 #define FD_DOR          0x3f2           /* Digital Output Register */
  28 #define FD_DIR          0x3f7           /* Digital Input Register (read) */
  29 #define FD_DCR          0x3f7           /* Diskette Control Register (write)*/
  30 
  31 #endif
  32 
  33 /* Bits of main status register */
  34 #define STATUS_BUSYMASK 0x0F            /* drive busy mask */
  35 #define STATUS_BUSY     0x10            /* FDC busy */
  36 #define STATUS_DMA      0x20            /* 0- DMA mode */
  37 #define STATUS_DIR      0x40            /* 0- cpu->fdc */
  38 #define STATUS_READY    0x80            /* Data reg ready */
  39 
  40 /* Bits of FD_ST0 */
  41 #define ST0_DS          0x03            /* drive select mask */
  42 #define ST0_HA          0x04            /* Head (Address) */
  43 #define ST0_NR          0x08            /* Not Ready */
  44 #define ST0_ECE         0x10            /* Equipment chech error */
  45 #define ST0_SE          0x20            /* Seek end */
  46 #define ST0_INTR        0xC0            /* Interrupt code mask */
  47 
  48 /* Bits of FD_ST1 */
  49 #define ST1_MAM         0x01            /* Missing Address Mark */
  50 #define ST1_WP          0x02            /* Write Protect */
  51 #define ST1_ND          0x04            /* No Data - unreadable */
  52 #define ST1_OR          0x10            /* OverRun */
  53 #define ST1_CRC         0x20            /* CRC error in data or addr */
  54 #define ST1_EOC         0x80            /* End Of Cylinder */
  55 
  56 /* Bits of FD_ST2 */
  57 #define ST2_MAM         0x01            /* Missing Addess Mark (again) */
  58 #define ST2_BC          0x02            /* Bad Cylinder */
  59 #define ST2_SNS         0x04            /* Scan Not Satisfied */
  60 #define ST2_SEH         0x08            /* Scan Equal Hit */
  61 #define ST2_WC          0x10            /* Wrong Cylinder */
  62 #define ST2_CRC         0x20            /* CRC error in data field */
  63 #define ST2_CM          0x40            /* Control Mark = deleted */
  64 
  65 /* Bits of FD_ST3 */
  66 #define ST3_HA          0x04            /* Head (Address) */
  67 #define ST3_DS          0x08            /* drive is double-sided */
  68 #define ST3_TZ          0x10            /* Track Zero signal (1=track 0) */
  69 #define ST3_RY          0x20            /* drive is ready */
  70 #define ST3_WP          0x40            /* Write Protect */
  71 #define ST3_FT          0x80            /* Drive Fault */
  72 
  73 /* Values for FD_COMMAND */
  74 #define FD_RECALIBRATE          0x07    /* move to track 0 */
  75 #define FD_SEEK                 0x0F    /* seek track */
  76 #define FD_READ                 0xE6    /* read with MT, MFM, SKip deleted */
  77 #define FD_WRITE                0xC5    /* write with MT, MFM */
  78 #define FD_SENSEI               0x08    /* Sense Interrupt Status */
  79 #define FD_SPECIFY              0x03    /* specify HUT etc */
  80 #define FD_FORMAT               0x4D    /* format one track */
  81 #define FD_VERSION              0x10    /* get version code */
  82 #define FD_CONFIGURE            0x13    /* configure FIFO operation */
  83 #define FD_PERPENDICULAR        0x12    /* perpendicular r/w mode */
  84 #define FD_GETSTATUS            0x04    /* read ST3 */
  85 #define FD_DUMPREGS             0x0E    /* dump the contents of the fdc regs */
  86 #define FD_READID               0xEA    /* prints the header of a sector */
  87 #define FD_UNLOCK               0x14    /* Fifo config unlock */
  88 #define FD_LOCK                 0x94    /* Fifo config lock */
  89 
  90 /* DMA commands */
  91 #define DMA_READ        0x46
  92 #define DMA_WRITE       0x4A
  93 
  94 /* FDC version return types */
  95 #define FDC_NONE        0x00
  96 #define FDC_UNKNOWN     0x10
  97 #define FDC_8272A       0x20    /* Intel 8272a, NEC 765 */
  98 #define FDC_765ED       0x30    /* Non-Intel 1MB-compatible FDC, can't detect */
  99 #define FDC_82072       0x40    /* Intel 82072; 8272a + FIFO + DUMPREGS */
 100 #define FDC_82077_ORIG  0x50    /* Original version of 82077AA, sans LOCK */
 101 #define FDC_82077       0x52    /* 82077AA-1 */
 102 
 103 #define FD_RESET_DELAY 20
 104 #endif

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