taglinefilesource code
reg_sub40drivers/FPU-emu/fpu_arith.creg_sub(&st(0), &st(FPU_rm), &st(0), control_word);
reg_sub48drivers/FPU-emu/fpu_arith.creg_sub(&st(FPU_rm), &st(0), &st(0), control_word);
reg_sub91drivers/FPU-emu/fpu_arith.creg_sub(&st(0), &st(FPU_rm), &st(FPU_rm), control_word);
reg_sub101drivers/FPU-emu/fpu_arith.creg_sub(&st(FPU_rm), &st(0), &st(FPU_rm), control_word);
reg_sub147drivers/FPU-emu/fpu_arith.cif ( !reg_sub(&st(0), &st(FPU_rm), &st(FPU_rm), control_word) )
reg_sub158drivers/FPU-emu/fpu_arith.cif ( !reg_sub(&st(FPU_rm), &st(0), &st(FPU_rm), control_word) )
reg_sub458drivers/FPU-emu/fpu_entry.creg_sub(st0_ptr, &loaded_data, st0_ptr,
reg_sub463drivers/FPU-emu/fpu_entry.creg_sub(&loaded_data, st0_ptr, st0_ptr,
reg_sub97drivers/FPU-emu/fpu_proto.hextern int reg_sub(FPU_REG const *a, FPU_REG const *b,
reg_sub82drivers/FPU-emu/fpu_trig.creg_sub(&CONST_PI2, X, X, FULL_PRECISION);
reg_sub126drivers/FPU-emu/fpu_trig.creg_sub(X, &tmp, X, FULL_PRECISION);
reg_sub137drivers/FPU-emu/fpu_trig.creg_sub(&CONST_PI, X, X, FULL_PRECISION);