tag	line	file	source code
iobase	200	drivers/net/3c509.c	unsigned short iobase = id_read_eeprom(8);
iobase	201	drivers/net/3c509.c	if_port = iobase >> 14;
iobase	202	drivers/net/3c509.c	ioaddr = 0x200 + ((iobase & 0x1f) << 4);
iobase	299	drivers/net/ewrk3.c	static int  ewrk3_hw_init(struct device *dev, short iobase);
iobase	305	drivers/net/ewrk3.c	static int  DevicePresent(short iobase);
iobase	308	drivers/net/ewrk3.c	static int  Read_EEPROM(short iobase, unsigned char eaddr);
iobase	309	drivers/net/ewrk3.c	static int  Write_EEPROM(short data, short iobase, unsigned char eaddr);
iobase	315	drivers/net/ewrk3.c	static struct device *alloc_device(struct device *dev, int iobase);
iobase	382	drivers/net/ewrk3.c	ewrk3_hw_init(struct device *dev, short iobase)
iobase	395	drivers/net/ewrk3.c	if (iobase > 0x400) eisa_cr = inb(EISA_CR);
iobase	416	drivers/net/ewrk3.c	tmp.val = (short)Read_EEPROM(iobase, (i>>1));
iobase	433	drivers/net/ewrk3.c	dev->base_addr = iobase;
iobase	435	drivers/net/ewrk3.c	if (iobase > 0x400) {
iobase	444	drivers/net/ewrk3.c	printk("%s: %s at %#3x", dev->name, name, iobase);
iobase	446	drivers/net/ewrk3.c	} else if ((iobase&0x0fff)==EWRK3_EISA_IO_PORTS) {
iobase	449	drivers/net/ewrk3.c	dev->name, name, iobase, ((iobase>>12)&0x0f));
iobase	451	drivers/net/ewrk3.c	printk("%s: %s at %#3x", dev->name, name, iobase);
iobase	465	drivers/net/ewrk3.c	DevicePresent(iobase);          /* needed after the EWRK3_INIT */
iobase	636	drivers/net/ewrk3.c	int i, iobase = dev->base_addr;
iobase	714	drivers/net/ewrk3.c	short iobase = dev->base_addr;
iobase	748	drivers/net/ewrk3.c	int iobase = dev->base_addr;
iobase	899	drivers/net/ewrk3.c	int iobase;
iobase	906	drivers/net/ewrk3.c	iobase = dev->base_addr;
iobase	963	drivers/net/ewrk3.c	int i, iobase = dev->base_addr;
iobase	1106	drivers/net/ewrk3.c	int iobase = dev->base_addr;
iobase	1141	drivers/net/ewrk3.c	int iobase = dev->base_addr;
iobase	1203	drivers/net/ewrk3.c	int iobase = dev->base_addr;
iobase	1238	drivers/net/ewrk3.c	int iobase = dev->base_addr;
iobase	1319	drivers/net/ewrk3.c	int i, iobase, status;
iobase	1322	drivers/net/ewrk3.c	for (status = -ENODEV, iobase = EWRK3_IO_BASE,i = 0;
iobase	1324	drivers/net/ewrk3.c	iobase += EWRK3_IOP_INC, i++) {
iobase	1326	drivers/net/ewrk3.c	if (DevicePresent(iobase) == 0) {
iobase	1332	drivers/net/ewrk3.c	dev = alloc_device(dev, iobase);
iobase	1334	drivers/net/ewrk3.c	if ((status = ewrk3_hw_init(dev, iobase)) == 0) {
iobase	1340	drivers/net/ewrk3.c	mem_chkd &= ~(0x01 << ((iobase - EWRK3_IO_BASE)/EWRK3_IOP_INC));
iobase	1355	drivers/net/ewrk3.c	int i, iobase = EWRK3_EISA_IO_PORTS;
iobase	1358	drivers/net/ewrk3.c	iobase+=EISA_SLOT_INC;            /* get the first slot address */
iobase	1359	drivers/net/ewrk3.c	for (status = -ENODEV, i=1; i<MAX_EISA_SLOTS; i++, iobase+=EISA_SLOT_INC) {
iobase	1361	drivers/net/ewrk3.c	if (DevicePresent(iobase) == 0) {
iobase	1368	drivers/net/ewrk3.c	dev = alloc_device(dev, iobase);
iobase	1370	drivers/net/ewrk3.c	if ((status = ewrk3_hw_init(dev, iobase)) == 0) {
iobase	1384	drivers/net/ewrk3.c	static struct device *alloc_device(struct device *dev, int iobase)
iobase	1418	drivers/net/ewrk3.c	dev->base_addr = iobase;            /* assign the io address */
iobase	1431	drivers/net/ewrk3.c	static int Read_EEPROM(short iobase, unsigned char eaddr)
iobase	1445	drivers/net/ewrk3.c	static int Write_EEPROM(short data, short iobase, unsigned char eaddr)
iobase	1494	drivers/net/ewrk3.c	static int DevicePresent(short iobase)
iobase	1553	drivers/net/ewrk3.c	int iobase = dev->base_addr;
iobase	1587	drivers/net/ewrk3.c	int i, j, iobase = dev->base_addr, status = 0;
iobase	1728	drivers/net/ewrk3.c	tmp.val[i] = (short)Read_EEPROM(iobase, i);
iobase	1746	drivers/net/ewrk3.c	Write_EEPROM(tmp.val[i], iobase, i);
iobase	18	drivers/net/ewrk3.h	#define EWRK3_CSR    iobase+0x00   /* Control and Status Register */
iobase	19	drivers/net/ewrk3.h	#define EWRK3_CR     iobase+0x01   /* Control Register */
iobase	20	drivers/net/ewrk3.h	#define EWRK3_ICR    iobase+0x02   /* Interrupt Control Register */
iobase	21	drivers/net/ewrk3.h	#define EWRK3_TSR    iobase+0x03   /* Transmit Status Register */
iobase	22	drivers/net/ewrk3.h	#define EWRK3_RSVD1  iobase+0x04   /* RESERVED */
iobase	23	drivers/net/ewrk3.h	#define EWRK3_RSVD2  iobase+0x05   /* RESERVED */
iobase	24	drivers/net/ewrk3.h	#define EWRK3_FMQ    iobase+0x06   /* Free Memory Queue */
iobase	25	drivers/net/ewrk3.h	#define EWRK3_FMQC   iobase+0x07   /* Free Memory Queue Counter */
iobase	26	drivers/net/ewrk3.h	#define EWRK3_RQ     iobase+0x08   /* Receive Queue */
iobase	27	drivers/net/ewrk3.h	#define EWRK3_RQC    iobase+0x09   /* Receive Queue Counter */
iobase	28	drivers/net/ewrk3.h	#define EWRK3_TQ     iobase+0x0a   /* Transmit Queue */
iobase	29	drivers/net/ewrk3.h	#define EWRK3_TQC    iobase+0x0b   /* Transmit Queue Counter */
iobase	30	drivers/net/ewrk3.h	#define EWRK3_TDQ    iobase+0x0c   /* Transmit Done Queue */
iobase	31	drivers/net/ewrk3.h	#define EWRK3_TDQC   iobase+0x0d   /* Transmit Done Queue Counter */
iobase	32	drivers/net/ewrk3.h	#define EWRK3_PIR1   iobase+0x0e   /* Page Index Register 1 */
iobase	33	drivers/net/ewrk3.h	#define EWRK3_PIR2   iobase+0x0f   /* Page Index Register 2 */
iobase	34	drivers/net/ewrk3.h	#define EWRK3_DATA   iobase+0x10   /* Data Register */
iobase	35	drivers/net/ewrk3.h	#define EWRK3_IOPR   iobase+0x11   /* I/O Page Register */
iobase	36	drivers/net/ewrk3.h	#define EWRK3_IOBR   iobase+0x12   /* I/O Base Register */
iobase	37	drivers/net/ewrk3.h	#define EWRK3_MPR    iobase+0x13   /* Memory Page Register */
iobase	38	drivers/net/ewrk3.h	#define EWRK3_MBR    iobase+0x14   /* Memory Base Register */
iobase	39	drivers/net/ewrk3.h	#define EWRK3_APROM  iobase+0x15   /* Address PROM */
iobase	40	drivers/net/ewrk3.h	#define EWRK3_EPROM1 iobase+0x16   /* EEPROM Data Register 1 */
iobase	41	drivers/net/ewrk3.h	#define EWRK3_EPROM2 iobase+0x17   /* EEPROM Data Register 2 */
iobase	42	drivers/net/ewrk3.h	#define EWRK3_PAR0   iobase+0x18   /* Physical Address Register 0 */
iobase	43	drivers/net/ewrk3.h	#define EWRK3_PAR1   iobase+0x19   /* Physical Address Register 1 */
iobase	44	drivers/net/ewrk3.h	#define EWRK3_PAR2   iobase+0x1a   /* Physical Address Register 2 */
iobase	45	drivers/net/ewrk3.h	#define EWRK3_PAR3   iobase+0x1b   /* Physical Address Register 3 */
iobase	46	drivers/net/ewrk3.h	#define EWRK3_PAR4   iobase+0x1c   /* Physical Address Register 4 */
iobase	47	drivers/net/ewrk3.h	#define EWRK3_PAR5   iobase+0x1d   /* Physical Address Register 5 */
iobase	48	drivers/net/ewrk3.h	#define EWRK3_CMR    iobase+0x1e   /* Configuration/Management Register */
iobase	175	drivers/net/ewrk3.h	#define EISA_ID0      iobase + 0x0c80  /* EISA ID Register 0 */
iobase	176	drivers/net/ewrk3.h	#define EISA_ID1      iobase + 0x0c81  /* EISA ID Register 1 */
iobase	177	drivers/net/ewrk3.h	#define EISA_ID2      iobase + 0x0c82  /* EISA ID Register 2 */
iobase	178	drivers/net/ewrk3.h	#define EISA_ID3      iobase + 0x0c83  /* EISA ID Register 3 */
iobase	179	drivers/net/ewrk3.h	#define EISA_CR       iobase + 0x0c84  /* EISA Control Register */
iobase	215	drivers/scsi/eata.c	static inline unchar wait_on_busy(ushort iobase) {
iobase	218	drivers/scsi/eata.c	while (inb(iobase + REG_AUX_STATUS) & ABSY_ASSERTED)
iobase	224	drivers/scsi/eata.c	static inline unchar do_dma (ushort iobase, unsigned int addr, unchar cmd) {
iobase	226	drivers/scsi/eata.c	if (wait_on_busy(iobase)) return TRUE;
iobase	229	drivers/scsi/eata.c	outb((char)  addr,        iobase + REG_LOW);
iobase	230	drivers/scsi/eata.c	outb((char) (addr >> 8),  iobase + REG_LM);
iobase	231	drivers/scsi/eata.c	outb((char) (addr >> 16), iobase + REG_MID);
iobase	232	drivers/scsi/eata.c	outb((char) (addr >> 24), iobase + REG_MSB);
iobase	235	drivers/scsi/eata.c	outb(cmd, iobase + REG_CMD);
iobase	239	drivers/scsi/eata.c	static inline unchar read_pio (ushort iobase, ushort *start, ushort *end) {
iobase	245	drivers/scsi/eata.c	while (!(inb(iobase + REG_STATUS) & DRQ_ASSERTED))
iobase	249	drivers/scsi/eata.c	*p = inw(iobase);
iobase	244	drivers/scsi/u14-34f.c	static inline unchar wait_on_busy(ushort iobase) {
iobase	247	drivers/scsi/u14-34f.c	while (inb(iobase + REG_LCL_INTR) & BSY_ASSERTED)
iobase	160	drivers/scsi/wd7000.c	int iobase;                       /* This adapter's I/O base address */
iobase	185	drivers/scsi/wd7000.c	int iobase;                   /* I/O ports base address */
iobase	532	drivers/scsi/wd7000.c	outb(host->control, host->iobase+ASC_CONTROL);
iobase	539	drivers/scsi/wd7000.c	outb(host->control,host->iobase+ASC_CONTROL);
iobase	569	drivers/scsi/wd7000.c	WAIT(host->iobase+ASC_STAT,ASC_STATMASK,CMD_RDY,0);
iobase	572	drivers/scsi/wd7000.c	outb(*cmd, host->iobase+ASC_COMMAND);
iobase	573	drivers/scsi/wd7000.c	WAIT(host->iobase+ASC_STAT, ASC_STATMASK, CMD_RDY, 0);
iobase	574	drivers/scsi/wd7000.c	}  while (inb(host->iobase+ASC_STAT) & CMD_REJ);
iobase	798	drivers/scsi/wd7000.c	#define wd7000_intr_ack(host)  outb(0,host->iobase+ASC_INTR_ACK)
iobase	821	drivers/scsi/wd7000.c	flag = inb(host->iobase+ASC_INTR_STAT);
iobase	826	drivers/scsi/wd7000.c	if (!(inb(host->iobase+ASC_STAT) & INT_IM))  {
iobase	1001	drivers/scsi/wd7000.c	outb(ASC_RES, host->iobase+ASC_CONTROL);
iobase	1003	drivers/scsi/wd7000.c	outb(0,host->iobase+ASC_CONTROL);
iobase	1005	drivers/scsi/wd7000.c	WAIT(host->iobase+ASC_STAT, ASC_STATMASK, CMD_RDY, 0);
iobase	1007	drivers/scsi/wd7000.c	if ((diag = inb(host->iobase+ASC_INTR_STAT)) != 1)  {
iobase	1044	drivers/scsi/wd7000.c	WAIT(host->iobase+ASC_STAT, ASC_STATMASK, ASC_INIT, 0);
iobase	1126	drivers/scsi/wd7000.c	if (check_region(cfg->iobase, 4))  {  /* ports in use */
iobase	1127	drivers/scsi/wd7000.c	printk("IO %xh already in use.\n", host->iobase);
iobase	1146	drivers/scsi/wd7000.c	host->iobase = cfg->iobase;
iobase	1163	drivers/scsi/wd7000.c	host->iobase, host->irq, host->dma);
iobase	1165	drivers/scsi/wd7000.c	snarf_region(host->iobase, 4); /* Register our ports */
iobase	1190	drivers/scsi/wd7000.c	if (inb(host->iobase+ASC_STAT) & INT_IM)  {