This source file includes following definitions.
- _get_base
- get_limit
- xchg_u8
- xchg_u16
- xchg_u32
- tas
- xchg_ptr
1 #ifndef __ASM_SYSTEM_H
2 #define __ASM_SYSTEM_H
3
4 #include <asm/segment.h>
5
6 #define move_to_user_mode() \
7 __asm__ __volatile__ ("movl %%esp,%%eax\n\t" \
8 "pushl %0\n\t" \
9 "pushl %%eax\n\t" \
10 "pushfl\n\t" \
11 "pushl %1\n\t" \
12 "pushl $1f\n\t" \
13 "iret\n" \
14 "1:\tmovl %0,%%eax\n\t" \
15 "mov %%ax,%%ds\n\t" \
16 "mov %%ax,%%es\n\t" \
17 "mov %%ax,%%fs\n\t" \
18 "mov %%ax,%%gs" \
19 : :"i" (USER_DS), "i" (USER_CS):"ax")
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34 #define FIRST_TSS_ENTRY 8
35 #define FIRST_LDT_ENTRY (FIRST_TSS_ENTRY+1)
36 #define _TSS(n) ((((unsigned long) n)<<4)+(FIRST_TSS_ENTRY<<3))
37 #define _LDT(n) ((((unsigned long) n)<<4)+(FIRST_LDT_ENTRY<<3))
38 #define load_TR(n) __asm__("ltr %%ax": :"a" (_TSS(n)))
39 #define load_ldt(n) __asm__("lldt %%ax": :"a" (_LDT(n)))
40 #define store_TR(n) \
41 __asm__("str %%ax\n\t" \
42 "subl %2,%%eax\n\t" \
43 "shrl $4,%%eax" \
44 :"=a" (n) \
45 :"0" (0),"i" (FIRST_TSS_ENTRY<<3))
46
47
48
49 #define loaddebug(register) \
50 __asm__("movl %0,%%edx\n\t" \
51 "movl %%edx,%%db" #register "\n\t" \
52 : \
53 :"m" (current->debugreg[register]) \
54 :"dx");
55
56
57
58
59
60
61
62
63
64
65 #define switch_to(tsk) do { \
66 __asm__("cli\n\t" \
67 "xchgl %%ecx,_current\n\t" \
68 "ljmp %0\n\t" \
69 "sti\n\t" \
70 "cmpl %%ecx,_last_task_used_math\n\t" \
71 "jne 1f\n\t" \
72 "clts\n" \
73 "1:" \
74 : \
75 :"m" (*(((char *)&tsk->tss.tr)-4)), \
76 "c" (tsk) \
77 :"cx"); \
78 \
79 if(current->debugreg[7]){ \
80 loaddebug(0); \
81 loaddebug(1); \
82 loaddebug(2); \
83 loaddebug(3); \
84 loaddebug(6); \
85 } \
86 } while (0)
87
88 #define _set_base(addr,base) \
89 __asm__("movw %%dx,%0\n\t" \
90 "rorl $16,%%edx\n\t" \
91 "movb %%dl,%1\n\t" \
92 "movb %%dh,%2" \
93 : \
94 :"m" (*((addr)+2)), \
95 "m" (*((addr)+4)), \
96 "m" (*((addr)+7)), \
97 "d" (base) \
98 :"dx")
99
100 #define _set_limit(addr,limit) \
101 __asm__("movw %%dx,%0\n\t" \
102 "rorl $16,%%edx\n\t" \
103 "movb %1,%%dh\n\t" \
104 "andb $0xf0,%%dh\n\t" \
105 "orb %%dh,%%dl\n\t" \
106 "movb %%dl,%1" \
107 : \
108 :"m" (*(addr)), \
109 "m" (*((addr)+6)), \
110 "d" (limit) \
111 :"dx")
112
113 #define set_base(ldt,base) _set_base( ((char *)&(ldt)) , base )
114 #define set_limit(ldt,limit) _set_limit( ((char *)&(ldt)) , (limit-1)>>12 )
115
116 static inline unsigned long _get_base(char * addr)
117 {
118 unsigned long __base;
119 __asm__("movb %3,%%dh\n\t"
120 "movb %2,%%dl\n\t"
121 "shll $16,%%edx\n\t"
122 "movw %1,%%dx"
123 :"=&d" (__base)
124 :"m" (*((addr)+2)),
125 "m" (*((addr)+4)),
126 "m" (*((addr)+7)));
127 return __base;
128 }
129
130 #define get_base(ldt) _get_base( ((char *)&(ldt)) )
131
132 static inline unsigned long get_limit(unsigned long segment)
133 {
134 unsigned long __limit;
135 __asm__("lsll %1,%0"
136 :"=r" (__limit):"r" (segment));
137 return __limit+1;
138 }
139
140 #define nop() __asm__ __volatile__ ("nop")
141
142
143
144
145 #define clts() __asm__ __volatile__ ("clts")
146 #define stts() \
147 __asm__ __volatile__ ( \
148 "movl %%cr0,%%eax\n\t" \
149 "orl $8,%%eax\n\t" \
150 "movl %%eax,%%cr0" \
151 : \
152 : \
153 :"ax")
154
155
156 extern inline unsigned long xchg_u8(char * m, unsigned long val)
157 {
158 __asm__("xchgb %b0,%1":"=q" (val),"=m" (*m):"0" (val):"memory");
159 return val;
160 }
161
162 extern inline unsigned long xchg_u16(short * m, unsigned long val)
163 {
164 __asm__("xchgw %w0,%1":"=r" (val),"=m" (*m):"0" (val):"memory");
165 return val;
166 }
167
168 extern inline unsigned long xchg_u32(long * m, unsigned long val)
169 {
170 __asm__("xchgl %0,%1":"=r" (val),"=m" (*m):"0" (val):"memory");
171 return val;
172 }
173
174 extern inline int tas(char * m)
175 {
176 return xchg_u8(m,1);
177 }
178
179 extern inline void * xchg_ptr(void * m, void * val)
180 {
181 return (void *) xchg_u32(m, (unsigned long) val);
182 }
183
184 #define sti() __asm__ __volatile__ ("sti": : :"memory")
185 #define cli() __asm__ __volatile__ ("cli": : :"memory")
186
187 #define save_flags(x) \
188 __asm__ __volatile__("pushfl ; popl %0":"=r" (x): :"memory")
189
190 #define restore_flags(x) \
191 __asm__ __volatile__("pushl %0 ; popfl": :"r" (x):"memory")
192
193 #define iret() __asm__ __volatile__ ("iret": : :"memory")
194
195 #define _set_gate(gate_addr,type,dpl,addr) \
196 __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
197 "movw %2,%%dx\n\t" \
198 "movl %%eax,%0\n\t" \
199 "movl %%edx,%1" \
200 :"=m" (*((long *) (gate_addr))), \
201 "=m" (*(1+(long *) (gate_addr))) \
202 :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
203 "d" ((char *) (addr)),"a" (KERNEL_CS << 16) \
204 :"ax","dx")
205
206 #define set_intr_gate(n,addr) \
207 _set_gate(&idt[n],14,0,addr)
208
209 #define set_trap_gate(n,addr) \
210 _set_gate(&idt[n],15,0,addr)
211
212 #define set_system_gate(n,addr) \
213 _set_gate(&idt[n],15,3,addr)
214
215 #define set_call_gate(a,addr) \
216 _set_gate(a,12,3,addr)
217
218 #define _set_seg_desc(gate_addr,type,dpl,base,limit) {\
219 *((gate_addr)+1) = ((base) & 0xff000000) | \
220 (((base) & 0x00ff0000)>>16) | \
221 ((limit) & 0xf0000) | \
222 ((dpl)<<13) | \
223 (0x00408000) | \
224 ((type)<<8); \
225 *(gate_addr) = (((base) & 0x0000ffff)<<16) | \
226 ((limit) & 0x0ffff); }
227
228 #define _set_tssldt_desc(n,addr,limit,type) \
229 __asm__ __volatile__ ("movw $" #limit ",%1\n\t" \
230 "movw %%ax,%2\n\t" \
231 "rorl $16,%%eax\n\t" \
232 "movb %%al,%3\n\t" \
233 "movb $" type ",%4\n\t" \
234 "movb $0x00,%5\n\t" \
235 "movb %%ah,%6\n\t" \
236 "rorl $16,%%eax" \
237 : \
238 :"a" (addr+0xc0000000), "m" (*(n)), "m" (*(n+2)), "m" (*(n+4)), \
239 "m" (*(n+5)), "m" (*(n+6)), "m" (*(n+7)) \
240 )
241
242 #define set_tss_desc(n,addr) _set_tssldt_desc(((char *) (n)),((int)(addr)),235,"0x89")
243 #define set_ldt_desc(n,addr,size) \
244 _set_tssldt_desc(((char *) (n)),((int)(addr)),((size << 3) - 1),"0x82")
245
246
247
248
249
250 extern struct desc_struct default_ldt;
251
252 #endif