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*/
1 /* depca.c: A DIGITAL DEPCA & EtherWORKS ethernet driver for linux.
2
3 Written 1994 by David C. Davies.
4
5
6 Copyright 1994 David C. Davies
7 and
8 United States Government
9 (as represented by the Director, National Security Agency).
10
11
12 This software may be used and distributed according to the terms of
13 the GNU Public License, incorporated herein by reference.
14
15 This driver is written for the Digital Equipment Corporation series
16 of DEPCA and EtherWORKS ethernet cards:
17
18 DEPCA (the original)
19 DE100
20 DE101
21 DE200 Turbo
22 DE201 Turbo
23 DE202 Turbo (TP BNC)
24 DE210
25 DE422 (EISA)
26
27 The driver has been tested on DE100, DE200 and DE202 cards in a
28 relatively busy network. The DE422 has been tested a little.
29
30 This driver will NOT work for the DE203, DE204 and DE205 series of
31 cards, since they have a new custom ASIC in place of the AMD LANCE
32 chip.
33
34 The author may be reached as davies@wanton.lkg.dec.com or
35 Digital Equipment Corporation, 550 King Street, Littleton MA 01460.
36
37 =========================================================================
38 The driver was based on the 'lance.c' driver from Donald Becker which is
39 included with the standard driver distribution for linux. Modifications
40 were made to most routines and the hardware recognition routines were
41 written from scratch. Primary references used were:
42
43 1) Lance.c code in /linux/drivers/net/
44 2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook",
45 AMD, 1992 [(800) 222-9323].
46 3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)",
47 AMD, Pub. #17881, May 1993.
48 4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA",
49 AMD, Pub. #16907, May 1992
50 5) "DEC EtherWORKS LC Ethernet Controller Owners Manual",
51 Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003
52 6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual",
53 Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003
54 7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR
55 Digital Equipment Corporation, 1989
56 8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual",
57 Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001
58
59 Peter Bauer's depca.c (V0.5) was referred to when debugging this driver.
60 The hash filter code was derived from Reference 3 and has been tested
61 only to the extent that the Table A-1, page A-7, was confirmed to fill
62 the filter bit positions correctly. Hash filtering is not yet
63 implemented in the current driver set.
64
65 The original DEPCA card requires that the ethernet ROM address counter
66 be enabled to count and has an 8 bit NICSR. The ROM counter enabling is
67 only done when a 0x08 is read as the first address octet (to minimise
68 the chances of writing over some other hardware's I/O register). The
69 NICSR accesses have been changed to byte accesses for all the cards
70 supported by this driver, since there is only one useful bit in the MSB
71 (remote boot timeout) and it is not used. Also, there is a maximum of
72 only 48kB network RAM for this card. My thanks to Torbjorn Lindh for
73 help debugging all this (and holding my feet to the fire until I got it
74 right).
75
76 The DE200 series boards have on-board 64kB RAM for use as a shared
77 memory network buffer. Only the DE100 cards make use of a 2kB buffer
78 mode which has not been implemented in this driver (only the 32kB and
79 64kB modes are supported [16kB/48kB for the original DEPCA]).
80
81 At the most only 2 DEPCA cards can be supported on the ISA bus because
82 there is only provision for two I/O base addresses on each card (0x300
83 and 0x200). The I/O address is detected by searching for a byte sequence
84 in the Ethernet station address PROM at the expected I/O address for the
85 Ethernet PROM. The shared memory base address is 'autoprobed' by
86 looking for the self test PROM and detecting the card name. When a
87 second DEPCA is detected, information is placed in the base_addr
88 variable of the next device structure (which is created if necessary),
89 thus enabling ethif_probe initialization for the device. More than 2
90 EISA cards can be supported, but care will be needed assigning the
91 shared memory to ensure that each slot has the correct IRQ, I/O address
92 and shared memory address assigned.
93
94 ************************************************************************
95
96 NOTE: If you are using two ISA DEPCAs, it is important that you assign
97 the base memory addresses correctly. The driver autoprobes I/O 0x300
98 then 0x200. The base memory address for the first device must be less
99 than that of the second so that the auto probe will correctly assign the
100 I/O and memory addresses on the same card. I can't think of a way to do
101 this unambiguously at the moment, since there is nothing on the cards to
102 tie I/O and memory information together.
103
104 I am unable to test 2 cards together for now, so this code is
105 unchecked. All reports, good or bad, are welcome.
106
107 ************************************************************************
108
109 The board IRQ setting must be at an unused IRQ which is auto-probed
110 using Donald Becker's autoprobe routines. DEPCA and DE100 board IRQs are
111 {2,3,4,5,7}, whereas the DE200 is at {5,9,10,11,15}. Note that IRQ2 is
112 really IRQ9 in machines with 16 IRQ lines.
113
114 No 16MB memory limitation should exist with this driver as DMA is not
115 used and the common memory area is in low memory on the network card (my
116 current system has 20MB and I've not had problems yet).
117
118 The ability to load this driver as a loadable module has been added. To
119 utilise this ability, you have to do <8 things:
120
121 1) copy depca.c from the /linux/drivers/net directory to your favourite
122 temporary directory.
123 2) edit the source code near line 1530 to reflect the I/O address and
124 IRQ you're using.
125 3) compile depca.c, but include -DMODULE in the command line to ensure
126 that the correct bits are compiled (see end of source code).
127 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
128 kernel with the depca configuration turned off and reboot.
129 5) insmod depca.o
130 6) run the net startup bits for your eth?? interface manually
131 (usually /etc/rc.inet[12] at boot time).
132 7) enjoy!
133
134 Note that autoprobing is not allowed in loadable modules - the system is
135 already up and running and you're messing with interrupts. Also, there
136 is no way to check on the number of depcas installed at the moment.
137
138 To unload a module, turn off the associated interface
139 'ifconfig eth?? down' then 'rmmod depca'.
140
141 TO DO:
142 ------
143
144 1. Implement the 2k buffer mode - does anyone need it??
145
146 Revision History
147 ----------------
148
149 Version Date Description
150
151 0.1 25-jan-94 Initial writing.
152 0.2 27-jan-94 Added LANCE TX hardware buffer chaining.
153 0.3 1-feb-94 Added multiple DEPCA support.
154 0.31 4-feb-94 Added DE202 recognition.
155 0.32 19-feb-94 Tidy up. Improve multi-DEPCA support.
156 0.33 25-feb-94 Fix DEPCA ethernet ROM counter enable.
157 Add jabber packet fix from murf@perftech.com
158 and becker@super.org
159 0.34 7-mar-94 Fix DEPCA max network memory RAM & NICSR access.
160 0.35 8-mar-94 Added DE201 recognition. Tidied up.
161 0.351 30-apr-94 Added EISA support. Added DE422 recognition.
162 0.36 16-may-94 DE422 fix released.
163 0.37 22-jul-94 Added MODULE support
164 0.38 15-aug-94 Added DBR ROM switch in depca_close().
165 Multi DEPCA bug fix.
166 0.38axp 15-sep-94 Special version for Alpha AXP Linux V1.0
167 0.381 12-dec-94 Added DE101 recognition, fix multicast bug
168
169 =========================================================================
170 */
171
172 static char *version = "depca.c:v0.381 12/12/94 davies@wanton.lkg.dec.com\n";
173
174 #include <stdarg.h>
175 #include <linux/config.h>
176 #include <linux/kernel.h>
177 #include <linux/sched.h>
178 #include <linux/string.h>
179 #include <linux/ptrace.h>
180 #include <linux/errno.h>
181 #include <linux/ioport.h>
182 #include <linux/malloc.h>
183 #include <linux/interrupt.h>
184 #include <asm/bitops.h>
185 #include <asm/io.h>
186 #include <asm/dma.h>
187
188 #include <linux/netdevice.h>
189 #include <linux/etherdevice.h>
190 #include <linux/skbuff.h>
191
192 #ifdef MODULE
193 #include <linux/module.h>
194 #include <linux/version.h>
195 #endif /* MODULE */
196
197 #include "depca.h"
198
199 #ifdef DEPCA_DEBUG
200 static int depca_debug = DEPCA_DEBUG;
201 #else
202 static int depca_debug = 1;
203 #endif
204
205 #ifndef PROBE_LENGTH
206 #define PROBE_LENGTH 32
207 #endif
208
209 #ifndef PROBE_SEQUENCE
210 #define PROBE_SEQUENCE "FF0055AAFF0055AA"
211 #endif
212
213 #ifndef DEPCA_SIGNATURE
214 #define DEPCA_SIGNATURE {"DEPCA",\
215 "DE100","DE101",\
216 "DE200","DE201","DE202",\
217 "DE210",\
218 "DE422",\
219 ""}
220 #define DEPCA_NAME_LENGTH 8
221 #endif
222
223 #ifndef DEPCA_RAM_BASE_ADDRESSES
224 #define DEPCA_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0xe0000,0x00000}
225 #endif
226 static short mem_chkd = 0; /* holds which base addrs have been */
227 /* checked, for multi-DEPCA case */
228
229 #ifndef DEPCA_IO_PORTS
230 #define DEPCA_IO_PORTS {0x300, 0x200, 0}
231 #endif
232
233 #ifndef DEPCA_TOTAL_SIZE
234 #define DEPCA_TOTAL_SIZE 0x10
235 #endif
236
237 #ifndef MAX_NUM_DEPCAS
238 #define MAX_NUM_DEPCAS 2
239 #endif
240
241 #ifndef DEPCA_EISA_IO_PORTS
242 #define DEPCA_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
243 #endif
244
245 #ifndef MAX_EISA_SLOTS
246 #define MAX_EISA_SLOTS 8
247 #endif
248
249 /*
250 ** Set the number of Tx and Rx buffers.
251 */
252 #ifndef DEPCA_BUFFER_LOG_SZ
253 #define RING_SIZE 16 /* 16 buffers */
254 #else
255 #define RING_SIZE (1 << (DEPCA_BUFFERS_LOG_SZ))
256 #endif /* DEPCA_BUFFER_LOG_SZ */
257
258 #define PKT_BUF_SZ 1544 /* Buffer size for each Tx/Rx buffer */
259 #define PKT_SZ 1514 /* Maximum ethernet packet length */
260 #define DAT_SZ 1500 /* Maximum ethernet data length */
261 #define PKT_HDR_LEN 14 /* Addresses and data length info */
262
263 #ifdef HAVE_MULTICAST
264 #ifndef CRC_POLYNOMIAL
265 #define CRC_POLYNOMIAL 0x04c11db7 /* Ethernet CRC polynomial */
266 #endif /* CRC_POLYNOMIAL */
267 #endif /* HAVE_MULTICAST */
268
269 /*
270 ** The DEPCA Rx and Tx ring descriptors.
271 */
272 struct depca_rx_head {
273 long base;
274 short buf_length; /* This length is negative 2's complement! */
275 short msg_length; /* This length is "normal". */
276 };
277
278 struct depca_tx_head {
279 long base;
280 short length; /* This length is negative 2's complement! */
281 short misc; /* Errors and TDR info */
282 };
283
284 #define LA_MASK 0x0000ffff /* LANCE address mask for mapping network RAM
285 to LANCE memory address space */
286
287 /*
288 ** The Lance initialization block, described in databook, in common memory.
289 */
290 struct depca_init {
291 unsigned short mode; /* Mode register */
292 unsigned char phys_addr[ETH_ALEN]; /* Physical ethernet address */
293 unsigned short filter[4]; /* Multicast filter. */
294 unsigned long rx_ring; /* Rx ring base pointer & ring length */
295 unsigned long tx_ring; /* Tx ring base pointer & ring length */
296 };
297
298 struct depca_private {
299 char devname[8]; /* Device Product String */
300 struct depca_rx_head *rx_ring; /* Pointer to start of RX descriptor ring */
301 struct depca_tx_head *tx_ring; /* Pointer to start of TX descriptor ring */
302 struct depca_init init_block;/* Initialization block */
303 long bus_offset; /* (E)ISA bus address offset vs LANCE */
304 long dma_buffs; /* Start address of Rx and Tx buffers. */
305 int cur_rx, cur_tx; /* The next free ring entry */
306 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
307 int dma;
308 struct enet_statistics stats;
309 char depca_na; /* NICSR access width: 0=>byte, 1=>word */
310 short ringSize; /* ring size based on available memory */
311 short rmask; /* modulus mask based on ring size */
312 long rlen; /* log2(ringSize) for the descriptors */
313 };
314
315 /*
316 ** Public Functions
317 */
318 static int depca_open(struct device *dev);
319 static int depca_start_xmit(struct sk_buff *skb, struct device *dev);
320 static void depca_interrupt(int reg_ptr);
321 static int depca_close(struct device *dev);
322 static struct enet_statistics *depca_get_stats(struct device *dev);
323 #ifdef HAVE_MULTICAST
324 static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
325 #endif
326
327 /*
328 ** Private functions
329 */
330 static int depca_probe1(struct device *dev, short ioaddr);
331 static void depca_init_ring(struct device *dev);
332 static int depca_rx(struct device *dev);
333 static int depca_tx(struct device *dev);
334
335 static void LoadCSRs(struct device *dev);
336 static int InitRestartDepca(struct device *dev);
337 static char *DepcaSignature(unsigned long mem_addr);
338 static int DevicePresent(short ioaddr);
339 #ifdef HAVE_MULTICAST
340 static void SetMulticastFilter(int num_addrs, char *addrs, char *multicast_table);
341 #endif
342
343 #ifndef MODULE
344 static struct device *isa_probe(struct device *dev);
345 static struct device *eisa_probe(struct device *dev);
346 static struct device *alloc_device(struct device *dev, int ioaddr);
347
348 static int num_depcas = 0, num_eth = 0, autoprobed = 0;
349
350 #else
351 int init_module(void);
352 void cleanup_module(void);
353
354 #endif /* MODULE */
355
356 /*
357 ** Miscellaneous defines...
358 */
359 #define STOP_DEPCA \
360 outw(CSR0, DEPCA_ADDR);\
361 outw(STOP, DEPCA_DATA)
362
363
364
365
366 int depca_probe(struct device *dev)
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*/
367 {
368 short base_addr = dev->base_addr;
369 int status = -ENODEV;
370 #ifndef MODULE
371 struct device *eth0;
372 #endif
373
374 if (base_addr > 0x1ff) { /* Check a single specified location. */
375 if (DevicePresent(base_addr) == 0) { /* Is DEPCA really here? */
376 status = depca_probe1(dev, base_addr);
377 }
378 } else if (base_addr > 0) { /* Don't probe at all. */
379 status = -ENXIO;
380
381 #ifdef MODULE
382 } else {
383 printk("Autoprobing is not supported when loading a module based driver.\n");
384 status = -EIO;
385 #else
386 } else if (!autoprobed) { /* First probe for the DEPCA test */
387 /* pattern in ROM */
388 eth0=isa_probe(dev);
389 eth0=eisa_probe(eth0);
390 if (dev->priv) status=0;
391 autoprobed = 1;
392 } else {
393 status = -ENXIO;
394 #endif /* MODULE */
395
396 }
397
398 if (status) dev->base_addr = base_addr;
399
400 return status; /* ENODEV would be more accurate. */
401 }
402
403 static int
404 depca_probe1(struct device *dev, short ioaddr)
/* ![[previous]](../icons/left.png)
*/
405 {
406 struct depca_private *lp;
407 int i,j, status=0;
408 unsigned long mem_start, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
409 char *name = NULL;
410 unsigned int nicsr, offset, netRAM;
411
412
413 /*
414 ** Stop the DEPCA. Enable the DBR ROM. Disable interrupts and remote boot.
415 */
416 STOP_DEPCA;
417
418 nicsr = inb(DEPCA_NICSR);
419 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
420 outb(nicsr, DEPCA_NICSR);
421
422 if (inw(DEPCA_DATA) == STOP) {
423
424 /* Now find out what kind of DEPCA we have. The DE100 uses a different
425 ** addressing scheme for some registers compared to the DE2xx series.
426 ** Note that a base address location is marked as checked if no DEPCA is
427 ** there or one is found (when the search is immediately terminated). This
428 ** shortens the search time a little for multiple DEPCAs.
429 */
430
431 for (j = 0, i = 0; mem_base[i] && (j == 0);i++) {
432 if (((mem_chkd >> i) & 0x01) == 0) { /* has the memory been checked? */
433 name = DepcaSignature(mem_base[i]);/* check for a DEPCA here */
434 mem_chkd |= (0x01 << i); /* mark location checked */
435 if (*name != '\0') { /* one found? */
436 j = 1; /* set exit flag */
437 --i;
438 }
439 }
440 }
441
442 if (*name != '\0') { /* found a DEPCA device */
443 mem_start = mem_base[i];
444 dev->base_addr = ioaddr;
445
446 if ((ioaddr&0x0fff)==DEPCA_EISA_IO_PORTS) {/* EISA slot address */
447 printk("%s: %s at %#3x (EISA slot %d)",
448 dev->name, name, ioaddr, ((ioaddr>>12)&0x0f));
449 } else { /* ISA port address */
450 printk("%s: %s at %#3x", dev->name, name, ioaddr);
451 }
452
453 /* There is a 32 byte station address PROM at DEPCA_PROM address.
454 The first six bytes are the station address. They can be read
455 directly since the signature search set up the ROM address
456 counter correctly just before this function.
457
458 For the DE100 we have to be careful about which port is used to
459 read the ROM info.
460 */
461
462 if (strstr(name,"DE100")!= NULL) {
463 j = 1;
464 } else {
465 j = 0;
466 }
467
468 printk(", h/w address ");
469 for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet address */
470 printk("%2.2x:", dev->dev_addr[i] = inb(DEPCA_PROM + j));
471 }
472 printk("%2.2x", dev->dev_addr[i] = inb(DEPCA_PROM + j));
473
474 for (;i<32;i++) { /* leave ROM counter in known state */
475 j=inb(DEPCA_PROM);
476 }
477
478 #ifdef HAVE_PORTRESERVE
479 snarf_region(ioaddr, DEPCA_TOTAL_SIZE);
480 #endif
481
482 /*
483 ** Set up the maximum amount of network RAM(kB)
484 */
485 if (strstr(name,"DEPCA")== NULL) {
486 netRAM=64;
487 } else {
488 netRAM=48;
489 }
490
491 /*
492 ** Determine the base address for the DEPCA RAM from the NI-CSR
493 ** and make up a DEPCA-specific-data structure.
494 */
495
496 if (nicsr & BUF) {
497 offset = 0x8000; /* 32kbyte RAM offset*/
498 nicsr &= ~BS; /* DEPCA RAM in top 32k */
499 printk(",\n has %dkB RAM", netRAM - 32);
500 } else if ((nicsr & _128KB) && (netRAM!=48)) {
501 offset = 0x0000;
502 printk(",\n has 128kB RAM");
503 } else {
504 offset = 0x0000; /* 64k/48k bytes RAM */
505 printk(",\n has %dkB RAM", netRAM);
506 }
507
508 mem_start += offset; /* (E)ISA start address */
509 printk(" at 0x%.5lx", mem_start);
510
511 /*
512 ** Enable the shadow RAM.
513 */
514 if (strstr(name,"DEPCA") == NULL) {
515 nicsr |= SHE;
516 outb(nicsr, DEPCA_NICSR);
517 }
518
519 /*
520 ** Calculate the ring size based on the available RAM
521 ** found above. Allocate an equal number of buffers, each
522 ** of size PKT_BUF_SZ (1544 bytes) to the Tx and Rx, allowing one
523 ** descriptor entry (8 bytes) for each buffer. Make sure
524 ** that this ring size is <= RING_SIZE. The ring size must be
525 ** a power of 2.
526 */
527
528 j = (((netRAM << 10) - offset - sizeof(struct depca_private)) /
529 (PKT_BUF_SZ + 8)) >> 1;
530 for (i=0;j>1;i++) {
531 j >>= 1;
532 }
533
534 /* Hold the ring size information here before the depca
535 ** private structure is allocated. Need this for the memory
536 ** space calculations.
537 */
538 j = 1 << i;
539
540 /*
541 ** Set up memory information in the device structure.
542 ** Align the descriptor rings on an 8 byte (quadword) boundary.
543 **
544 ** depca_private area
545 ** rx ring descriptors
546 ** tx ring descriptors
547 ** rx buffers
548 ** tx buffers
549 **
550 */
551
552 /* private area & initialise */
553 dev->priv = (void *)((mem_start + 0x07) & ~0x07);
554 lp = (struct depca_private *)dev->priv;
555 memset(dev->priv, 0, sizeof(struct depca_private));
556 strcpy(lp->devname,name);
557
558 /* Tx & Rx descriptors (aligned to a quadword boundary) */
559 mem_start = ((((unsigned long)dev->priv +
560 sizeof(struct depca_private)) +
561 (unsigned long)0x07) & (unsigned long)~0x07);
562 lp->rx_ring = (struct depca_rx_head *)mem_start;
563
564 mem_start += (sizeof(struct depca_rx_head) * j);
565 lp->tx_ring = (struct depca_tx_head *)mem_start;
566
567 mem_start += (sizeof(struct depca_tx_head) * j);
568 lp->bus_offset = mem_start & 0x00ff0000;
569 mem_start &= LA_MASK; /* LANCE re-mapped start address */
570
571 lp->dma_buffs = mem_start;
572
573 mem_start += (PKT_BUF_SZ * j);
574 /* (mem_start now points to the start of the Tx buffers) */
575
576 /* Initialise the data structures wrt CPU */
577 memset(lp->rx_ring, 0, sizeof(struct depca_rx_head)*j);
578 memset(lp->tx_ring, 0, sizeof(struct depca_tx_head)*j);
579
580 /* This should never happen. */
581 if ((int)(lp->rx_ring) & 0x07) {
582 printk("\n **ERROR** DEPCA Rx and Tx descriptor rings not on a quadword boundary.\n");
583 return -ENXIO;
584 }
585
586 /*
587 ** Finish initialising the ring information.
588 */
589 lp->ringSize = j;
590 if (lp->ringSize > RING_SIZE) lp->ringSize = RING_SIZE;
591 lp->rmask = lp->ringSize - 1;
592
593 /*
594 ** calculate the real RLEN size for the descriptors. It is
595 ** log2(ringSize).
596 */
597 for (i=0, j = lp->ringSize; j>1; i++) {
598 j >>= 1;
599 }
600 lp->rlen = (unsigned long)(i << 29);
601
602 /*
603 ** load the initialisation block
604 */
605 depca_init_ring(dev);
606
607 /*
608 ** Initialise the control and status registers
609 */
610 LoadCSRs(dev);
611
612 /*
613 ** Enable DEPCA board interrupts for autoprobing
614 */
615 nicsr = ((nicsr & ~IM)|IEN);
616 outb(nicsr, DEPCA_NICSR);
617
618 /* The DMA channel may be passed in on this parameter. */
619 dev->dma = 0;
620
621 /* To auto-IRQ we enable the initialization-done and DMA err,
622 interrupts. For now we will always get a DMA error. */
623 if (dev->irq < 2) {
624 #ifndef MODULE
625 autoirq_setup(0);
626
627 /* Trigger an initialization just for the interrupt. */
628 outw(INEA | INIT, DEPCA_DATA);
629
630 dev->irq = autoirq_report(1);
631 if (dev->irq) {
632 printk(" and uses IRQ%d.\n", dev->irq);
633 } else {
634 printk(" and failed to detect IRQ line.\n");
635 status = -EAGAIN;
636 }
637 #endif /* MODULE */
638 } else {
639 printk(" and assigned IRQ%d.\n", dev->irq);
640 }
641 } else {
642 status = -ENXIO;
643 }
644 if (!status) {
645 if (depca_debug > 0) {
646 printk(version);
647 }
648
649 /* The DEPCA-specific entries in the device structure. */
650 dev->open = &depca_open;
651 dev->hard_start_xmit = &depca_start_xmit;
652 dev->stop = &depca_close;
653 dev->get_stats = &depca_get_stats;
654 #ifdef HAVE_MULTICAST
655 dev->set_multicast_list = &set_multicast_list;
656 #endif
657
658 dev->mem_start = 0;
659
660 /* Fill in the generic field of the device structure. */
661 ether_setup(dev);
662 }
663 } else {
664 status = -ENXIO;
665 }
666
667 return status;
668 }
669
670
671 static int
672 depca_open(struct device *dev)
/* */
673 {
674 struct depca_private *lp = (struct depca_private *)dev->priv;
675 int i,nicsr,ioaddr = dev->base_addr;
676
677 if (request_irq(dev->irq, &depca_interrupt, 0, "depca")) {
678 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
679 return -EAGAIN;
680 }
681
682 irq2dev_map[dev->irq] = dev;
683
684 /*
685 ** Stop the DEPCA & get the board status information.
686 */
687 STOP_DEPCA;
688 nicsr = inb(DEPCA_NICSR);
689
690 /*
691 ** Make sure the shadow RAM is enabled
692 */
693 if (strstr(lp->devname,"DEPCA") == NULL) {
694 nicsr |= SHE;
695 outb(nicsr, DEPCA_NICSR);
696 }
697
698 /*
699 ** Re-initialize the DEPCA...
700 */
701 depca_init_ring(dev); /* initialize the descriptor rings */
702 LoadCSRs(dev);
703
704 if (depca_debug > 1){
705 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
706 printk("Descriptor head addresses:\n");
707 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring,(long)lp->tx_ring);
708 printk("Descriptor addresses:\n");
709 for (i=0;i<lp->ringSize;i++){
710 printk("\t0x%8.8lx 0x%8.8lx\n",(long)&lp->rx_ring[i].base,
711 (long)&lp->tx_ring[i].base);
712 }
713 printk("Buffer addresses:\n");
714 for (i=0;i<lp->ringSize;i++){
715 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring[i].base,
716 (long)lp->tx_ring[i].base);
717 }
718 printk("Initialisation block at 0x%8.8lx\n",(long)&lp->init_block);
719 printk("\tmode: 0x%4.4x\n",lp->init_block.mode);
720 printk("\tphysical address: ");
721 for (i=0;i<6;i++){
722 printk("%2.2x:",(short)lp->init_block.phys_addr[i]);
723 }
724 printk("\n\tlogical address filter: 0x");
725 for (i=0;i<4;i++){
726 printk("%2.2x",(short)lp->init_block.filter[i]);
727 }
728 printk("\n\trx_ring at: 0x%8.8lx\n",(long)lp->init_block.rx_ring);
729 printk("\ttx_ring at: 0x%8.8lx\n",(long)lp->init_block.tx_ring);
730 printk("dma_buffs: 0x%8.8lx\n",(long)lp->dma_buffs);
731 printk("Ring size: %d\nMask: 0x%2.2x\nLog2(ringSize): 0x%8.8lx\n",
732 (short)lp->ringSize,
733 (char)lp->rmask,
734 (long)lp->rlen);
735 outw(CSR2,DEPCA_ADDR);
736 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
737 outw(CSR1,DEPCA_ADDR);
738 printk("%4.4x\n",inw(DEPCA_DATA));
739 outw(CSR3,DEPCA_ADDR);
740 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
741 }
742
743 /*
744 ** Enable DEPCA board interrupts and turn off LED
745 */
746 nicsr = ((nicsr & ~IM & ~LED)|IEN);
747 outb(nicsr, DEPCA_NICSR);
748 outw(CSR0,DEPCA_ADDR);
749
750 dev->tbusy = 0;
751 dev->interrupt = 0;
752 dev->start = 1;
753
754 InitRestartDepca(dev); /* ignore the return status */
755
756 if (depca_debug > 1){
757 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
758 printk("nicsr: 0x%02x\n",inb(DEPCA_NICSR));
759 }
760
761 #ifdef MODULE
762 MOD_INC_USE_COUNT;
763 #endif
764
765 return 0; /* Always succeed */
766 }
767
768 /* Initialize the lance Rx and Tx descriptor rings. */
769 static void
770 depca_init_ring(struct device *dev)
/* */
771 {
772 struct depca_private *lp = (struct depca_private *)dev->priv;
773 unsigned long i;
774
775 lp->init_block.mode = DTX | DRX; /* Disable Rx and Tx. */
776 lp->cur_rx = lp->cur_tx = 0;
777 lp->dirty_rx = lp->dirty_tx = 0;
778
779 /* Initialize the base addresses and length of each buffer in the ring */
780 for (i = 0; i < lp->ringSize; i++) {
781 lp->rx_ring[i].base = (lp->dma_buffs + i*PKT_BUF_SZ) | R_OWN;
782 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
783 lp->tx_ring[i].base = (lp->dma_buffs + (i+lp->ringSize) * PKT_BUF_SZ) &
784 (unsigned long)(0x00ffffff);
785 }
786
787 /* Set up the initialization block */
788 for (i = 0; i < ETH_ALEN; i++) {
789 lp->init_block.phys_addr[i] = dev->dev_addr[i];
790 }
791 for (i = 0; i < 4; i++) {
792 lp->init_block.filter[i] = 0x0000;
793 }
794 lp->init_block.rx_ring = ((unsigned long)lp->rx_ring & LA_MASK) | lp->rlen;
795 lp->init_block.tx_ring = ((unsigned long)lp->tx_ring & LA_MASK) | lp->rlen;
796
797 lp->init_block.mode = 0x0000; /* Enable the Tx and Rx */
798 }
799
800 /*
801 ** Writes a socket buffer to TX descriptor ring and starts transmission
802 */
803 static int
804 depca_start_xmit(struct sk_buff *skb, struct device *dev)
/* */
805 {
806 struct depca_private *lp = (struct depca_private *)dev->priv;
807 int ioaddr = dev->base_addr;
808 int status = 0;
809
810 /* Transmitter timeout, serious problems. */
811 if (dev->tbusy) {
812 int tickssofar = jiffies - dev->trans_start;
813 if (tickssofar < 10) {
814 status = -1;
815 } else {
816 printk("%s: transmit timed out, status %04x, resetting.\n",
817 dev->name, inw(DEPCA_DATA));
818
819 STOP_DEPCA;
820 depca_init_ring(dev);
821 LoadCSRs(dev);
822 InitRestartDepca(dev);
823 dev->tbusy=0;
824 dev->trans_start = jiffies;
825 }
826 return status;
827 }
828
829 if (skb == NULL) {
830 dev_tint(dev);
831 return 0;
832 }
833
834 if (skb->len <= 0) {
835 return 0;
836 }
837
838 if (depca_debug > 3) {
839 outw(CSR0, DEPCA_ADDR);
840 printk("%s: depca_start_xmit() called, csr0 %4.4x.\n", dev->name,
841 inw(DEPCA_DATA));
842 }
843
844 /* Block a timer-based transmit from overlapping. This could better be
845 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
846 if (set_bit(0, (void*)&dev->tbusy) != 0)
847 printk("%s: Transmitter access conflict.\n", dev->name);
848
849 /*
850 ** The TX buffer, skb, has to be copied into the local network RAM
851 ** for the LANCE to access it. The skb may be at > 16MB for large
852 ** (memory) systems.
853 */
854 { /* Fill in a Tx ring entry */
855 unsigned char *buf;
856 int entry = lp->cur_tx++;
857 int len;
858 long skbL = skb->len;
859 char *p = (char *) skb->data;
860
861 entry &= lp->rmask; /* Ring around buffer number. */
862 buf = (unsigned char *)((lp->tx_ring[entry].base+lp->bus_offset) &
863 0x00ffffff);
864
865 /* Wait for a full ring to free up */
866 while (lp->tx_ring[entry].base < 0);
867
868 /*
869 ** Caution: the write order is important here... don't set up the
870 ** ownership rights until all the other information is in place.
871 */
872 len = ((skbL > PKT_SZ) ? PKT_SZ : skbL); /* skb too long */
873 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */
874 skbL -= len;
875 lp->tx_ring[entry].length = -len;
876
877 /* Clears various error flags */
878 lp->tx_ring[entry].misc = 0x0000;
879
880 /* copy the data from the socket buffer to the net memory */
881 memcpy((unsigned char *)(buf), skb->data, len);
882
883 /* Hand over buffer ownership to the LANCE */
884 if (skbL <= 0) lp->tx_ring[entry].base |= (T_ENP);
885 lp->tx_ring[entry].base |= (T_OWN|T_STP);
886
887 /* Trigger an immediate send demand. */
888 outw(CSR0, DEPCA_ADDR);
889 outw(INEA | TDMD, DEPCA_DATA);
890
891 dev->trans_start = jiffies;
892
893 for (p += len; skbL > 0; p += len) {
894
895 /* Get new buffer pointer */
896 entry = lp->cur_tx++;
897 entry &= lp->rmask; /* Ring around buffer number. */
898 buf = (unsigned char *)((lp->tx_ring[entry].base+lp->bus_offset) &
899 0x00ffffff);
900
901 /* Wait for a full ring to free up */
902 while (lp->tx_ring[entry].base < 0);
903 dev->tbusy=0;
904
905 /* Copy ethernet header to the new buffer */
906 memcpy((unsigned char *)buf, skb->data, PKT_HDR_LEN);
907
908 /* Determine length of data buffer */
909 len = ((skbL > DAT_SZ) ? DAT_SZ : skbL); /* skbL too long */
910 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */
911 skbL -= len;
912 lp->tx_ring[entry].length = -len;
913
914 /* Clears various error flags */
915 lp->tx_ring[entry].misc = 0x0000;
916
917 /* copy the data from the socket buffer to the net memory */
918 memcpy((unsigned char *)(buf + PKT_HDR_LEN), (unsigned char *)p, len);
919
920 /* Hand over buffer ownership to the LANCE */
921 if (skbL <= 0) lp->tx_ring[entry].base |= T_ENP;
922 lp->tx_ring[entry].base |= T_OWN;
923 }
924
925 if (depca_debug > 4) {
926 unsigned char *pkt =
927 (unsigned char *)((lp->tx_ring[entry].base+lp->bus_offset) &
928 0x00ffffff);
929
930 printk("%s: tx ring[%d], %#lx, sk_buf %#lx len %d.\n",
931 dev->name, entry, (unsigned long) &lp->tx_ring[entry],
932 lp->tx_ring[entry].base, -lp->tx_ring[entry].length);
933 printk("%s: Tx %2.2x %2.2x %2.2x ... %2.2x %2.2x %2.2x %2.2x...%2.2x len %2.2x %2.2x %2.2x %2.2x.\n",
934 dev->name, pkt[0], pkt[1], pkt[2], pkt[5], pkt[6],
935 pkt[7], pkt[8], pkt[11], pkt[12], pkt[13],
936 pkt[14], pkt[15]);
937 }
938
939 /* Check if the TX ring is full or not - 'tbusy' cleared if not full. */
940 if (lp->tx_ring[(entry+1) & lp->rmask].base >= 0) {
941 dev->tbusy=0;
942 }
943
944 dev_kfree_skb (skb, FREE_WRITE);
945 }
946
947 return 0;
948 }
949
950 /*
951 ** The DEPCA interrupt handler.
952 */
953 static void
954 depca_interrupt(int reg_ptr)
/* */
955 {
956 int irq = -(((struct pt_regs *)reg_ptr)->orig_eax+2);
957 struct device *dev = (struct device *)(irq2dev_map[irq]);
958 struct depca_private *lp;
959 int csr0, ioaddr, nicsr;
960
961 if (dev == NULL) {
962 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
963 } else {
964 lp = (struct depca_private *)dev->priv;
965 ioaddr = dev->base_addr;
966
967 if (dev->interrupt)
968 printk("%s: Re-entering the interrupt handler.\n", dev->name);
969
970 dev->interrupt = MASK_INTERRUPTS;
971
972 /* mask the DEPCA board interrupts and turn on the LED */
973 nicsr = inb(DEPCA_NICSR);
974 nicsr |= (IM|LED);
975 outb(nicsr, DEPCA_NICSR);
976
977 outw(CSR0, DEPCA_ADDR);
978 csr0 = inw(DEPCA_DATA);
979
980 /* Acknowledge all of the current interrupt sources ASAP. */
981 outw(csr0 & ~(INEA|TDMD|STOP|STRT|INIT), DEPCA_DATA);
982
983 if (depca_debug > 5)
984 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
985 dev->name, csr0, inw(DEPCA_DATA));
986
987 if (csr0 & RINT) /* Rx interrupt (packet arrived) */
988 depca_rx(dev);
989
990 if (csr0 & TINT) /* Tx interrupt (packet sent) */
991 depca_tx(dev);
992
993 /* Clear the interrupts we've handled. */
994 outw(CSR0, DEPCA_ADDR);
995 outw(BABL|CERR|MISS|MERR|RINT|TINT|IDON|INEA, DEPCA_DATA);
996
997 if (depca_debug > 4) {
998 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
999 dev->name, inw(DEPCA_ADDR),
1000 inw(DEPCA_DATA));
1001 }
1002
1003 /* Unmask the DEPCA board interrupts and turn off the LED */
1004 nicsr = (nicsr & ~IM & ~LED);
1005 outb(nicsr, DEPCA_NICSR);
1006 dev->interrupt = UNMASK_INTERRUPTS;
1007 }
1008
1009 return;
1010 }
1011
1012 static int
1013 depca_rx(struct device *dev)
/* */
1014 {
1015 struct depca_private *lp = (struct depca_private *)dev->priv;
1016 int entry = lp->cur_rx & lp->rmask;
1017
1018 /* If we own the next entry, it's a new packet. Send it up. */
1019 for (; lp->rx_ring[entry].base >= 0; entry = (++lp->cur_rx) & lp->rmask) {
1020 int status = lp->rx_ring[entry].base >> 16 ;
1021 int chained;
1022
1023 /*
1024 ** There is a tricky error noted by John Murphy, <murf@perftech.com>
1025 ** to Russ Nelson: even with full-sized buffers, it's possible for a
1026 ** jabber packet to use two buffers, with only the last one correctly
1027 ** noting the error.
1028 */
1029
1030 /* Check for a chaining buffer */
1031 chained = 0;
1032 if (status == R_STP) {
1033 chained = 1;
1034
1035 /*
1036 ** Wait for next buffer to complete to check for errors. This
1037 ** is slow but infrequent and allows for correct hardware buffer
1038 ** chaining (whilst defeating the chaining's purpose).
1039 */
1040 while ((status=(lp->rx_ring[(entry+1)&lp->rmask].base >> 16)) < 0);
1041
1042 /* NB: 'status' now comes from the buffer following 'entry'. */
1043 }
1044
1045 if (status & R_ERR) { /* There was an error. */
1046 lp->stats.rx_errors++; /* Update the error stats. */
1047 if (status & R_FRAM) lp->stats.rx_frame_errors++;
1048 if (status & R_OFLO) lp->stats.rx_over_errors++;
1049 if (status & R_CRC) lp->stats.rx_crc_errors++;
1050 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
1051 } else { /* Malloc up new buffer, compatible with net-2e. */
1052 short pkt_len = lp->rx_ring[entry].msg_length;
1053 struct sk_buff *skb;
1054
1055 skb = alloc_skb(pkt_len, GFP_ATOMIC);
1056 if (skb == NULL) {
1057 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1058 lp->stats.rx_dropped++; /* Really, deferred. */
1059 break;
1060 }
1061 skb->len = pkt_len;
1062 skb->dev = dev;
1063 memcpy(skb->data,
1064 (unsigned char *)((lp->rx_ring[entry].base+lp->bus_offset) &
1065 0x00ffffff),
1066 pkt_len);
1067 /*
1068 ** Notify the upper protocol layers that there is another
1069 ** packet to handle
1070 */
1071 netif_rx(skb);
1072 lp->stats.rx_packets++;
1073 }
1074
1075 /* turn over ownership of the current entry back to the LANCE */
1076 lp->rx_ring[entry].base |= R_OWN;
1077 if (chained && (status & R_ERR)) { /* next entry also bad */
1078 entry = (++lp->cur_rx) & lp->rmask;
1079 lp->rx_ring[entry].base |= R_OWN;
1080 }
1081 }
1082
1083 /*
1084 ** We should check that at least two ring entries are free. If not,
1085 ** we should free one and mark stats->rx_dropped++.
1086 */
1087
1088 return 0;
1089 }
1090
1091 /*
1092 ** Buffer sent - check for buffer errors.
1093 */
1094 static int
1095 depca_tx(struct device *dev)
/* */
1096 {
1097 struct depca_private *lp = (struct depca_private *)dev->priv;
1098 int dirty_tx = lp->dirty_tx & lp->rmask;
1099
1100 if (depca_debug > 5)
1101 printk("%s: Cleaning tx ring, dirty %d clean %d.\n",
1102 dev->name, dirty_tx, (lp->cur_tx & lp->rmask));
1103
1104 /*
1105 ** While the dirty entry is not the current one AND
1106 ** the LANCE doesn't own it...
1107 */
1108 for (; dirty_tx!=(lp->cur_tx & lp->rmask) && lp->tx_ring[dirty_tx].base>0;
1109 dirty_tx = ++lp->dirty_tx & lp->rmask) {
1110 unsigned long *tmdp = (unsigned long *)(&lp->tx_ring[dirty_tx]);
1111 int status = lp->tx_ring[dirty_tx].base >> 16;
1112
1113 if (status < 0) { /* Packet not yet sent! */
1114 printk("interrupt for packet not yet sent!\n");
1115 break;
1116 }
1117 if (status & T_ERR) { /* There was an major error, log it. */
1118 int err_status = lp->tx_ring[dirty_tx].misc;
1119
1120 lp->stats.tx_errors++;
1121 if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1122 if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1123 if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
1124 if (err_status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1125 /* We should re-init() after the FIFO error. */
1126 } else if (status & (T_MORE | T_ONE)) {
1127 lp->stats.collisions++;
1128 } else {
1129 lp->stats.tx_packets++;
1130 }
1131
1132 if (depca_debug > 5)
1133 printk("%s: Tx done entry %d, %4.4lx %4.4lx %4.4lx %4.4lx.\n",
1134 dev->name, dirty_tx,
1135 tmdp[0], tmdp[1], tmdp[2], tmdp[3]);
1136 }
1137 /*mark_bh(INET_BH);*/
1138 return 0;
1139 }
1140
1141 static int
1142 depca_close(struct device *dev)
/* */
1143 {
1144 struct depca_private *lp = (struct depca_private *)dev->priv;
1145 int nicsr, ioaddr = dev->base_addr;
1146
1147 dev->start = 0;
1148 dev->tbusy = 1;
1149
1150 outw(CSR0, DEPCA_ADDR);
1151
1152 if (depca_debug > 1) {
1153 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1154 dev->name, inw(DEPCA_DATA));
1155 }
1156
1157 /*
1158 ** We stop the DEPCA here -- it occasionally polls
1159 ** memory if we don't.
1160 */
1161 outw(STOP, DEPCA_DATA);
1162
1163 /*
1164 ** Give back the ROM in case the user wants to go to DOS
1165 */
1166 if (strstr(lp->devname,"DEPCA") == NULL) {
1167 nicsr = inb(DEPCA_NICSR);
1168 nicsr &= ~SHE;
1169 outb(nicsr, DEPCA_NICSR);
1170 }
1171
1172 free_irq(dev->irq);
1173
1174 irq2dev_map[dev->irq] = 0;
1175
1176 #ifdef MODULE
1177 MOD_DEC_USE_COUNT;
1178 #endif
1179
1180 return 0;
1181 }
1182
1183 static void LoadCSRs(struct device *dev)
/* */
1184 {
1185 struct depca_private *lp = (struct depca_private *)dev->priv;
1186 int ioaddr = dev->base_addr;
1187
1188 outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */
1189 outw((unsigned short)((unsigned long)(&lp->init_block) & LA_MASK),
1190 DEPCA_DATA);
1191 outw(CSR2, DEPCA_ADDR); /* initialisation block address MSW */
1192 outw((unsigned short)(((unsigned long)(&lp->init_block) & LA_MASK) >> 16),
1193 DEPCA_DATA);
1194 outw(CSR3, DEPCA_ADDR); /* ALE control */
1195 outw(ACON, DEPCA_DATA);
1196 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */
1197 }
1198
1199 static int InitRestartDepca(struct device *dev)
/* */
1200 {
1201 struct depca_private *lp = (struct depca_private *)dev->priv;
1202 int ioaddr = dev->base_addr;
1203 int i, status=0;
1204
1205 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */
1206 outw(INIT, DEPCA_DATA); /* initialize DEPCA */
1207
1208 /* wait for lance to complete initialisation */
1209 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1210
1211 if (i!=100) {
1212 /* clear IDON by writing a "1", enable interrupts and start lance */
1213 outw(IDON | INEA | STRT, DEPCA_DATA);
1214 if (depca_debug > 2) {
1215 printk("%s: DEPCA open after %d ticks, init block %#lx csr0 %4.4x.\n",
1216 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1217 }
1218 } else {
1219 status = -1;
1220 printk("%s: DEPCA unopened after %d ticks, init block %#lx csr0 %4.4x.\n",
1221 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1222 }
1223
1224 return status;
1225 }
1226
1227 static struct enet_statistics *
1228 depca_get_stats(struct device *dev)
/* */
1229 {
1230 struct depca_private *lp = (struct depca_private *)dev->priv;
1231
1232 /* Null body since there is no framing error counter */
1233
1234 return &lp->stats;
1235 }
1236
1237 #ifdef HAVE_MULTICAST
1238 /*
1239 ** Set or clear the multicast filter for this adaptor.
1240 ** num_addrs == -1 Promiscuous mode, receive all packets
1241 ** num_addrs == 0 Normal mode, clear multicast list
1242 ** num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1243 ** best-effort filtering.
1244 */
1245 #define hash_filter lp->init_block.filter
1246
1247 static void
1248 set_multicast_list(struct device *dev, int num_addrs, void *addrs)
/* */
1249 {
1250 short ioaddr = dev->base_addr;
1251 struct depca_private *lp = (struct depca_private *)dev->priv;
1252
1253 if (irq2dev_map[dev->irq] != NULL) {
1254 STOP_DEPCA; /* Temporarily stop the depca. */
1255 depca_init_ring(dev); /* Initialize the descriptor rings */
1256
1257 if (num_addrs >= 0) {
1258 SetMulticastFilter(num_addrs, (char *)addrs, (char *)hash_filter);
1259 lp->init_block.mode &= ~PROM; /* Unset promiscuous mode */
1260 } else {
1261 lp->init_block.mode |= PROM; /* Set promiscuous mode */
1262 }
1263
1264 LoadCSRs(dev); /* Reload CSR3 */
1265 InitRestartDepca(dev); /* Resume normal operation. */
1266 }
1267 }
1268
1269 /*
1270 ** Calculate the hash code and update the logical address filter
1271 ** from a list of ethernet multicast addresses.
1272 ** Derived from a 'C' program in the AMD data book:
1273 ** "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)",
1274 ** Pub #17781, Rev. A, May 1993
1275 */
1276 static void SetMulticastFilter(int num_addrs, char *addrs, char *multicast_table)
/* */
1277 {
1278 char j, ctrl, bit, octet, hashcode;
1279 short int i;
1280 long int CRC, poly = (long int) CRC_POLYNOMIAL;
1281
1282 for (i=0;i<num_addrs;i++) { /* for each address in the list */
1283 if (((char) *(addrs+ETH_ALEN*i) & 0x01) == 1) {/* is multicast address? */
1284 CRC = (long int) 0xffffffff; /* init CRC for each address */
1285 for (octet=0;octet<ETH_ALEN;octet++) { /* for each address octet */
1286 for(j=0;j<8;j++) { /* process each address bit */
1287 bit = (((char)* (addrs+ETH_ALEN*i+octet)) >> j) & 0x01;
1288 ctrl = ((CRC < 0) ? 1 : 0); /* shift the control bit */
1289 CRC <<= 1; /* shift the CRC */
1290 if (bit ^ ctrl) { /* (bit) XOR (control bit) */
1291 CRC ^= poly; /* (CRC) XOR (polynomial) */
1292 }
1293 }
1294 }
1295 hashcode = (CRC & 0x00000001); /* hashcode is 6 LSb of CRC ... */
1296 for (j=0;j<5;j++) { /* ... in reverse order. */
1297 hashcode <<= 1;
1298 CRC >>= 1;
1299 hashcode |= (CRC & 0x00000001);
1300 }
1301 octet = hashcode >> 3; /* bit[3-5] -> octet in filter */
1302 /* bit[0-2] -> bit in octet */
1303 multicast_table[octet] |= (1 << (hashcode & 0x07));
1304 }
1305 }
1306 return;
1307 }
1308
1309 #endif /* HAVE_MULTICAST */
1310
1311 #ifndef MODULE
1312 /*
1313 ** ISA bus I/O device probe
1314 */
1315 static struct device *isa_probe(struct device *dev)
/* */
1316 {
1317 int *port, ports[] = DEPCA_IO_PORTS;
1318 int status;
1319
1320 for (status = -ENODEV, port = &ports[0];
1321 *port && (num_depcas < MAX_NUM_DEPCAS); port++) {
1322 int ioaddr = *port;
1323
1324 if (DevicePresent(ioaddr) == 0) {
1325 if (num_depcas > 0) { /* only gets here in autoprobe */
1326 dev = alloc_device(dev, ioaddr);
1327 } else {
1328 if ((status = depca_probe1(dev, ioaddr)) == 0) {
1329 num_depcas++;
1330 }
1331 }
1332 num_eth++;
1333 }
1334 }
1335 return dev;
1336 }
1337
1338 /*
1339 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1340 ** the motherboard.
1341 */
1342 static struct device *eisa_probe(struct device *dev)
/* */
1343 {
1344 int i, ioaddr = DEPCA_EISA_IO_PORTS;
1345 int status;
1346
1347 ioaddr+=0x1000; /* get the first slot address */
1348 for (status = -ENODEV, i=1; i<MAX_EISA_SLOTS; i++, ioaddr+=0x1000) {
1349
1350 if (DevicePresent(ioaddr) == 0) {
1351 if (num_depcas > 0) { /* only gets here in autoprobe */
1352 dev = alloc_device(dev, ioaddr);
1353 } else {
1354 if ((status = depca_probe1(dev, ioaddr)) == 0) {
1355 num_depcas++;
1356 }
1357 }
1358 num_eth++;
1359 }
1360 }
1361 return dev;
1362 }
1363
1364 /*
1365 ** Allocate the device by pointing to the next available space in the
1366 ** device structure. Should one not be available, it is created.
1367 */
1368 static struct device *alloc_device(struct device *dev, int ioaddr)
/* */
1369 {
1370 /*
1371 ** Check the device structures for an end of list or unused device
1372 */
1373 while (dev->next != NULL) {
1374 if (dev->next->base_addr == 0xffe0) break;
1375 dev = dev->next; /* walk through eth device list */
1376 num_eth++; /* increment eth device number */
1377 }
1378
1379 /*
1380 ** If no more device structures, malloc one up. If memory could
1381 ** not be allocated, print an error message.
1382 */
1383 if (dev->next == NULL) {
1384 dev->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1385 GFP_KERNEL);
1386 if (dev->next == NULL) {
1387 printk("eth%d: Device not initialised, insufficient memory\n",
1388 num_eth);
1389 }
1390 }
1391
1392 /*
1393 ** If the memory was allocated, point to the new memory area
1394 ** and initialize it (name, I/O address, next device (NULL) and
1395 ** initialisation probe routine).
1396 */
1397 if ((dev->next != NULL) &&
1398 (num_eth > 0) && (num_eth < 9999)) {
1399 dev = dev->next; /* point to the new device */
1400 dev->name = (char *)(dev + 1);
1401 sprintf(dev->name,"eth%d", num_eth);/* New device name */
1402 dev->base_addr = ioaddr; /* assign the io address */
1403 dev->next = NULL; /* mark the end of list */
1404 dev->init = &depca_probe; /* initialisation routine */
1405 num_depcas++;
1406 }
1407
1408 return dev;
1409 }
1410 #endif /* MODULE */
1411
1412 /*
1413 ** Look for a particular board name in the on-board Remote Diagnostics
1414 ** and Boot (RDB) ROM. This will also give us a clue to the network RAM
1415 ** base address.
1416 */
1417 static char *DepcaSignature(unsigned long mem_addr)
/* */
1418 {
1419 unsigned long i,j,k;
1420 static char signatures[][DEPCA_NAME_LENGTH] = DEPCA_SIGNATURE;
1421 static char thisName[DEPCA_NAME_LENGTH];
1422 char tmpstr[17];
1423
1424 for (i=0;i<16;i++) { /* copy the first 16 bytes of ROM to */
1425 tmpstr[i] = *(unsigned char *)(mem_addr+0xc000+i); /* a temporary string */
1426 }
1427 tmpstr[i]='\0';
1428
1429 strcpy(thisName,"");
1430 for (i=0;*signatures[i]!='\0' && *thisName=='\0';i++) {
1431 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {
1432 if (signatures[i][k] == tmpstr[j]) { /* track signature */
1433 k++;
1434 } else { /* lost signature; begin search again */
1435 k=0;
1436 }
1437 }
1438 if (k == strlen(signatures[i])) {
1439 strcpy(thisName,signatures[i]);
1440 }
1441 }
1442
1443 return thisName; /* return the device name string */
1444 }
1445
1446 /*
1447 ** Look for a special sequence in the Ethernet station address PROM that
1448 ** is common across all DEPCA products. Note that the original DEPCA needs
1449 ** its ROM address counter to be initialized and enabled. Only enable
1450 ** if the first address octet is a 0x08 - this minimises the chances of
1451 ** messing around with some other hardware, but it assumes that this DEPCA
1452 ** card initialized itself correctly. It also assumes that all past and
1453 ** future DEPCA/EtherWORKS cards will have ethernet addresses beginning with
1454 ** a 0x08.
1455 */
1456
1457 static int DevicePresent(short ioaddr)
/* */
1458 {
1459 static short fp=1,sigLength=0;
1460 static char devSig[] = PROBE_SEQUENCE;
1461 char data;
1462 int i, j, nicsr, status = 0;
1463 static char asc2hex(char value);
1464
1465 /*
1466 ** Initialize the counter on a DEPCA card. Two reads to ensure DEPCA ethernet
1467 ** address counter is a) cleared and b) the correct data read.
1468 */
1469 data = inb(DEPCA_PROM); /* clear counter */
1470 data = inb(DEPCA_PROM); /* read data */
1471
1472 /*
1473 ** Enable counter
1474 */
1475 if (data == 0x08) {
1476 nicsr = inb(DEPCA_NICSR);
1477 nicsr |= AAC;
1478 outb(nicsr, DEPCA_NICSR);
1479 }
1480
1481 /*
1482 ** Convert the ascii signature to a hex equivalent & pack in place
1483 */
1484 if (fp) { /* only do this once!... */
1485 for (i=0,j=0;devSig[i] != '\0' && !status;i+=2,j++) {
1486 if ((devSig[i]=asc2hex(devSig[i]))>=0) {
1487 devSig[i]<<=4;
1488 if((devSig[i+1]=asc2hex(devSig[i+1]))>=0){
1489 devSig[j]=devSig[i]+devSig[i+1];
1490 } else {
1491 status= -1;
1492 }
1493 } else {
1494 status= -1;
1495 }
1496 }
1497 sigLength=j;
1498 fp = 0;
1499 }
1500
1501 /*
1502 ** Search the Ethernet address ROM for the signature. Since the ROM address
1503 ** counter can start at an arbitrary point, the search must include the entire
1504 ** probe sequence length plus the (length_of_the_signature - 1).
1505 ** Stop the search IMMEDIATELY after the signature is found so that the
1506 ** PROM address counter is correctly positioned at the start of the
1507 ** ethernet address for later read out.
1508 */
1509 if (!status) {
1510 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
1511 data = inb(DEPCA_PROM);
1512 if (devSig[j] == data) { /* track signature */
1513 j++;
1514 } else { /* lost signature; begin search again */
1515 j=0;
1516 }
1517 }
1518
1519 if (j!=sigLength) {
1520 status = -ENODEV; /* search failed */
1521 }
1522 }
1523
1524 return status;
1525 }
1526
1527 static char asc2hex(char value)
/* */
1528 {
1529 value -= 0x30; /* normalise to 0..9 range */
1530 if (value >= 0) {
1531 if (value > 9) { /* but may not be 10..15 */
1532 value &= 0x1f; /* make A..F & a..f be the same */
1533 value -= 0x07; /* normalise to 10..15 range */
1534 if ((value < 0x0a) || (value > 0x0f)) { /* if outside range then... */
1535 value = -1; /* ...signal error */
1536 }
1537 }
1538 } else { /* outside 0..9 range... */
1539 value = -1; /* ...signal error */
1540 }
1541 return value; /* return hex char or error */
1542 }
1543
1544 #ifdef MODULE
1545 char kernel_version[] = UTS_RELEASE;
1546 static struct device thisDepca = {
1547 " ", /* device name inserted by /linux/drivers/net/net_init.c */
1548 0, 0, 0, 0,
1549 0x200, 7, /* I/O address, IRQ <--- EDIT THIS LINE FOR YOUR CONFIGURATION */
1550 0, 0, 0, NULL, depca_probe };
1551
1552 int
1553 init_module(void)
/* */
1554 {
1555 if (register_netdev(&thisDepca) != 0)
1556 return -EIO;
1557 return 0;
1558 }
1559
1560 void
1561 cleanup_module(void)
/* ![[last]](../icons/n_last.png)
*/
1562 {
1563 if (MOD_IN_USE) {
1564 printk("%s: device busy, remove delayed\n",thisDepca.name);
1565 } else {
1566 unregister_netdev(&thisDepca);
1567 }
1568 }
1569 #endif /* MODULE */
1570
1571
1572 /*
1573 * Local variables:
1574 * kernel-compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c depca.c"
1575 *
1576 * module-compile-command: "gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c depca.c"
1577 * End:
1578 */
![[bottom]](../icons/n_bottom.png){kind=icon}
*/