1 /* depca.c: A DIGITAL DEPCA & EtherWORKS ethernet driver for linux. 2
3 Written 1994 by David C. Davies. 4
5
6 Copyright 1994 David C. Davies 7 and 8 United States Government 9 (as represented by the Director, National Security Agency). 10
11
12 This software may be used and distributed according to the terms of 13 the GNU Public License, incorporated herein by reference. 14
15 This driver is written for the Digital Equipment Corporation series 16 of DEPCA and EtherWORKS ethernet cards: 17
18 DEPCA (the original) 19 DE100 20 DE101 21 DE200 Turbo 22 DE201 Turbo 23 DE202 Turbo (TP BNC) 24 DE210 25 DE422 (EISA) 26
27 The driver has been tested on DE100, DE200 and DE202 cards in a 28 relatively busy network. The DE422 has been tested a little. 29
30 This driver will NOT work for the DE203, DE204 and DE205 series of 31 cards, since they have a new custom ASIC in place of the AMD LANCE 32 chip. 33
34 The author may be reached as davies@wanton.lkg.dec.com or 35 Digital Equipment Corporation, 550 King Street, Littleton MA 01460. 36
37 ========================================================================= 38 The driver was based on the 'lance.c' driver from Donald Becker which is 39 included with the standard driver distribution for linux. Modifications 40 were made to most routines and the hardware recognition routines were 41 written from scratch. Primary references used were: 42
43 1) Lance.c code in /linux/drivers/net/ 44 2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook", 45 AMD, 1992 [(800) 222-9323]. 46 3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)", 47 AMD, Pub. #17881, May 1993. 48 4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA", 49 AMD, Pub. #16907, May 1992 50 5) "DEC EtherWORKS LC Ethernet Controller Owners Manual", 51 Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003 52 6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual", 53 Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003 54 7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR 55 Digital Equipment Corporation, 1989 56 8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual", 57 Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001 58 59 Peter Bauer's depca.c (V0.5) was referred to when debugging this driver. 60 The hash filter code was derived from Reference 3 and has been tested 61 only to the extent that the Table A-1, page A-7, was confirmed to fill 62 the filter bit positions correctly. Hash filtering is not yet 63 implemented in the current driver set. 64
65 The original DEPCA card requires that the ethernet ROM address counter 66 be enabled to count and has an 8 bit NICSR. The ROM counter enabling is 67 only done when a 0x08 is read as the first address octet (to minimise 68 the chances of writing over some other hardware's I/O register). The 69 NICSR accesses have been changed to byte accesses for all the cards 70 supported by this driver, since there is only one useful bit in the MSB 71 (remote boot timeout) and it is not used. Also, there is a maximum of 72 only 48kB network RAM for this card. My thanks to Torbjorn Lindh for 73 help debugging all this (and holding my feet to the fire until I got it 74 right). 75
76 The DE200 series boards have on-board 64kB RAM for use as a shared 77 memory network buffer. Only the DE100 cards make use of a 2kB buffer 78 mode which has not been implemented in this driver (only the 32kB and 79 64kB modes are supported [16kB/48kB for the original DEPCA]). 80
81 At the most only 2 DEPCA cards can be supported on the ISA bus because 82 there is only provision for two I/O base addresses on each card (0x300 83 and 0x200). The I/O address is detected by searching for a byte sequence 84 in the Ethernet station address PROM at the expected I/O address for the 85 Ethernet PROM. The shared memory base address is 'autoprobed' by 86 looking for the self test PROM and detecting the card name. When a 87 second DEPCA is detected, information is placed in the base_addr 88 variable of the next device structure (which is created if necessary), 89 thus enabling ethif_probe initialization for the device. More than 2 90 EISA cards can be supported, but care will be needed assigning the 91 shared memory to ensure that each slot has the correct IRQ, I/O address 92 and shared memory address assigned. 93
94 ************************************************************************ 95
96 NOTE: If you are using two ISA DEPCAs, it is important that you assign 97 the base memory addresses correctly. The driver autoprobes I/O 0x300 98 then 0x200. The base memory address for the first device must be less 99 than that of the second so that the auto probe will correctly assign the 100 I/O and memory addresses on the same card. I can't think of a way to do 101 this unambiguously at the moment, since there is nothing on the cards to 102 tie I/O and memory information together. 103
104 I am unable to test 2 cards together for now, so this code is 105 unchecked. All reports, good or bad, are welcome. 106
107 ************************************************************************ 108
109 The board IRQ setting must be at an unused IRQ which is auto-probed 110 using Donald Becker's autoprobe routines. DEPCA and DE100 board IRQs are 111 {2,3,4,5,7}, whereas the DE200 is at {5,9,10,11,15}. Note that IRQ2 is 112 really IRQ9 in machines with 16 IRQ lines. 113
114 No 16MB memory limitation should exist with this driver as DMA is not 115 used and the common memory area is in low memory on the network card (my 116 current system has 20MB and I've not had problems yet). 117
118 The ability to load this driver as a loadable module has been added. To 119 utilise this ability, you have to do <8 things: 120
121 1) copy depca.c from the /linux/drivers/net directory to your favourite 122 temporary directory. 123 2) edit the source code near line 1530 to reflect the I/O address and 124 IRQ you're using. 125 3) compile depca.c, but include -DMODULE in the command line to ensure 126 that the correct bits are compiled (see end of source code). 127 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a 128 kernel with the depca configuration turned off and reboot. 129 5) insmod depca.o 130 6) run the net startup bits for your eth?? interface manually 131 (usually /etc/rc.inet[12] at boot time). 132 7) enjoy! 133
134 Note that autoprobing is not allowed in loadable modules - the system is 135 already up and running and you're messing with interrupts. Also, there 136 is no way to check on the number of depcas installed at the moment. 137
138 To unload a module, turn off the associated interface 139 'ifconfig eth?? down' then 'rmmod depca'. 140 141 [Alan Cox: Changed to split off the module values as ints for insmod 142 143 you can now do insmod depca.c irq=7 io=0x200 ] 144 145
146 TO DO: 147 ------ 148
149 1. Implement the 2k buffer mode - does anyone need it?? 150
151 Revision History 152 ---------------- 153
154 Version Date Description 155 156 0.1 25-jan-94 Initial writing. 157 0.2 27-jan-94 Added LANCE TX hardware buffer chaining. 158 0.3 1-feb-94 Added multiple DEPCA support. 159 0.31 4-feb-94 Added DE202 recognition. 160 0.32 19-feb-94 Tidy up. Improve multi-DEPCA support. 161 0.33 25-feb-94 Fix DEPCA ethernet ROM counter enable. 162 Add jabber packet fix from murf@perftech.com 163 and becker@super.org 164 0.34 7-mar-94 Fix DEPCA max network memory RAM & NICSR access. 165 0.35 8-mar-94 Added DE201 recognition. Tidied up. 166 0.351 30-apr-94 Added EISA support. Added DE422 recognition. 167 0.36 16-may-94 DE422 fix released. 168 0.37 22-jul-94 Added MODULE support 169 0.38 15-aug-94 Added DBR ROM switch in depca_close(). 170 Multi DEPCA bug fix. 171 0.38axp 15-sep-94 Special version for Alpha AXP Linux V1.0 172 0.381 12-dec-94 Added DE101 recognition, fix multicast bug 173
174 ========================================================================= 175 */ 176
177 staticchar *version = "depca.c:v0.381 12/12/94 davies@wanton.lkg.dec.com\n";
178
179 #include <stdarg.h>
180 #include <linux/kernel.h>
181 #include <linux/sched.h>
182 #include <linux/string.h>
183 #include <linux/ptrace.h>
184 #include <linux/errno.h>
185 #include <linux/ioport.h>
186 #include <linux/malloc.h>
187 #include <linux/interrupt.h>
188 #include <asm/bitops.h>
189 #include <asm/io.h>
190 #include <asm/dma.h>
191
192 #include <linux/netdevice.h>
193 #include <linux/etherdevice.h>
194 #include <linux/skbuff.h>
195
196 #ifdefMODULE 197 #include <linux/module.h>
198 #include <linux/version.h>
199 #endif/* MODULE */ 200
201 #include "depca.h"
202
203 #ifdefDEPCA_DEBUG 204 staticintdepca_debug = DEPCA_DEBUG;
205 #else 206 staticintdepca_debug = 1;
207 #endif 208
209 #ifndefPROBE_LENGTH 210 #definePROBE_LENGTH 32
211 #endif 212
213 #ifndefPROBE_SEQUENCE 214 #definePROBE_SEQUENCE "FF0055AAFF0055AA"
215 #endif 216
217 #ifndefDEPCA_SIGNATURE 218 #defineDEPCA_SIGNATURE{"DEPCA",\
219 "DE100","DE101",\
220 "DE200","DE201","DE202",\
221 "DE210",\
222 "DE422",\
223 ""} 224 #defineDEPCA_NAME_LENGTH 8
225 #endif 226
227 #ifndefDEPCA_RAM_BASE_ADDRESSES 228 #defineDEPCA_RAM_BASE_ADDRESSES{0xc0000,0xd0000,0xe0000,0x00000} 229 #endif 230 staticshortmem_chkd = 0; /* holds which base addrs have been */ 231 /* checked, for multi-DEPCA case */ 232
233 #ifndefDEPCA_IO_PORTS 234 #defineDEPCA_IO_PORTS{0x300, 0x200, 0} 235 #endif 236
237 #ifndefDEPCA_TOTAL_SIZE 238 #defineDEPCA_TOTAL_SIZE 0x10
239 #endif 240
241 #ifndefMAX_NUM_DEPCAS 242 #defineMAX_NUM_DEPCAS 2
243 #endif 244
245 #ifndefDEPCA_EISA_IO_PORTS 246 #defineDEPCA_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */ 247 #endif 248
249 #ifndefMAX_EISA_SLOTS 250 #defineMAX_EISA_SLOTS 8
251 #endif 252
253 /* 254 ** Set the number of Tx and Rx buffers. 255 */ 256 #ifndef DEPCA_BUFFER_LOG_SZ
257 #defineRING_SIZE 16 /* 16 buffers */ 258 #else 259 #defineRING_SIZE (1 << (DEPCA_BUFFERS_LOG_SZ))
260 #endif/* DEPCA_BUFFER_LOG_SZ */ 261
262 #definePKT_BUF_SZ 1544 /* Buffer size for each Tx/Rx buffer */ 263 #definePKT_SZ 1514 /* Maximum ethernet packet length */ 264 #defineDAT_SZ 1500 /* Maximum ethernet data length */ 265 #definePKT_HDR_LEN 14 /* Addresses and data length info */ 266
267 #ifdefHAVE_MULTICAST 268 #ifndefCRC_POLYNOMIAL 269 #defineCRC_POLYNOMIAL 0x04c11db7 /* Ethernet CRC polynomial */ 270 #endif/* CRC_POLYNOMIAL */ 271 #endif/* HAVE_MULTICAST */ 272
273 /* 274 ** The DEPCA Rx and Tx ring descriptors. 275 */ 276 structdepca_rx_head{ 277 longbase;
278 shortbuf_length; /* This length is negative 2's complement! */ 279 shortmsg_length; /* This length is "normal". */ 280 };
281
282 structdepca_tx_head{ 283 longbase;
284 shortlength; /* This length is negative 2's complement! */ 285 shortmisc; /* Errors and TDR info */ 286 };
287
288 #defineLA_MASK 0x0000ffff /* LANCE address mask for mapping network RAM 289 to LANCE memory address space */ 290
291 /* 292 ** The Lance initialization block, described in databook, in common memory. 293 */ 294 structdepca_init{ 295 unsignedshortmode; /* Mode register */ 296 unsignedcharphys_addr[ETH_ALEN]; /* Physical ethernet address */ 297 unsignedshortfilter[4]; /* Multicast filter. */ 298 unsignedlongrx_ring; /* Rx ring base pointer & ring length */ 299 unsignedlongtx_ring; /* Tx ring base pointer & ring length */ 300 };
301
302 structdepca_private{ 303 chardevname[8]; /* Device Product String */ 304 structdepca_rx_head *rx_ring; /* Pointer to start of RX descriptor ring */ 305 structdepca_tx_head *tx_ring; /* Pointer to start of TX descriptor ring */ 306 structdepca_initinit_block;/* Initialization block */ 307 longbus_offset; /* (E)ISA bus address offset vs LANCE */ 308 longdma_buffs; /* Start address of Rx and Tx buffers. */ 309 intcur_rx, cur_tx; /* The next free ring entry */ 310 intdirty_rx, dirty_tx; /* The ring entries to be free()ed. */ 311 intdma;
312 structenet_statisticsstats;
313 char depca_na; /* NICSR access width: 0=>byte, 1=>word */ 314 shortringSize; /* ring size based on available memory */ 315 shortrmask; /* modulus mask based on ring size */ 316 longrlen; /* log2(ringSize) for the descriptors */ 317 };
318
319 /* 320 ** Public Functions 321 */ 322 staticintdepca_open(structdevice *dev);
323 staticintdepca_start_xmit(structsk_buff *skb, structdevice *dev);
324 staticvoiddepca_interrupt(intreg_ptr);
325 staticintdepca_close(structdevice *dev);
326 staticstructenet_statistics *depca_get_stats(structdevice *dev);
327 #ifdefHAVE_MULTICAST 328 staticvoidset_multicast_list(structdevice *dev, intnum_addrs, void *addrs);
329 #endif 330
331 /* 332 ** Private functions 333 */ 334 staticintdepca_probe1(structdevice *dev, shortioaddr);
335 staticvoiddepca_init_ring(structdevice *dev);
336 staticintdepca_rx(structdevice *dev);
337 staticintdepca_tx(structdevice *dev);
338
339 staticvoidLoadCSRs(structdevice *dev);
340 staticintInitRestartDepca(structdevice *dev);
341 staticchar *DepcaSignature(unsignedlongmem_addr);
342 staticintDevicePresent(shortioaddr);
343 #ifdefHAVE_MULTICAST 344 staticvoidSetMulticastFilter(intnum_addrs, char *addrs, char *multicast_table);
345 #endif 346
347 #ifndefMODULE 348 staticstructdevice *isa_probe(structdevice *dev);
349 staticstructdevice *eisa_probe(structdevice *dev);
350 staticstructdevice *alloc_device(structdevice *dev, intioaddr);
351
352 staticintnum_depcas = 0, num_eth = 0, autoprobed = 0;
353
354 #else 355 intinit_module(void);
356 voidcleanup_module(void);
357
358 #endif/* MODULE */ 359
360 /* 361 ** Miscellaneous defines... 362 */ 363 #defineSTOP_DEPCA \
364 outw(CSR0, DEPCA_ADDR);\
365 outw(STOP, DEPCA_DATA)
366
367
368
369
370 intdepca_probe(structdevice *dev)
/* */ 371 { 372 shortbase_addr = dev->base_addr;
373 intstatus = -ENODEV;
374 #ifndefMODULE 375 structdevice *eth0;
376 #endif 377
378 if (base_addr > 0x1ff) {/* Check a single specified location. */ 379 if (DevicePresent(base_addr) == 0) {/* Is DEPCA really here? */ 380 status = depca_probe1(dev, base_addr);
381 } 382 }elseif (base_addr > 0) {/* Don't probe at all. */ 383 status = -ENXIO;
384
385 #ifdefMODULE 386 }else{ 387 printk("Autoprobing is not supported when loading a module based driver.\n");
388 status = -EIO;
389 #else 390 }elseif (!autoprobed) {/* First probe for the DEPCA test */ 391 /* pattern in ROM */ 392 eth0=isa_probe(dev);
393 eth0=eisa_probe(eth0);
394 if (dev->priv) status=0;
395 autoprobed = 1;
396 }else{ 397 status = -ENXIO;
398 #endif/* MODULE */ 399
400 } 401
402 if (status) dev->base_addr = base_addr;
403
404 returnstatus; /* ENODEV would be more accurate. */ 405 } 406
407 staticint 408 depca_probe1(structdevice *dev, shortioaddr)
/* */ 409 { 410 structdepca_private *lp;
411 inti,j, status=0;
412 unsignedlongmem_start, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
413 char *name = NULL;
414 unsignedintnicsr, offset, netRAM;
415
416
417 /* 418 ** Stop the DEPCA. Enable the DBR ROM. Disable interrupts and remote boot. 419 */ 420 STOP_DEPCA;
421
422 nicsr = inb(DEPCA_NICSR);
423 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
424 outb(nicsr, DEPCA_NICSR);
425
426 if (inw(DEPCA_DATA) == STOP) { 427
428 /* Now find out what kind of DEPCA we have. The DE100 uses a different 429 ** addressing scheme for some registers compared to the DE2xx series. 430 ** Note that a base address location is marked as checked if no DEPCA is 431 ** there or one is found (when the search is immediately terminated). This 432 ** shortens the search time a little for multiple DEPCAs. 433 */ 434
435 for (j = 0, i = 0; mem_base[i] && (j == 0);i++) { 436 if (((mem_chkd >> i) & 0x01) == 0) {/* has the memory been checked? */ 437 name = DepcaSignature(mem_base[i]);/* check for a DEPCA here */ 438 mem_chkd |= (0x01 << i); /* mark location checked */ 439 if (*name != '\0') {/* one found? */ 440 j = 1; /* set exit flag */ 441 --i;
442 } 443 } 444 } 445
446 if (*name != '\0') {/* found a DEPCA device */ 447 mem_start = mem_base[i];
448 dev->base_addr = ioaddr;
449
450 if ((ioaddr&0x0fff)==DEPCA_EISA_IO_PORTS) {/* EISA slot address */ 451 printk("%s: %s at %#3x (EISA slot %d)",
452 dev->name, name, ioaddr, ((ioaddr>>12)&0x0f));
453 }else{/* ISA port address */ 454 printk("%s: %s at %#3x", dev->name, name, ioaddr);
455 } 456
457 /* There is a 32 byte station address PROM at DEPCA_PROM address. 458 The first six bytes are the station address. They can be read 459 directly since the signature search set up the ROM address 460 counter correctly just before this function. 461
462 For the DE100 we have to be careful about which port is used to 463 read the ROM info. 464 */ 465
466 if (strstr(name,"DE100")!= NULL) { 467 j = 1;
468 }else{ 469 j = 0;
470 } 471
472 printk(", h/w address ");
473 for (i = 0; i < ETH_ALEN - 1; i++) {/* get the ethernet address */ 474 printk("%2.2x:", dev->dev_addr[i] = inb(DEPCA_PROM + j));
475 } 476 printk("%2.2x", dev->dev_addr[i] = inb(DEPCA_PROM + j));
477
478 for (;i<32;i++) {/* leave ROM counter in known state */ 479 j=inb(DEPCA_PROM);
480 } 481
482 #ifdefHAVE_PORTRESERVE 483 request_region(ioaddr, DEPCA_TOTAL_SIZE,"depca");
484 #endif 485
486 /* 487 ** Set up the maximum amount of network RAM(kB) 488 */ 489 if (strstr(name,"DEPCA")== NULL) { 490 netRAM=64;
491 }else{ 492 netRAM=48;
493 } 494
495 /* 496 ** Determine the base address for the DEPCA RAM from the NI-CSR 497 ** and make up a DEPCA-specific-data structure. 498 */ 499
500 if (nicsr & BUF) { 501 offset = 0x8000; /* 32kbyte RAM offset*/ 502 nicsr &= ~BS; /* DEPCA RAM in top 32k */ 503 printk(",\n has %dkB RAM", netRAM - 32);
504 }elseif ((nicsr & _128KB) && (netRAM!=48)) { 505 offset = 0x0000;
506 printk(",\n has 128kB RAM");
507 }else{ 508 offset = 0x0000; /* 64k/48k bytes RAM */ 509 printk(",\n has %dkB RAM", netRAM);
510 } 511
512 mem_start += offset; /* (E)ISA start address */ 513 printk(" at 0x%.5lx", mem_start);
514
515 /* 516 ** Enable the shadow RAM. 517 */ 518 if (strstr(name,"DEPCA") == NULL) { 519 nicsr |= SHE;
520 outb(nicsr, DEPCA_NICSR);
521 } 522
523 /* 524 ** Calculate the ring size based on the available RAM 525 ** found above. Allocate an equal number of buffers, each 526 ** of size PKT_BUF_SZ (1544 bytes) to the Tx and Rx, allowing one 527 ** descriptor entry (8 bytes) for each buffer. Make sure 528 ** that this ring size is <= RING_SIZE. The ring size must be 529 ** a power of 2. 530 */ 531
532 j = (((netRAM << 10) - offset - sizeof(structdepca_private)) /
533 (PKT_BUF_SZ + 8)) >> 1;
534 for (i=0;j>1;i++) { 535 j >>= 1;
536 } 537
538 /* Hold the ring size information here before the depca 539 ** private structure is allocated. Need this for the memory 540 ** space calculations. 541 */ 542 j = 1 << i;
543
544 /* 545 ** Set up memory information in the device structure. 546 ** Align the descriptor rings on an 8 byte (quadword) boundary. 547 ** 548 ** depca_private area 549 ** rx ring descriptors 550 ** tx ring descriptors 551 ** rx buffers 552 ** tx buffers 553 ** 554 */ 555
556 /* private area & initialise */ 557 dev->priv = (void *)((mem_start + 0x07) & ~0x07);
558 lp = (structdepca_private *)dev->priv;
559 memset(dev->priv, 0, sizeof(structdepca_private));
560 strcpy(lp->devname,name);
561
562 /* Tx & Rx descriptors (aligned to a quadword boundary) */ 563 mem_start = ((((unsignedlong)dev->priv +
564 sizeof(structdepca_private)) +
565 (unsignedlong)0x07) & (unsignedlong)~0x07);
566 lp->rx_ring = (structdepca_rx_head *)mem_start;
567
568 mem_start += (sizeof(structdepca_rx_head) * j);
569 lp->tx_ring = (structdepca_tx_head *)mem_start;
570
571 mem_start += (sizeof(structdepca_tx_head) * j);
572 lp->bus_offset = mem_start & 0x00ff0000;
573 mem_start &= LA_MASK; /* LANCE re-mapped start address */ 574
575 lp->dma_buffs = mem_start;
576
577 mem_start += (PKT_BUF_SZ * j);
578 /* (mem_start now points to the start of the Tx buffers) */ 579
580 /* Initialise the data structures wrt CPU */ 581 memset(lp->rx_ring, 0, sizeof(structdepca_rx_head)*j);
582 memset(lp->tx_ring, 0, sizeof(structdepca_tx_head)*j);
583
584 /* This should never happen. */ 585 if ((long)(lp->rx_ring) & 0x07) { 586 printk("\n **ERROR** DEPCA Rx and Tx descriptor rings not on a quadword boundary.\n");
587 return -ENXIO;
588 } 589
590 /* 591 ** Finish initialising the ring information. 592 */ 593 lp->ringSize = j;
594 if (lp->ringSize > RING_SIZE) lp->ringSize = RING_SIZE;
595 lp->rmask = lp->ringSize - 1;
596
597 /* 598 ** calculate the real RLEN size for the descriptors. It is 599 ** log2(ringSize). 600 */ 601 for (i=0, j = lp->ringSize; j>1; i++) { 602 j >>= 1;
603 } 604 lp->rlen = (unsignedlong)(i << 29);
605
606 /* 607 ** load the initialisation block 608 */ 609 depca_init_ring(dev);
610
611 /* 612 ** Initialise the control and status registers 613 */ 614 LoadCSRs(dev);
615
616 /* 617 ** Enable DEPCA board interrupts for autoprobing 618 */ 619 nicsr = ((nicsr & ~IM)|IEN);
620 outb(nicsr, DEPCA_NICSR);
621
622 /* The DMA channel may be passed in on this parameter. */ 623 dev->dma = 0;
624
625 /* To auto-IRQ we enable the initialization-done and DMA err, 626 interrupts. For now we will always get a DMA error. */ 627 if (dev->irq < 2) { 628 #ifndefMODULE 629 autoirq_setup(0);
630
631 /* Trigger an initialization just for the interrupt. */ 632 outw(INEA | INIT, DEPCA_DATA);
633
634 dev->irq = autoirq_report(1);
635 if (dev->irq) { 636 printk(" and uses IRQ%d.\n", dev->irq);
637 }else{ 638 printk(" and failed to detect IRQ line.\n");
639 status = -EAGAIN;
640 } 641 #endif/* MODULE */ 642 }else{ 643 printk(" and assigned IRQ%d.\n", dev->irq);
644 } 645 }else{ 646 status = -ENXIO;
647 } 648 if (!status) { 649 if (depca_debug > 0) { 650 printk(version);
651 } 652
653 /* The DEPCA-specific entries in the device structure. */ 654 dev->open = &depca_open;
655 dev->hard_start_xmit = &depca_start_xmit;
656 dev->stop = &depca_close;
657 dev->get_stats = &depca_get_stats;
658 #ifdefHAVE_MULTICAST 659 dev->set_multicast_list = &set_multicast_list;
660 #endif 661
662 dev->mem_start = 0;
663
664 /* Fill in the generic field of the device structure. */ 665 ether_setup(dev);
666 } 667 }else{ 668 status = -ENXIO;
669 } 670
671 returnstatus;
672 } 673
674
675 staticint 676 depca_open(structdevice *dev)
/* */ 677 { 678 structdepca_private *lp = (structdepca_private *)dev->priv;
679 inti,nicsr,ioaddr = dev->base_addr;
680
681 if (request_irq(dev->irq, &depca_interrupt, 0, "depca")) { 682 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
683 return -EAGAIN;
684 } 685
686 irq2dev_map[dev->irq] = dev;
687
688 /* 689 ** Stop the DEPCA & get the board status information. 690 */ 691 STOP_DEPCA;
692 nicsr = inb(DEPCA_NICSR);
693
694 /* 695 ** Make sure the shadow RAM is enabled 696 */ 697 if (strstr(lp->devname,"DEPCA") == NULL) { 698 nicsr |= SHE;
699 outb(nicsr, DEPCA_NICSR);
700 } 701
702 /* 703 ** Re-initialize the DEPCA... 704 */ 705 depca_init_ring(dev); /* initialize the descriptor rings */ 706 LoadCSRs(dev);
707
708 if (depca_debug > 1){ 709 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
710 printk("Descriptor head addresses:\n");
711 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring,(long)lp->tx_ring);
712 printk("Descriptor addresses:\n");
713 for (i=0;i<lp->ringSize;i++){ 714 printk("\t0x%8.8lx 0x%8.8lx\n",(long)&lp->rx_ring[i].base,
715 (long)&lp->tx_ring[i].base);
716 } 717 printk("Buffer addresses:\n");
718 for (i=0;i<lp->ringSize;i++){ 719 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring[i].base,
720 (long)lp->tx_ring[i].base);
721 } 722 printk("Initialisation block at 0x%8.8lx\n",(long)&lp->init_block);
723 printk("\tmode: 0x%4.4x\n",lp->init_block.mode);
724 printk("\tphysical address: ");
725 for (i=0;i<6;i++){ 726 printk("%2.2x:",(short)lp->init_block.phys_addr[i]);
727 } 728 printk("\n\tlogical address filter: 0x");
729 for (i=0;i<4;i++){ 730 printk("%2.2x",(short)lp->init_block.filter[i]);
731 } 732 printk("\n\trx_ring at: 0x%8.8lx\n",(long)lp->init_block.rx_ring);
733 printk("\ttx_ring at: 0x%8.8lx\n",(long)lp->init_block.tx_ring);
734 printk("dma_buffs: 0x%8.8lx\n",(long)lp->dma_buffs);
735 printk("Ring size: %d\nMask: 0x%2.2x\nLog2(ringSize): 0x%8.8lx\n",
736 (short)lp->ringSize,
737 (char)lp->rmask,
738 (long)lp->rlen);
739 outw(CSR2,DEPCA_ADDR);
740 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
741 outw(CSR1,DEPCA_ADDR);
742 printk("%4.4x\n",inw(DEPCA_DATA));
743 outw(CSR3,DEPCA_ADDR);
744 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
745 } 746
747 /* 748 ** Enable DEPCA board interrupts and turn off LED 749 */ 750 nicsr = ((nicsr & ~IM & ~LED)|IEN);
751 outb(nicsr, DEPCA_NICSR);
752 outw(CSR0,DEPCA_ADDR);
753
754 dev->tbusy = 0;
755 dev->interrupt = 0;
756 dev->start = 1;
757
758 InitRestartDepca(dev); /* ignore the return status */ 759
760 if (depca_debug > 1){ 761 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
762 printk("nicsr: 0x%02x\n",inb(DEPCA_NICSR));
763 } 764
765 #ifdefMODULE 766 MOD_INC_USE_COUNT;
767 #endif 768
769 return 0; /* Always succeed */ 770 } 771
772 /* Initialize the lance Rx and Tx descriptor rings. */ 773 staticvoid 774 depca_init_ring(structdevice *dev)
/* */ 775 { 776 structdepca_private *lp = (structdepca_private *)dev->priv;
777 unsignedlongi;
778
779 lp->init_block.mode = DTX | DRX; /* Disable Rx and Tx. */ 780 lp->cur_rx = lp->cur_tx = 0;
781 lp->dirty_rx = lp->dirty_tx = 0;
782
783 /* Initialize the base addresses and length of each buffer in the ring */ 784 for (i = 0; i < lp->ringSize; i++) { 785 lp->rx_ring[i].base = (lp->dma_buffs + i*PKT_BUF_SZ) | R_OWN;
786 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
787 lp->tx_ring[i].base = (lp->dma_buffs + (i+lp->ringSize) * PKT_BUF_SZ) &
788 (unsignedlong)(0x00ffffff);
789 } 790
791 /* Set up the initialization block */ 792 for (i = 0; i < ETH_ALEN; i++) { 793 lp->init_block.phys_addr[i] = dev->dev_addr[i];
794 } 795 for (i = 0; i < 4; i++) { 796 lp->init_block.filter[i] = 0x0000;
797 } 798 lp->init_block.rx_ring = ((unsignedlong)lp->rx_ring & LA_MASK) | lp->rlen;
799 lp->init_block.tx_ring = ((unsignedlong)lp->tx_ring & LA_MASK) | lp->rlen;
800
801 lp->init_block.mode = 0x0000; /* Enable the Tx and Rx */ 802 } 803
804 /* 805 ** Writes a socket buffer to TX descriptor ring and starts transmission 806 */ 807 staticint 808 depca_start_xmit(structsk_buff *skb, structdevice *dev)
/* */ 809 { 810 structdepca_private *lp = (structdepca_private *)dev->priv;
811 intioaddr = dev->base_addr;
812 intstatus = 0;
813
814 /* Transmitter timeout, serious problems. */ 815 if (dev->tbusy) { 816 inttickssofar = jiffies - dev->trans_start;
817 if (tickssofar < 10) { 818 status = -1;
819 }else{ 820 printk("%s: transmit timed out, status %04x, resetting.\n",
821 dev->name, inw(DEPCA_DATA));
822
823 STOP_DEPCA;
824 depca_init_ring(dev);
825 LoadCSRs(dev);
826 InitRestartDepca(dev);
827 dev->tbusy=0;
828 dev->trans_start = jiffies;
829 } 830 returnstatus;
831 } 832
833 if (skb == NULL) { 834 dev_tint(dev);
835 return 0;
836 } 837
838 if (skb->len <= 0) { 839 return 0;
840 } 841
842 if (depca_debug > 3) { 843 outw(CSR0, DEPCA_ADDR);
844 printk("%s: depca_start_xmit() called, csr0 %4.4x.\n", dev->name,
845 inw(DEPCA_DATA));
846 } 847
848 /* Block a timer-based transmit from overlapping. This could better be 849 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */ 850 if (set_bit(0, (void*)&dev->tbusy) != 0)
851 printk("%s: Transmitter access conflict.\n", dev->name);
852
853 /* 854 ** The TX buffer, skb, has to be copied into the local network RAM 855 ** for the LANCE to access it. The skb may be at > 16MB for large 856 ** (memory) systems. 857 */ 858 {/* Fill in a Tx ring entry */ 859 unsignedchar *buf;
860 intentry = lp->cur_tx++;
861 intlen;
862 longskbL = skb->len;
863 char *p = (char *) skb->data;
864
865 entry &= lp->rmask; /* Ring around buffer number. */ 866 buf = (unsignedchar *)((lp->tx_ring[entry].base+lp->bus_offset) &
867 0x00ffffff);
868
869 /* Wait for a full ring to free up */ 870 while (lp->tx_ring[entry].base < 0);
871
872 /* 873 ** Caution: the write order is important here... don't set up the 874 ** ownership rights until all the other information is in place. 875 */ 876 len = ((skbL > PKT_SZ) ? PKT_SZ : skbL); /* skb too long */ 877 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */ 878 skbL -= len;
879 lp->tx_ring[entry].length = -len;
880
881 /* Clears various error flags */ 882 lp->tx_ring[entry].misc = 0x0000;
883
884 /* copy the data from the socket buffer to the net memory */ 885 memcpy((unsignedchar *)(buf), skb->data, len);
886
887 /* Hand over buffer ownership to the LANCE */ 888 if (skbL <= 0) lp->tx_ring[entry].base |= (T_ENP);
889 lp->tx_ring[entry].base |= (T_OWN|T_STP);
890
891 /* Trigger an immediate send demand. */ 892 outw(CSR0, DEPCA_ADDR);
893 outw(INEA | TDMD, DEPCA_DATA);
894
895 dev->trans_start = jiffies;
896
897 for (p += len; skbL > 0; p += len) { 898
899 /* Get new buffer pointer */ 900 entry = lp->cur_tx++;
901 entry &= lp->rmask; /* Ring around buffer number. */ 902 buf = (unsignedchar *)((lp->tx_ring[entry].base+lp->bus_offset) &
903 0x00ffffff);
904
905 /* Wait for a full ring to free up */ 906 while (lp->tx_ring[entry].base < 0);
907 dev->tbusy=0;
908
909 /* Copy ethernet header to the new buffer */ 910 memcpy((unsignedchar *)buf, skb->data, PKT_HDR_LEN);
911
912 /* Determine length of data buffer */ 913 len = ((skbL > DAT_SZ) ? DAT_SZ : skbL); /* skbL too long */ 914 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */ 915 skbL -= len;
916 lp->tx_ring[entry].length = -len;
917
918 /* Clears various error flags */ 919 lp->tx_ring[entry].misc = 0x0000;
920
921 /* copy the data from the socket buffer to the net memory */ 922 memcpy((unsignedchar *)(buf + PKT_HDR_LEN), (unsignedchar *)p, len);
923
924 /* Hand over buffer ownership to the LANCE */ 925 if (skbL <= 0) lp->tx_ring[entry].base |= T_ENP;
926 lp->tx_ring[entry].base |= T_OWN;
927 } 928
929 if (depca_debug > 4) { 930 unsignedchar *pkt =
931 (unsignedchar *)((lp->tx_ring[entry].base+lp->bus_offset) &
932 0x00ffffff);
933
934 printk("%s: tx ring[%d], %#lx, sk_buf %#lx len %d.\n",
935 dev->name, entry, (unsignedlong) &lp->tx_ring[entry],
936 lp->tx_ring[entry].base, -lp->tx_ring[entry].length);
937 printk("%s: Tx %2.2x %2.2x %2.2x ... %2.2x %2.2x %2.2x %2.2x...%2.2x len %2.2x %2.2x %2.2x %2.2x.\n",
938 dev->name, pkt[0], pkt[1], pkt[2], pkt[5], pkt[6],
939 pkt[7], pkt[8], pkt[11], pkt[12], pkt[13],
940 pkt[14], pkt[15]);
941 } 942
943 /* Check if the TX ring is full or not - 'tbusy' cleared if not full. */ 944 if (lp->tx_ring[(entry+1) & lp->rmask].base >= 0) { 945 dev->tbusy=0;
946 } 947
948 dev_kfree_skb (skb, FREE_WRITE);
949 } 950
951 return 0;
952 } 953
954 /* 955 ** The DEPCA interrupt handler. 956 */ 957 staticvoid 958 depca_interrupt(intreg_ptr)
/* */ 959 { 960 intirq = -(((structpt_regs *)reg_ptr)->orig_eax+2);
961 structdevice *dev = (structdevice *)(irq2dev_map[irq]);
962 structdepca_private *lp;
963 intcsr0, ioaddr, nicsr;
964
965 if (dev == NULL) { 966 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
967 }else{ 968 lp = (structdepca_private *)dev->priv;
969 ioaddr = dev->base_addr;
970
971 if (dev->interrupt)
972 printk("%s: Re-entering the interrupt handler.\n", dev->name);
973
974 dev->interrupt = MASK_INTERRUPTS;
975
976 /* mask the DEPCA board interrupts and turn on the LED */ 977 nicsr = inb(DEPCA_NICSR);
978 nicsr |= (IM|LED);
979 outb(nicsr, DEPCA_NICSR);
980
981 outw(CSR0, DEPCA_ADDR);
982 csr0 = inw(DEPCA_DATA);
983
984 /* Acknowledge all of the current interrupt sources ASAP. */ 985 outw(csr0 & ~(INEA|TDMD|STOP|STRT|INIT), DEPCA_DATA);
986
987 if (depca_debug > 5)
988 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
989 dev->name, csr0, inw(DEPCA_DATA));
990
991 if (csr0 & RINT) /* Rx interrupt (packet arrived) */ 992 depca_rx(dev);
993
994 if (csr0 & TINT) /* Tx interrupt (packet sent) */ 995 depca_tx(dev);
996
997 /* Clear the interrupts we've handled. */ 998 outw(CSR0, DEPCA_ADDR);
999 outw(BABL|CERR|MISS|MERR|RINT|TINT|IDON|INEA, DEPCA_DATA);
1000
1001 if (depca_debug > 4) {1002 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
1003 dev->name, inw(DEPCA_ADDR),
1004 inw(DEPCA_DATA));
1005 }1006
1007 /* Unmask the DEPCA board interrupts and turn off the LED */1008 nicsr = (nicsr & ~IM & ~LED);
1009 outb(nicsr, DEPCA_NICSR);
1010 dev->interrupt = UNMASK_INTERRUPTS;
1011 }1012
1013 return;
1014 }1015
1016 staticint1017 depca_rx(structdevice *dev)
/* */1018 {1019 structdepca_private *lp = (structdepca_private *)dev->priv;
1020 intentry = lp->cur_rx & lp->rmask;
1021
1022 /* If we own the next entry, it's a new packet. Send it up. */1023 for (; lp->rx_ring[entry].base >= 0; entry = (++lp->cur_rx) & lp->rmask) {1024 intstatus = lp->rx_ring[entry].base >> 16 ;
1025 intchained;
1026
1027 /*1028 ** There is a tricky error noted by John Murphy, <murf@perftech.com>1029 ** to Russ Nelson: even with full-sized buffers, it's possible for a1030 ** jabber packet to use two buffers, with only the last one correctly1031 ** noting the error.1032 */1033
1034 /* Check for a chaining buffer */1035 chained = 0;
1036 if (status == R_STP) {1037 chained = 1;
1038
1039 /* 1040 ** Wait for next buffer to complete to check for errors. This1041 ** is slow but infrequent and allows for correct hardware buffer1042 ** chaining (whilst defeating the chaining's purpose).1043 */1044 while ((status=(lp->rx_ring[(entry+1)&lp->rmask].base >> 16)) < 0);
1045
1046 /* NB: 'status' now comes from the buffer following 'entry'. */1047 }1048
1049 if (status & R_ERR) {/* There was an error. */1050 lp->stats.rx_errors++; /* Update the error stats. */1051 if (status & R_FRAM) lp->stats.rx_frame_errors++;
1052 if (status & R_OFLO) lp->stats.rx_over_errors++;
1053 if (status & R_CRC) lp->stats.rx_crc_errors++;
1054 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
1055 }else{/* Malloc up new buffer, compatible with net-2e. */1056 shortpkt_len = lp->rx_ring[entry].msg_length;
1057 structsk_buff *skb;
1058
1059 skb = alloc_skb(pkt_len, GFP_ATOMIC);
1060 if (skb == NULL) {1061 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1062 lp->stats.rx_dropped++; /* Really, deferred. */1063 break;
1064 }1065 skb->len = pkt_len;
1066 skb->dev = dev;
1067 memcpy(skb->data,
1068 (unsignedchar *)((lp->rx_ring[entry].base+lp->bus_offset) &
1069 0x00ffffff),
1070 pkt_len);
1071 /* 1072 ** Notify the upper protocol layers that there is another 1073 ** packet to handle1074 */1075 netif_rx(skb);
1076 lp->stats.rx_packets++;
1077 }1078
1079 /* turn over ownership of the current entry back to the LANCE */1080 lp->rx_ring[entry].base |= R_OWN;
1081 if (chained && (status & R_ERR)) {/* next entry also bad */1082 entry = (++lp->cur_rx) & lp->rmask;
1083 lp->rx_ring[entry].base |= R_OWN;
1084 }1085 }1086
1087 /* 1088 ** We should check that at least two ring entries are free. If not,1089 ** we should free one and mark stats->rx_dropped++. 1090 */1091
1092 return 0;
1093 }1094
1095 /*1096 ** Buffer sent - check for buffer errors.1097 */1098 staticint1099 depca_tx(structdevice *dev)
/* */1100 {1101 structdepca_private *lp = (structdepca_private *)dev->priv;
1102 intdirty_tx = lp->dirty_tx & lp->rmask;
1103
1104 if (depca_debug > 5)
1105 printk("%s: Cleaning tx ring, dirty %d clean %d.\n",
1106 dev->name, dirty_tx, (lp->cur_tx & lp->rmask));
1107
1108 /* 1109 ** While the dirty entry is not the current one AND 1110 ** the LANCE doesn't own it... 1111 */1112 for (; dirty_tx!=(lp->cur_tx & lp->rmask) && lp->tx_ring[dirty_tx].base>0;
1113 dirty_tx = ++lp->dirty_tx & lp->rmask) {1114 unsignedlong *tmdp = (unsignedlong *)(&lp->tx_ring[dirty_tx]);
1115 intstatus = lp->tx_ring[dirty_tx].base >> 16;
1116
1117 if (status < 0) {/* Packet not yet sent! */1118 printk("interrupt for packet not yet sent!\n");
1119 break;
1120 }1121 if (status & T_ERR) {/* There was an major error, log it. */1122 interr_status = lp->tx_ring[dirty_tx].misc;
1123
1124 lp->stats.tx_errors++;
1125 if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1126 if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1127 if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
1128 if (err_status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1129 /* We should re-init() after the FIFO error. */1130 }elseif (status & (T_MORE | T_ONE)) {1131 lp->stats.collisions++;
1132 }else{1133 lp->stats.tx_packets++;
1134 }1135
1136 if (depca_debug > 5)
1137 printk("%s: Tx done entry %d, %4.4lx %4.4lx %4.4lx %4.4lx.\n",
1138 dev->name, dirty_tx,
1139 tmdp[0], tmdp[1], tmdp[2], tmdp[3]);
1140 }1141 /*mark_bh(INET_BH);*/1142 return 0;
1143 }1144
1145 staticint1146 depca_close(structdevice *dev)
/* */1147 {1148 structdepca_private *lp = (structdepca_private *)dev->priv;
1149 intnicsr, ioaddr = dev->base_addr;
1150
1151 dev->start = 0;
1152 dev->tbusy = 1;
1153
1154 outw(CSR0, DEPCA_ADDR);
1155
1156 if (depca_debug > 1) {1157 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1158 dev->name, inw(DEPCA_DATA));
1159 }1160
1161 /* 1162 ** We stop the DEPCA here -- it occasionally polls1163 ** memory if we don't. 1164 */1165 outw(STOP, DEPCA_DATA);
1166
1167 /*1168 ** Give back the ROM in case the user wants to go to DOS1169 */1170 if (strstr(lp->devname,"DEPCA") == NULL) {1171 nicsr = inb(DEPCA_NICSR);
1172 nicsr &= ~SHE;
1173 outb(nicsr, DEPCA_NICSR);
1174 }1175
1176 free_irq(dev->irq);
1177
1178 irq2dev_map[dev->irq] = 0;
1179
1180 #ifdefMODULE1181 MOD_DEC_USE_COUNT;
1182 #endif1183
1184 return 0;
1185 }1186
1187 staticvoidLoadCSRs(structdevice *dev)
/* */1188 {1189 structdepca_private *lp = (structdepca_private *)dev->priv;
1190 intioaddr = dev->base_addr;
1191
1192 outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */1193 outw((unsignedshort)((unsignedlong)(&lp->init_block) & LA_MASK),
1194 DEPCA_DATA);
1195 outw(CSR2, DEPCA_ADDR); /* initialisation block address MSW */1196 outw((unsignedshort)(((unsignedlong)(&lp->init_block) & LA_MASK) >> 16),
1197 DEPCA_DATA);
1198 outw(CSR3, DEPCA_ADDR); /* ALE control */1199 outw(ACON, DEPCA_DATA);
1200 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */1201 }1202
1203 staticintInitRestartDepca(structdevice *dev)
/* */1204 {1205 structdepca_private *lp = (structdepca_private *)dev->priv;
1206 intioaddr = dev->base_addr;
1207 inti, status=0;
1208
1209 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */1210 outw(INIT, DEPCA_DATA); /* initialize DEPCA */1211
1212 /* wait for lance to complete initialisation */1213 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1214
1215 if (i!=100) {1216 /* clear IDON by writing a "1", enable interrupts and start lance */1217 outw(IDON | INEA | STRT, DEPCA_DATA);
1218 if (depca_debug > 2) {1219 printk("%s: DEPCA open after %d ticks, init block %#lx csr0 %4.4x.\n",
1220 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1221 }1222 }else{1223 status = -1;
1224 printk("%s: DEPCA unopened after %d ticks, init block %#lx csr0 %4.4x.\n",
1225 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1226 }1227
1228 returnstatus;
1229 }1230
1231 staticstructenet_statistics *
1232 depca_get_stats(structdevice *dev)
/* */1233 {1234 structdepca_private *lp = (structdepca_private *)dev->priv;
1235
1236 /* Null body since there is no framing error counter */1237
1238 return &lp->stats;
1239 }1240
1241 #ifdefHAVE_MULTICAST1242 /*1243 ** Set or clear the multicast filter for this adaptor.1244 ** num_addrs == -1 Promiscuous mode, receive all packets1245 ** num_addrs == 0 Normal mode, clear multicast list1246 ** num_addrs > 0 Multicast mode, receive normal and MC packets, and do1247 ** best-effort filtering.1248 */1249 #definehash_filterlp->init_block.filter1250
1251 staticvoid1252 set_multicast_list(structdevice *dev, intnum_addrs, void *addrs)
/* */1253 {1254 shortioaddr = dev->base_addr;
1255 structdepca_private *lp = (structdepca_private *)dev->priv;
1256
1257 if (irq2dev_map[dev->irq] != NULL) {1258 STOP_DEPCA; /* Temporarily stop the depca. */1259 depca_init_ring(dev); /* Initialize the descriptor rings */1260
1261 if (num_addrs >= 0) {1262 SetMulticastFilter(num_addrs, (char *)addrs, (char *)hash_filter);
1263 lp->init_block.mode &= ~PROM; /* Unset promiscuous mode */1264 }else{1265 lp->init_block.mode |= PROM; /* Set promiscuous mode */1266 }1267
1268 LoadCSRs(dev); /* Reload CSR3 */1269 InitRestartDepca(dev); /* Resume normal operation. */1270 }1271 }1272
1273 /*1274 ** Calculate the hash code and update the logical address filter1275 ** from a list of ethernet multicast addresses.1276 ** Derived from a 'C' program in the AMD data book:1277 ** "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)", 1278 ** Pub #17781, Rev. A, May 19931279 */1280 staticvoidSetMulticastFilter(intnum_addrs, char *addrs, char *multicast_table)
/* */1281 {1282 charj, ctrl, bit, octet, hashcode;
1283 shortinti;
1284 longintCRC, poly = (longint) CRC_POLYNOMIAL;
1285
1286 for (i=0;i<num_addrs;i++) {/* for each address in the list */1287 if (((char) *(addrs+ETH_ALEN*i) & 0x01) == 1) {/* is multicast address? */1288 CRC = (longint) 0xffffffff; /* init CRC for each address */1289 for (octet=0;octet<ETH_ALEN;octet++) {/* for each address octet */1290 for(j=0;j<8;j++) {/* process each address bit */1291 bit = (((char)* (addrs+ETH_ALEN*i+octet)) >> j) & 0x01;
1292 ctrl = ((CRC < 0) ? 1 : 0); /* shift the control bit */1293 CRC <<= 1; /* shift the CRC */1294 if (bit ^ ctrl) {/* (bit) XOR (control bit) */1295 CRC ^= poly; /* (CRC) XOR (polynomial) */1296 }1297 }1298 }1299 hashcode = (CRC & 0x00000001); /* hashcode is 6 LSb of CRC ... */1300 for (j=0;j<5;j++) {/* ... in reverse order. */1301 hashcode <<= 1;
1302 CRC >>= 1;
1303 hashcode |= (CRC & 0x00000001);
1304 }1305 octet = hashcode >> 3; /* bit[3-5] -> octet in filter */1306 /* bit[0-2] -> bit in octet */1307 multicast_table[octet] |= (1 << (hashcode & 0x07));
1308 }1309 }1310 return;
1311 }1312
1313 #endif/* HAVE_MULTICAST */1314
1315 #ifndefMODULE1316 /*1317 ** ISA bus I/O device probe1318 */1319 staticstructdevice *isa_probe(structdevice *dev)
/* */1320 {1321 int *port, ports[] = DEPCA_IO_PORTS;
1322 intstatus;
1323
1324 for (status = -ENODEV, port = &ports[0];
1325 *port && (num_depcas < MAX_NUM_DEPCAS); port++) {1326 intioaddr = *port;
1327
1328 if (DevicePresent(ioaddr) == 0) {1329 if (num_depcas > 0) {/* only gets here in autoprobe */1330 dev = alloc_device(dev, ioaddr);
1331 }else{1332 if ((status = depca_probe1(dev, ioaddr)) == 0) {1333 num_depcas++;
1334 }1335 }1336 num_eth++;
1337 }1338 }1339 returndev;
1340 }1341
1342 /*1343 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually1344 ** the motherboard.1345 */1346 staticstructdevice *eisa_probe(structdevice *dev)
/* */1347 {1348 inti, ioaddr = DEPCA_EISA_IO_PORTS;
1349 intstatus;
1350
1351 ioaddr+=0x1000; /* get the first slot address */1352 for (status = -ENODEV, i=1; i<MAX_EISA_SLOTS; i++, ioaddr+=0x1000) {1353
1354 if (DevicePresent(ioaddr) == 0) {1355 if (num_depcas > 0) {/* only gets here in autoprobe */1356 dev = alloc_device(dev, ioaddr);
1357 }else{1358 if ((status = depca_probe1(dev, ioaddr)) == 0) {1359 num_depcas++;
1360 }1361 }1362 num_eth++;
1363 }1364 }1365 returndev;
1366 }1367
1368 /*1369 ** Allocate the device by pointing to the next available space in the1370 ** device structure. Should one not be available, it is created.1371 */1372 staticstructdevice *alloc_device(structdevice *dev, intioaddr)
/* */1373 {1374 /*1375 ** Check the device structures for an end of list or unused device1376 */1377 while (dev->next != NULL) {1378 if (dev->next->base_addr == 0xffe0) break;
1379 dev = dev->next; /* walk through eth device list */1380 num_eth++; /* increment eth device number */1381 }1382
1383 /*1384 ** If no more device structures, malloc one up. If memory could1385 ** not be allocated, print an error message.1386 */1387 if (dev->next == NULL) {1388 dev->next = (structdevice *)kmalloc(sizeof(structdevice) + 8,
1389 GFP_KERNEL);
1390 if (dev->next == NULL) {1391 printk("eth%d: Device not initialised, insufficient memory\n",
1392 num_eth);
1393 }1394 }1395
1396 /*1397 ** If the memory was allocated, point to the new memory area1398 ** and initialize it (name, I/O address, next device (NULL) and1399 ** initialisation probe routine).1400 */1401 if ((dev->next != NULL) &&
1402 (num_eth > 0) && (num_eth < 9999)) {1403 dev = dev->next; /* point to the new device */1404 dev->name = (char *)(dev + 1);
1405 sprintf(dev->name,"eth%d", num_eth);/* New device name */1406 dev->base_addr = ioaddr; /* assign the io address */1407 dev->next = NULL; /* mark the end of list */1408 dev->init = &depca_probe; /* initialisation routine */1409 num_depcas++;
1410 }1411
1412 returndev;
1413 }1414 #endif/* MODULE */1415
1416 /*1417 ** Look for a particular board name in the on-board Remote Diagnostics1418 ** and Boot (RDB) ROM. This will also give us a clue to the network RAM1419 ** base address.1420 */1421 staticchar *DepcaSignature(unsignedlongmem_addr)
/* */1422 {1423 unsignedlongi,j,k;
1424 staticcharsignatures[][DEPCA_NAME_LENGTH] = DEPCA_SIGNATURE;
1425 staticcharthisName[DEPCA_NAME_LENGTH];
1426 chartmpstr[17];
1427
1428 for (i=0;i<16;i++) {/* copy the first 16 bytes of ROM to */1429 tmpstr[i] = *(unsignedchar *)(mem_addr+0xc000+i); /* a temporary string */1430 }1431 tmpstr[i]='\0';
1432
1433 strcpy(thisName,"");
1434 for (i=0;*signatures[i]!='\0' && *thisName=='\0';i++) {1435 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {1436 if (signatures[i][k] == tmpstr[j]) {/* track signature */1437 k++;
1438 }else{/* lost signature; begin search again */1439 k=0;
1440 }1441 }1442 if (k == strlen(signatures[i])) {1443 strcpy(thisName,signatures[i]);
1444 }1445 }1446
1447 returnthisName; /* return the device name string */1448 }1449
1450 /*1451 ** Look for a special sequence in the Ethernet station address PROM that1452 ** is common across all DEPCA products. Note that the original DEPCA needs1453 ** its ROM address counter to be initialized and enabled. Only enable1454 ** if the first address octet is a 0x08 - this minimises the chances of1455 ** messing around with some other hardware, but it assumes that this DEPCA1456 ** card initialized itself correctly. It also assumes that all past and1457 ** future DEPCA/EtherWORKS cards will have ethernet addresses beginning with1458 ** a 0x08.1459 */1460
1461 staticintDevicePresent(shortioaddr)
/* */1462 {1463 staticshortfp=1,sigLength=0;
1464 staticchardevSig[] = PROBE_SEQUENCE;
1465 chardata;
1466 inti, j, nicsr, status = 0;
1467 staticcharasc2hex(charvalue);
1468
1469 /*1470 ** Initialize the counter on a DEPCA card. Two reads to ensure DEPCA ethernet1471 ** address counter is a) cleared and b) the correct data read.1472 */1473 data = inb(DEPCA_PROM); /* clear counter */1474 data = inb(DEPCA_PROM); /* read data */1475
1476 /*1477 ** Enable counter1478 */1479 if (data == 0x08) {1480 nicsr = inb(DEPCA_NICSR);
1481 nicsr |= AAC;
1482 outb(nicsr, DEPCA_NICSR);
1483 }1484
1485 /* 1486 ** Convert the ascii signature to a hex equivalent & pack in place 1487 */1488 if (fp) {/* only do this once!... */1489 for (i=0,j=0;devSig[i] != '\0' && !status;i+=2,j++) {1490 if ((devSig[i]=asc2hex(devSig[i]))>=0) {1491 devSig[i]<<=4;
1492 if((devSig[i+1]=asc2hex(devSig[i+1]))>=0){1493 devSig[j]=devSig[i]+devSig[i+1];
1494 }else{1495 status= -1;
1496 }1497 }else{1498 status= -1;
1499 }1500 }1501 sigLength=j;
1502 fp = 0;
1503 }1504
1505 /* 1506 ** Search the Ethernet address ROM for the signature. Since the ROM address1507 ** counter can start at an arbitrary point, the search must include the entire1508 ** probe sequence length plus the (length_of_the_signature - 1).1509 ** Stop the search IMMEDIATELY after the signature is found so that the1510 ** PROM address counter is correctly positioned at the start of the1511 ** ethernet address for later read out.1512 */1513 if (!status) {1514 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {1515 data = inb(DEPCA_PROM);
1516 if (devSig[j] == data) {/* track signature */1517 j++;
1518 }else{/* lost signature; begin search again */1519 j=0;
1520 }1521 }1522
1523 if (j!=sigLength) {1524 status = -ENODEV; /* search failed */1525 }1526 }1527
1528 returnstatus;
1529 }1530
1531 staticcharasc2hex(charvalue)
/* */1532 {1533 value -= 0x30; /* normalise to 0..9 range */1534 if (value >= 0) {1535 if (value > 9) {/* but may not be 10..15 */1536 value &= 0x1f; /* make A..F & a..f be the same */1537 value -= 0x07; /* normalise to 10..15 range */1538 if ((value < 0x0a) || (value > 0x0f)) {/* if outside range then... */1539 value = -1; /* ...signal error */1540 }1541 }1542 }else{/* outside 0..9 range... */1543 value = -1; /* ...signal error */1544 }1545 returnvalue; /* return hex char or error */1546 }1547
1548 #ifdefMODULE1549 charkernel_version[] = UTS_RELEASE;
1550 staticstructdevicethisDepca = {1551 " ", /* device name inserted by /linux/drivers/net/net_init.c */1552 0, 0, 0, 0,
1553 0x200, 7, /* I/O address, IRQ */1554 0, 0, 0, NULL, depca_probe};
1555
1556 /*1557 * This is a tweak to keep the insmod program happy. It can only1558 * set int values with var=value so we split these out.1559 */1560
1561 intirq=7; /* EDIT THESE LINE FOR YOUR CONFIGURATION */1562 intio=0x200; /* Or use the irq= io= options to insmod */1563
1564 int1565 init_module(void)
/* */1566 {1567 thisDepca.irq=irq;
1568 thisDepca.base_addr=io;
1569 if (register_netdev(&thisDepca) != 0)
1570 return -EIO;
1571 return 0;
1572 }1573
1574 void1575 cleanup_module(void)
/* */1576 {1577 if (MOD_IN_USE) {1578 printk("%s: device busy, remove delayed\n",thisDepca.name);
1579 }else{1580 unregister_netdev(&thisDepca);
1581 }1582 }1583 #endif/* MODULE */1584
1585
1586 /*1587 * Local variables:1588 * kernel-compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c depca.c"1589 *1590 * module-compile-command: "gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c depca.c"1591 * End:1592 */