root/include/asm-alpha/processor.h

/* */

INCLUDED FROM

DEFINITIONS

1. start_bh_atomic
2. end_bh_atomic

   1 /*
   2  * include/asm-alpha/processor.h
   3  *
   4  * Copyright (C) 1994 Linus Torvalds
   5  */
   6 
   7 #ifndef __ASM_ALPHA_PROCESSOR_H
   8 #define __ASM_ALPHA_PROCESSOR_H
   9 
  10 /*
  11  * We have a 8GB user address space to start with: 33 bits of vm
  12  * can be handled with just 2 page table levels.
  13  *
  14  * Eventually, this should be bumped to 40 bits or so..
  15  */
  16 #define TASK_SIZE (0x200000000UL)
  17 
  18 /*
  19  * Bus types
  20  */
  21 #define EISA_bus 1
  22 #define MCA_bus 0
  23 
  24 /*
  25  * The alpha has no problems with write protection
  26  */
  27 #define wp_works_ok 1
  28 
  29 struct thread_struct {
  30         unsigned long ksp;
  31         unsigned long usp;
  32         unsigned long ptbr;
  33         unsigned int pcc;
  34         unsigned int asn;
  35         unsigned long unique;
  36         unsigned long flags;
  37         unsigned long res1, res2;
  38 };
  39 
  40 #define INIT_TSS  { \
  41         0, 0, 0, \
  42         0, 0, 0, \
  43         0, 0, 0, \
  44 }
  45 
  46 /*
  47  * These are the "cli()" and "sti()" for software interrupts
  48  * They work by increasing/decreasing the "intr_count" value, 
  49  * and as such can be nested arbitrarily.
  50  */
  51 extern inline void start_bh_atomic(void)
     /*  */
  52 {
  53         unsigned long dummy;
  54         __asm__ __volatile__(
  55                 "\n1:\t"
  56                 "ldq_l %0,%1\n\t"
  57                 "addq %0,1,%0\n\t"
  58                 "stq_c %0,%1\n\t"
  59                 "beq %0,1b\n"
  60                 : "=r" (dummy), "=m" (intr_count)
  61                 : "0" (0));
  62 }
  63 
  64 extern inline void end_bh_atomic(void)
     /*  */
  65 {
  66         unsigned long dummy;
  67         __asm__ __volatile__(
  68                 "\n1:\t"
  69                 "ldq_l %0,%1\n\t"
  70                 "subq %0,1,%0\n\t"
  71                 "stq_c %0,%1\n\t"
  72                 "beq %0,1b\n"
  73                 : "=r" (dummy), "=m" (intr_count)
  74                 : "0" (0));
  75 }
  76 
  77 #endif /* __ASM_ALPHA_PROCESSOR_H */

/* */