include/asm-sparc/processor.h

/* */
This source file includes following definitions.
start_bh_atomic
end_bh_atomic
   1 /* include/asm-sparc/processor.h
   2  *
   3  * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
   4  */
   5 
   6 #ifndef __ASM_SPARC_PROCESSOR_H
   7 #define __ASM_SPARC_PROCESSOR_H
   8 
   9 /*
  10  * Bus types
  11  */
  12 #define EISA_bus 1
  13 #define MCA_bus 0
  14 
  15 /*
  16  * Write Protection works right in supervisor mode on the Sparc
  17  */
  18 
  19 #define wp_works_ok 1
  20 
  21 /*
  22  * User space process size: 3GB. This is hardcoded into a few places,
  23  * so don't change it unless you know what you are doing.
  24  *
  25  * "this is gonna have to change to 1gig for the sparc" - David S. Miller
  26  */
  27 #define TASK_SIZE       (0xc0000000UL)
  28 
  29 /*
  30  * Size of io_bitmap in longwords: 32 is ports 0-0x3ff.
  31  */
  32 #define IO_BITMAP_SIZE  32
  33 
  34 /* The first five entries here MUST be the first four. This allows me to
  35  * do %lo(offset) loads and stores in entry.S. See TRAP_WIN_CLEAN to see
  36  * why.
  37  */
  38 
  39 struct thread_struct {
  40         unsigned long uwindows;       /* how many user windows are in the set */
  41         unsigned long wim;            /* user's window invalid mask */
  42         unsigned long w_saved;        /* how many windows saved in reg_window[] */
  43         unsigned long ksp;          /* kernel stack pointer */
  44         unsigned long usp;          /* user's sp, throw reg windows here */
  45         unsigned long psr;          /* save for condition codes */
  46         unsigned long reg_window[16*24];
  47         unsigned long cr3;          /* why changed from ptbr? */
  48         unsigned int pcc;
  49         unsigned int asn;
  50         unsigned long unique;
  51         unsigned long flags;
  52         unsigned long res1, res2;
  53         unsigned long pc;           /* program counter */
  54         unsigned long npc;          /* next program counter */
  55 
  56 /* 8 local registers + 8 in registers * 24 register windows.
  57  * Most sparcs I know of only have 8 windows implemented,
  58  * we determine how many at boot time and store that value
  59  * in nwindows.
  60  */
  61         unsigned long globl_regs[8];  /* global regs need to be saved too */
  62         unsigned long yreg;
  63         unsigned long float_regs[64]; /* V8 and below have 32, V9 has 64 */
  64 };
  65 
  66 #define INIT_TSS  { \
  67         0, 0, 0, 0, 0, 0, \
  68         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  69         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  70         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  71         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  72         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  73         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  74         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  75         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  76         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  77         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  78         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  79         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  80         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  81         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  82         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  83         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  84         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  85         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  86         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  87         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  88         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  89         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  90         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  91         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, \
  92         0, 0, 0, 0, 0, 0, 0, 0, 0, \
  93         { 0, 0, 0, 0, 0, 0, 0, 0, }, \
  94         0, \
  95         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  96         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  97         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  98         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, \
  99 }
 100 
 101 /* The thread_frame is what needs to be set up in certain circumstances
 102  * upon entry to a trap. It is also loaded sometimes during a window
 103  * spill if things don't go right (bad user stack pointer). In reality
 104  * it is not per-process per se, it just sits in the kernel stack while
 105  * the current process is in a handler then it is basically forgotten
 106  * about.
 107  */
 108 
 109 struct thread_frame {
 110   unsigned int thr_psr;
 111   unsigned int thr_pc;
 112   unsigned int thr_npc;
 113   unsigned int thr_y;
 114   unsigned int thr_globals[8];
 115   unsigned int thr_outs[8];
 116 };
 117 
 118 /*
 119  * These are the "cli()" and "sti()" for software interrupts
 120  * They work by increasing/decreasing the "intr_count" value, 
 121  * and as such can be nested arbitrarily.
 122  */
 123 extern inline void start_bh_atomic(void)
     /*  */
 124 {
 125         unsigned long dummy, psr;
 126         __asm__ __volatile__("rd %%psr, %2\n\t"
 127                              "wr %2, 0x20, %%psr\n\t"  /* disable traps */
 128                              "ld %1,%0\n\t"
 129                              "add %0,1,%0\n\t"
 130                              "st %0,%1\n\t"
 131                              "wr %2, 0x0, %%psr\n\t"   /* enable traps */
 132                              : "=r" (dummy), "=m" (intr_count)
 133                              : "0" (0), "r" (psr=0));
 134 }
 135 
 136 extern inline void end_bh_atomic(void)
     /*  */
 137 {
 138         unsigned long dummy, psr;
 139         __asm__ __volatile__("rd %%psr, %2\n\t"
 140                              "wr %2, 0x20, %%psr\n\t"
 141                              "ld %1,%0\n\t"
 142                              "sub %0,1,%0\n\t"
 143                              "st %0,%1\n\t"
 144                              "wr %2, 0x0, %%psr\n\t"
 145                              : "=r" (dummy), "=m" (intr_count)
 146                              : "0" (0), "r" (psr=0));
 147 }
 148 
 149 #endif /* __ASM_SPARC_PROCESSOR_H */
 150
/* */
root/include/asm-sparc/processor.h

INCLUDED FROM

DEFINITIONS
