root/include/asm-mips/page.h

/* */

INCLUDED FROM

   1 #ifndef __ASM_MIPS_PAGE_H
   2 #define __ASM_MIPS_PAGE_H
   3 
   4 #ifndef __ASSEMBLY__
   5 
   6 #include <linux/linkage.h>
   7 
   8 #define invalidate()    tlbflush();
   9 extern asmlinkage void tlbflush(void);
  10 #endif
  11 
  12                         /* PAGE_SHIFT determines the page size */
  13 #define PAGE_SHIFT                      12
  14 #define PGDIR_SHIFT                     22
  15 #define PAGE_SIZE                       (1UL << PAGE_SHIFT)
  16 #define PGDIR_SIZE                      (1UL << PGDIR_SHIFT)
  17 
  18 #define PAGE_OFFSET     0
  19 #define MAP_NR(addr) ((addr) >> PAGE_SHIFT)
  20 #define MAP_PAGE_RESERVED (1<<15)
  21 
  22 typedef unsigned short mem_map_t;
  23 
  24 /*
  25  * Note that we shift the lower 32bits of each EntryLo[01] entry
  26  * 6 bits to the left. That way we can convert the PFN into the
  27  * physical address by a single 'and' operation and gain 6 aditional
  28  * bits for storing information which isn't present in a normal
  29  * MIPS page table.
  30  * I've also changed the naming of some bits so that they conform
  31  * the i386 naming as much as possible.
  32  * PAGE_USER isn't implemented in software yet.
  33  */
  34 #define PAGE_PRESENT               (1<<0)   /* implemented in software */
  35 #define PAGE_COW                   (1<<1)   /* implemented in software */
  36 #define PAGE_DIRTY                 (1<<2)   /* implemented in software */
  37 #define PAGE_USER                  (1<<3)   /* implemented in software */
  38 #define PAGE_UNUSED1               (1<<4)   /* implemented in software */
  39 #define PAGE_UNUSED2               (1<<5)   /* implemented in software */
  40 #define PAGE_GLOBAL                (1<<6)
  41 #define PAGE_ACCESSED              (1<<7)   /* The MIPS valid bit      */
  42 #define PAGE_RW                    (1<<8)   /* The MIPS dirty bit      */
  43 #define CACHE_CACHABLE_NO_WA       (0<<9)
  44 #define CACHE_CACHABLE_WA          (1<<9)
  45 #define CACHE_UNCACHED             (2<<9)
  46 #define CACHE_CACHABLE_NONCOHERENT (3<<9)
  47 #define CACHE_CACHABLE_CE          (4<<9)
  48 #define CACHE_CACHABLE_COW         (5<<9)
  49 #define CACHE_CACHABLE_CUW         (6<<9)
  50 #define CACHE_MASK                 (7<<9)
  51 
  52 #define PAGE_PRIVATE    (PAGE_PRESENT | PAGE_ACCESSED | PAGE_DIRTY | PAGE_RW | \
  53                          PAGE_COW | CACHE_CACHABLE_NO_WA)
  54 #define PAGE_SHARED     (PAGE_PRESENT | PAGE_ACCESSED | PAGE_DIRTY | PAGE_RW | \
  55                          CACHE_CACHABLE_NO_WA)
  56 #define PAGE_COPY       (PAGE_PRESENT | PAGE_ACCESSED | PAGE_COW | \
  57                          CACHE_CACHABLE_NO_WA)
  58 #define PAGE_READONLY   (PAGE_PRESENT | PAGE_ACCESSED | CACHE_CACHABLE_NO_WA)
  59 #define PAGE_TABLE      (PAGE_PRESENT | PAGE_ACCESSED | PAGE_DIRTY | PAGE_RW | \
  60                          CACHE_CACHABLE_NO_WA)
  61 
  62 #define PAGE_CHG_MASK (PAGE_MASK | PAGE_ACCESSED | PAGE_DIRTY | CACHE_MASK)
  63 
  64 #ifdef __KERNEL__
  65 
  66 /* page table for 0-4MB for everybody */
  67 extern unsigned long pg0[1024];
  68 
  69 /*
  70  * BAD_PAGETABLE is used when we need a bogus page-table, while
  71  * BAD_PAGE is used for a bogus page.
  72  *
  73  * ZERO_PAGE is a global shared page that is always zero: used
  74  * for zero-mapped memory areas etc..
  75  */
  76 extern unsigned long __bad_page(void);
  77 extern unsigned long __bad_pagetable(void);
  78 extern unsigned long __zero_page(void);
  79 
  80 #define BAD_PAGETABLE __bad_pagetable()
  81 #define BAD_PAGE __bad_page()
  82 #define ZERO_PAGE __zero_page()
  83 
  84 /* number of bits that fit into a memory pointer */
  85 #define BITS_PER_PTR                    (8*sizeof(unsigned long))
  86 
  87 /* to mask away the intra-page address bits */
  88 #define PAGE_MASK                       (~(PAGE_SIZE-1))
  89 
  90 /* to mask away the intra-page address bits */
  91 #define PGDIR_MASK                      (~(PGDIR_SIZE-1))
  92 
  93 /* to align the pointer to the (next) page boundary */
  94 #define PAGE_ALIGN(addr)                (((addr)+PAGE_SIZE-1)&PAGE_MASK)
  95 
  96 /* to align the pointer to a pointer address */
  97 #define PTR_MASK                        (~(sizeof(void*)-1))
  98 
  99 /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
 100 /* 64-bit machines, beware!  SRB. */
 101 #define SIZEOF_PTR_LOG2                 2
 102 
 103 /* to find an entry in a page-table-directory */
 104 #define PAGE_DIR_OFFSET(tsk,address) \
 105 ((((unsigned long)(address)) >> 22) + (unsigned long *) (tsk)->tss.pg_dir)
 106 
 107 /* to find an entry in a page-table */
 108 #define PAGE_PTR(address)               \
 109 ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
 110 
 111 /* the no. of pointers that fit on a page */
 112 #define PTRS_PER_PAGE                   (PAGE_SIZE/sizeof(void*))
 113 
 114 /* to set the page-dir */
 115 #define SET_PAGE_DIR(tsk,pgdir) \
 116 do { \
 117         (tsk)->tss.pg_dir = (unsigned long) (pgdir); \
 118         if ((tsk) == current) \
 119                 invalidate(); \
 120 } while (0)
 121 
 122 #endif /* __KERNEL__ */
 123 
 124 #endif /* __ASM_MIPS_PAGE_H */

/* */