This source file includes following definitions.
- xchg_u32
- xchg_u64
- xchg_ptr
1 #ifndef __ALPHA_SYSTEM_H
2 #define __ALPHA_SYSTEM_H
3
4
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6
7
8
9
10
11
12
13
14
15
16 #define BOOT_PCB 0x20000000
17 #define BOOT_ADDR 0x20000000
18 #define BOOT_SIZE (16*1024)
19
20 #define KERNEL_START 0xfffffc0000300000
21 #define INIT_PCB 0xfffffc0000300000
22 #define INIT_STACK 0xfffffc0000302000
23 #define EMPTY_PGT 0xfffffc0000304000
24 #define EMPTY_PGE 0xfffffc0000308000
25 #define ZERO_PGE 0xfffffc000030A000
26 #define SWAPPER_PGD 0xfffffc000030C000
27
28 #define START_ADDR 0xfffffc0000310000
29 #define START_SIZE (1024*1024)
30
31
32
33
34 #define PAL_halt 0
35 #define PAL_cflush 1
36 #define PAL_draina 2
37 #define PAL_cobratt 9
38 #define PAL_bpt 128
39 #define PAL_bugchk 129
40 #define PAL_chmk 131
41 #define PAL_callsys 131
42 #define PAL_imb 134
43 #define PAL_rduniq 158
44 #define PAL_wruniq 159
45 #define PAL_gentrap 170
46 #define PAL_nphalt 190
47
48
49
50
51 #define PAL_swppal 10
52 #define PAL_mfpr_vptb 41
53
54
55
56
57 #define PAL_mtpr_mces 17
58 #define PAL_wrfen 43
59 #define PAL_wrvptptr 45
60 #define PAL_jtopal 46
61 #define PAL_swpctx 48
62 #define PAL_wrval 49
63 #define PAL_rdval 50
64 #define PAL_tbi 51
65 #define PAL_wrent 52
66 #define PAL_swpipl 53
67 #define PAL_rdps 54
68 #define PAL_wrkgp 55
69 #define PAL_wrusp 56
70 #define PAL_wrperfmon 57
71 #define PAL_rdusp 58
72 #define PAL_whami 60
73 #define PAL_rtsys 61
74 #define PAL_rti 63
75
76 #ifndef __ASSEMBLY__
77
78 extern void wrent(void *, unsigned long);
79 extern void wrkgp(unsigned long);
80 extern void wrusp(unsigned long);
81 extern unsigned long rdusp(void);
82
83 #define halt() __asm__ __volatile__(".long 0");
84 #define move_to_user_mode() halt()
85 #define switch_to(x) halt()
86
87 #ifndef mb
88 #define mb() __asm__ __volatile__("mb": : :"memory")
89 #endif
90
91 #define swpipl(__new_ipl) \
92 ({ unsigned long __old_ipl; \
93 __asm__ __volatile__( \
94 "bis %1,%1,$16\n\t" \
95 ".long 53\n\t" \
96 "bis $0,$0,%0" \
97 : "=r" (__old_ipl) \
98 : "r" (__new_ipl) \
99 : "$0", "$1", "$16", "$22", "$23", "$24", "$25"); \
100 __old_ipl; })
101
102 #define cli() swpipl(7)
103 #define sti() swpipl(0)
104 #define save_flags(flags) do { flags = swpipl(7); } while (0)
105 #define restore_flags(flags) swpipl(flags)
106
107 extern inline unsigned long xchg_u32(int * m, unsigned long val)
108 {
109 unsigned long dummy, dummy2;
110
111 __asm__ __volatile__(
112 "\n1:\t"
113 "ldl_l %0,%1\n\t"
114 "bis %2,%2,%3\n\t"
115 "stl_c %3,%1\n\t"
116 "beq %3,1b\n"
117 : "=r" (val), "=m" (*m), "=r" (dummy), "=r" (dummy2)
118 : "1" (*m), "2" (val));
119 return val;
120 }
121
122 extern inline unsigned long xchg_u64(long * m, unsigned long val)
123 {
124 unsigned long dummy, dummy2;
125
126 __asm__ __volatile__(
127 "\n1:\t"
128 "ldq_l %0,%1\n\t"
129 "bis %2,%2,%3\n\t"
130 "stq_c %3,%1\n\t"
131 "beq %3,1b\n"
132 : "=r" (val), "=m" (*m), "=r" (dummy), "=r" (dummy2)
133 : "1" (*m), "2" (val));
134 return val;
135 }
136
137 extern inline void * xchg_ptr(void *m, void *val)
138 {
139 return (void *) xchg_u64((long *) m, (unsigned long) val);
140 }
141
142 #endif
143
144 #endif