This source file includes following definitions.
- start_bh_atomic
- end_bh_atomic
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7 #ifndef __ASM_ALPHA_PROCESSOR_H
8 #define __ASM_ALPHA_PROCESSOR_H
9
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14
15
16 #define TASK_SIZE (0x200000000UL)
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18
19
20
21 #define EISA_bus 1
22 #define EISA_bus__is_a_macro
23 #define MCA_bus 0
24 #define MCA_bus__is_a_macro
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27
28
29 #define wp_works_ok 1
30 #define wp_works_ok__is_a_macro
31
32 struct thread_struct {
33 unsigned long ksp;
34 unsigned long usp;
35 unsigned long ptbr;
36 unsigned int pcc;
37 unsigned int asn;
38 unsigned long unique;
39 unsigned long flags;
40 unsigned long res1, res2;
41 };
42
43 #define INIT_TSS { \
44 0, 0, 0, \
45 0, 0, 0, \
46 0, 0, 0, \
47 }
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53
54 extern inline void start_bh_atomic(void)
55 {
56 unsigned long dummy;
57 __asm__ __volatile__(
58 "\n1:\t"
59 "ldq_l %0,%1\n\t"
60 "addq %0,1,%0\n\t"
61 "stq_c %0,%1\n\t"
62 "beq %0,1b\n"
63 : "=r" (dummy), "=m" (intr_count)
64 : "0" (0));
65 }
66
67 extern inline void end_bh_atomic(void)
68 {
69 unsigned long dummy;
70 __asm__ __volatile__(
71 "\n1:\t"
72 "ldq_l %0,%1\n\t"
73 "subq %0,1,%0\n\t"
74 "stq_c %0,%1\n\t"
75 "beq %0,1b\n"
76 : "=r" (dummy), "=m" (intr_count)
77 : "0" (0));
78 }
79
80 #endif