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1 /********************************************************
2 * Header file for eata_dma.c Linux EATA-DMA SCSI driver *
3 * (c) 1993,94,95 Michael Neuffer *
4 *********************************************************
5 * last change: 95/01/30 *
6 ********************************************************/
7
8
9 #ifndef _EATA_DMA_H
10 #define _EATA_DMA_H
11
12 #include "../block/blk.h"
13 #include "scsi.h"
14 #include "hosts.h"
15 #include <linux/scsicam.h>
16
17 #define VER_MAJOR 2
18 #define VER_MINOR 3
19 #define VER_SUB "0a"
20
21 /************************************************************************
22 * Here you can configure your drives that are using a non-standard *
23 * geometry. *
24 * To enable this set HARDCODED to 1 *
25 * If you have only one drive that need reconfiguration, set ID1 to -1 *
26 ************************************************************************/
27 #define HARDCODED 0 /* Here are drives running in emu. mode */
28
29 #define ID0 0 /* SCSI ID of "IDE" drive mapped to C:
30 * If you're not sure check your config
31 * utility that came with your controller
32 */
33 #define HEADS0 13 /* Number of emulated heads of this drive */
34 #define SECTORS0 38 /* Number of emulated sectors */
35 #define CYLINDER0 719 /* Number of emulated cylinders */
36
37 #define ID1 1 /* SCSI ID of "IDE" drive mapped to D: */
38 #define HEADS1 16 /* Number of emulated heads of this drive */
39 #define SECTORS1 62 /* Number of emulated sectors */
40 #define CYLINDER1 1024 /* Number of emulated cylinders */
41
42 /************************************************************************
43 * Here you can switch parts of the code on and of *
44 ************************************************************************/
45
46 #define CHECKPAL 0 /* EISA pal checking on/off */
47
48 /************************************************************************
49 * Debug options. *
50 * Enable DEBUG and whichever options you require. *
51 ************************************************************************/
52 #define DEBUG_EATA 1 /* Enable debug code. */
53 #define DPT_DEBUG 0 /* Bobs special */
54 #define DBG_DELAY 0 /* Build in delays so debug messages can be
55 * be read before they vanish of the top of
56 * the screen!
57 */
58 #define DBG_PROBE 0 /* Debug probe routines. */
59 #define DBG_PCI 0 /* Trace PCI routines */
60 #define DBG_EISA 0 /* Trace EISA routines */
61 #define DBG_ISA 0 /* Trace ISA routines */
62 #define DBG_BLINK 0 /* Trace Blink check */
63 #define DBG_PIO 0 /* Trace get_config_PIO */
64 #define DBG_COM 0 /* Trace command call */
65 #define DBG_QUEUE 0 /* Trace command queueing. */
66 #define DBG_INTR 0 /* Trace interrupt service routine. */
67 #define DBG_INTR2 0 /* Trace interrupt service routine. */
68 #define DBG_PROC 0 /* Debug proc-fs related statistics */
69 #define DBG_REGISTER 0 /* */
70 #define DBG_ABNORM 1 /* Debug abnormal actions (reset, abort)*/
71
72 #if DEBUG_EATA
73 #define DBG(x, y) if ((x)) {y;}
74 #else
75 #define DBG(x, y)
76 #endif
77
78
79 #define EATA_DMA { \
80 NULL, NULL, \
81 "EATA (Extended Attachment) driver", \
82 eata_detect, \
83 eata_release, \
84 eata_info, \
85 eata_command, \
86 eata_queue, \
87 eata_abort, \
88 eata_reset, \
89 NULL, /* Slave attach */ \
90 scsicam_bios_param, \
91 0, /* Canqueue */ \
92 0, /* this_id */ \
93 0, /* sg_tablesize */ \
94 0, /* cmd_per_lun */ \
95 0, /* present */ \
96 1, /* True if ISA */ \
97 ENABLE_CLUSTERING }
98
99 int eata_detect(Scsi_Host_Template *);
100 const char *eata_info(struct Scsi_Host *);
101 int eata_command(Scsi_Cmnd *);
102 int eata_queue(Scsi_Cmnd *, void *(done)(Scsi_Cmnd *));
103 int eata_abort(Scsi_Cmnd *);
104 int eata_reset(Scsi_Cmnd *);
105 int eata_release(struct Scsi_Host *);
106
107 /*********************************************
108 * Misc. definitions *
109 *********************************************/
110
111 #ifndef TRUE
112 # define TRUE 1
113 #endif
114 #ifndef FALSE
115 # define FALSE 0
116 #endif
117
118 #define R_LIMIT 0x20000
119
120 #define MAXISA 4
121 #define MAXEISA 16
122 #define MAXPCI 16
123 #define MAXIRQ 16
124 #define MAXTARGET 8
125
126 #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */
127 #define MAX_METHOD_2 16 /* Max Devices For Method 2 */
128 #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */
129
130 #define SG_SIZE 64
131
132 #define C_P_L_CURRENT_MAX 10 /* Until this limit in the mm is removed
133 * Kernels < 1.1.86 died horrible deaths
134 * if you used values >2. The memory management
135 * of pl.86 seems to cope with 10.
136 */
137 #define C_P_L_DIV 4 /* 1 <= C_P_L_DIV <= 8
138 * You can use this parameter to fine-tune
139 * the driver. Depending on the number of
140 * devices and their ability to queue commands
141 * you will get the best results with a value
142 * ~= numdevices-(devices_unable_to_queue_commands/2)
143 * The reason for this is that the disk driver tents
144 * to flood the queue, so that other drivers have
145 * problems to queue commands themselves. This can
146 * for example result in the effect that the tape
147 * stops during disk accesses.
148 */
149
150 #define FREE 0
151 #define USED 1
152 #define TIMEOUT 2
153 #define RESET 4
154 #define LOCKED 8
155
156 #define HD(cmd) ((hostdata *)&(cmd->host->hostdata))
157 #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble))
158 #define SD(host) ((hostdata *)&(host->hostdata))
159
160 #define DELAY(x) { int i; i = jiffies + x; while (jiffies < i); }
161 #define DEL2(x) { ulong i; for (i = 0; i < 0xffff*x; i++); }
162
163 /***********************************************
164 * EATA Command & Register definitions *
165 ***********************************************/
166 #define PCI_REG_DPTconfig 0x40
167 #define PCI_REG_PumpModeAddress 0x44
168 #define PCI_REG_PumpModeData 0x48
169 #define PCI_REG_ConfigParam1 0x50
170 #define PCI_REG_ConfigParam2 0x54
171
172
173 #define EATA_CMD_PIO_READ_CONFIG 0xf0
174 #define EATA_CMD_PIO_SET_CONFIG 0xf1
175 #define EATA_CMD_PIO_SEND_CP 0xf2
176 #define EATA_CMD_PIO_RECEIVE_SP 0xf3
177 #define EATA_CMD_PIO_TRUNC 0xf4
178
179 #define EATA_CMD_RESET 0xf9
180
181 #define EATA_CMD_DMA_READ_CONFIG 0xfd
182 #define EATA_CMD_DMA_SET_CONFIG 0xfe
183 #define EATA_CMD_DMA_SEND_CP 0xff
184
185 #define ECS_EMULATE_SENSE 0xd4
186
187 #define HA_WCOMMAND 0x07 /* command register offset */
188 #define HA_WDMAADDR 0x02 /* DMA address LSB offset */
189 #define HA_RAUXSTAT 0x08 /* aux status register offset*/
190 #define HA_RSTATUS 0x07 /* status register offset */
191 #define HA_RDATA 0x00 /* data register (16bit) */
192
193 #define HA_ABUSY 0x01 /* aux busy bit */
194 #define HA_AIRQ 0x02 /* aux IRQ pending bit */
195 #define HA_SERROR 0x01 /* pr. command ended in error*/
196 #define HA_SMORE 0x02 /* more data soon to come */
197 #define HA_SCORR 0x04 /* data corrected */
198 #define HA_SDRQ 0x08 /* data request active */
199 #define HA_SSC 0x10 /* seek complete */
200 #define HA_SFAULT 0x20 /* write fault */
201 #define HA_SREADY 0x40 /* drive ready */
202 #define HA_SBUSY 0x80 /* drive busy */
203 #define HA_SDRDY HA_SSC+HA_SREADY+HA_SDRQ
204
205 /**********************************************
206 * Message definitions *
207 **********************************************/
208
209 struct reg_bit { /* reading this one will clear the interrupt */
210 unchar error:1; /* previous command ended in an error */
211 unchar more:1; /* more DATA coming soon, poll BSY & DRQ (PIO) */
212 unchar corr:1; /* data read was successfully corrected with ECC*/
213 unchar drq:1; /* data request active */
214 unchar sc:1; /* seek complete */
215 unchar fault:1; /* write fault */
216 unchar ready:1; /* drive ready */
217 unchar busy:1; /* controller busy */
218 };
219
220 struct reg_abit { /* reading this won't clear the interrupt */
221 unchar abusy:1; /* auxiliary busy */
222 unchar irq:1; /* set when drive interrupt is asserted */
223 unchar dummy:6;
224 };
225
226 struct eata_register { /* EATA register set */
227 unchar data_reg[2]; /* R, couldn't figure this one out */
228 unchar cp_addr[4]; /* W, CP address register */
229 union {
230 unchar command; /* W, command code: [read|set] conf, send CP*/
231 struct reg_bit status; /* R, see register_bit1 */
232 unchar statusunchar;
233 } ovr;
234 struct reg_abit aux_stat; /* R, see register_bit2 */
235 };
236
237 /**********************************************
238 * Other definitions *
239 **********************************************/
240
241 struct eata_sg_list
242 {
243 ulong data;
244 ulong len;
245 };
246
247 struct get_conf { /* Read Configuration Array */
248 ulong len; /* Should return 0x22 */
249 unchar sig[4]; /* Signature MUST be "EATA" */
250 unchar version2:4,
251 version:4; /* EATA Version level */
252 unchar OCS_enabled:1, /* Overlap Command Support enabled */
253 TAR_support:1, /* SCSI Target Mode supported */
254 TRNXFR:1, /* Truncate Transfer Cmd not necessary */
255 /* Only used in PIO Mode */
256 MORE_support:1, /* MORE supported (only PIO Mode) */
257 DMA_support:1, /* DMA supported Driver uses only */
258 /* this mode */
259 DMA_valid:1, /* DRQ value in Byte 30 is valid */
260 ATA:1, /* ATA device connected (not supported) */
261 HAA_valid:1; /* Hostadapter Address is valid */
262
263 ushort cppadlen; /* Number of pad unchars send after CD data */
264 /* set to zero for DMA commands */
265 unchar scsi_id[4]; /* SCSI ID of controller 2-0 Byte 0 res. */
266 /* if not, zero is returned */
267 ulong cplen; /* CP length: number of valid cp unchars */
268 ulong splen; /* Number of unchars returned after */
269 /* Receive SP command */
270 ushort queuesiz; /* max number of queueable CPs */
271 ushort dummy;
272 ushort SGsiz; /* max number of SG table entries */
273 unchar IRQ:4, /* IRQ used this HA */
274 IRQ_TR:1, /* IRQ Trigger: 0=edge, 1=level */
275 SECOND:1, /* This is a secondary controller */
276 DMA_channel:2; /* DRQ index, DRQ is 2comp of DRQX */
277 unchar sync; /* device at ID 7 tru 0 is running in */
278 /* synchronous mode, this will disappear */
279 unchar DSBLE:1, /* ISA i/o addressing is disabled */
280 FORCADR:1, /* i/o address has been forced */
281 :6;
282 unchar MAX_ID:5, /* Max number of SCSI target IDs */
283 MAX_CHAN:3; /* Number of SCSI busses on HBA */
284 unchar MAX_LUN; /* Max number of LUNs */
285 unchar :5,
286 ID_qest:1, /* Raidnum ID is questionable */
287 is_PCI:1, /* HBA is PCI */
288 is_EISA:1; /* HBA is EISA */
289 unchar unused[478];
290 };
291
292 struct eata_ccb { /* Send Command Packet structure */
293
294 unchar SCSI_Reset:1, /* Cause a SCSI Bus reset on the cmd */
295 HBA_Init:1, /* Cause Controller to reinitialize */
296 Auto_Req_Sen:1, /* Do Auto Request Sense on errors */
297 scatter:1, /* Data Ptr points to a SG Packet */
298 Resrvd:1, /* RFU */
299 Interpret:1, /* Interpret the SCSI cdb of own use */
300 DataOut:1, /* Data Out phase with command */
301 DataIn:1; /* Data In phase with command */
302 unchar reqlen; /* Request Sense Length */
303 /* Valid if Auto_Req_Sen=1 */
304 unchar unused[3];
305 unchar FWNEST:1, /* send cmd to phys RAID component*/
306 unused2:7;
307 unchar Phsunit:1, /* physical unit on mirrored pair */
308 I_AT:1, /* inhibit address translation */
309 I_HBA_C:1, /* HBA Inhibit caching */
310 unused3:5;
311
312 unchar cp_id; /* SCSI Device ID of target */
313 unchar cp_lun:3,
314 :2,
315 cp_luntar:1, /* CP is for target ROUTINE */
316 cp_dispri:1, /* Grant disconnect privilege */
317 cp_identify:1; /* Always TRUE */
318 unchar cp_msg1; /* Message bytes 0-3 */
319 unchar cp_msg2;
320 unchar cp_msg3;
321 unchar cp_cdb[12]; /* Command Descriptor Block */
322 ulong cp_datalen; /* Data Transfer Length */
323 /* If scatter=1 len of sg package */
324 void *cp_viraddr; /* address of this ccb */
325 ulong cp_dataDMA; /* Data Address, if scatter=1 */
326 /* address of scatter packet */
327 ulong cp_statDMA; /* address for Status Packet */
328 ulong cp_reqDMA; /* Request Sense Address, used if */
329 /* CP command ends with error */
330
331 ulong timeout;
332 unchar retries;
333 unchar status; /* status of this queueslot */
334 struct eata_sg_list sg_list[SG_SIZE];
335 Scsi_Cmnd *cmd; /* address of cmd */
336 };
337
338
339 struct eata_sp {
340 unchar hba_stat:7, /* HBA status */
341 EOC:1; /* True if command finished */
342 unchar scsi_stat; /* Target SCSI status */
343 unchar reserved[2];
344 ulong residue_len; /* Number of unchars not transferred */
345 struct eata_ccb *ccb; /* Address set in COMMAND PACKET */
346 unchar msg[12];
347 };
348
349 typedef struct hstd {
350 char vendor[9];
351 char name[18];
352 char revision[6];
353 char EATA_revision;
354 unchar bustype; /* bustype of HBA */
355 unchar channel; /* no. of scsi channel */
356 unchar state; /* state of HBA */
357 unchar primary; /* true if primary */
358 ulong reads[13];
359 ulong writes[13];
360 unchar t_state[MAXTARGET]; /* state of Target (RESET,..) */
361 uint t_timeout[MAXTARGET]; /* timeouts on target */
362 uint last_ccb; /* Last used ccb */
363 struct Scsi_Host *next;
364 struct Scsi_Host *prev;
365 struct eata_sp sp; /* status packet */
366 struct eata_ccb ccb[0]; /* ccb array begins here */
367 }hostdata;
368
369
370
371 /* structure for max. 2 emulated drives */
372 struct drive_geom_emul {
373 unchar trans; /* translation flag 1=transl */
374 unchar channel; /* SCSI channel number */
375 unchar HBA; /* HBA number (prim/sec) */
376 unchar id; /* drive id */
377 unchar lun; /* drive lun */
378 uint heads; /* number of heads */
379 uint sectors; /* number of sectors */
380 uint cylinder; /* number of cylinders */
381 };
382
383 struct geom_emul {
384 int bios_drives; /* number of emulated drives */
385 struct drive_geom_emul drv[2]; /* drive structures */
386 };
387
388 #endif /* _EATA_H */
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*/