1 /* depca.c: A DIGITAL DEPCA & EtherWORKS ethernet driver for linux. 2
3 Written 1994 by David C. Davies. 4
5
6 Copyright 1994 David C. Davies 7 and 8 United States Government 9 (as represented by the Director, National Security Agency). 10
11
12 This software may be used and distributed according to the terms of 13 the GNU Public License, incorporated herein by reference. 14
15 This driver is written for the Digital Equipment Corporation series 16 of DEPCA and EtherWORKS ethernet cards: 17
18 DEPCA (the original) 19 DE100 20 DE101 21 DE200 Turbo 22 DE201 Turbo 23 DE202 Turbo (TP BNC) 24 DE210 25 DE422 (EISA) 26
27 The driver has been tested on DE100, DE200 and DE202 cards in a 28 relatively busy network. The DE422 has been tested a little. 29
30 This driver will NOT work for the DE203, DE204 and DE205 series of 31 cards, since they have a new custom ASIC in place of the AMD LANCE 32 chip. 33
34 The author may be reached as davies@wanton.lkg.dec.com or 35 Digital Equipment Corporation, 550 King Street, Littleton MA 01460. 36
37 ========================================================================= 38 The driver was based on the 'lance.c' driver from Donald Becker which is 39 included with the standard driver distribution for linux. Modifications 40 were made to most routines and the hardware recognition routines were 41 written from scratch. Primary references used were: 42
43 1) Lance.c code in /linux/drivers/net/ 44 2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook", 45 AMD, 1992 [(800) 222-9323]. 46 3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)", 47 AMD, Pub. #17881, May 1993. 48 4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA", 49 AMD, Pub. #16907, May 1992 50 5) "DEC EtherWORKS LC Ethernet Controller Owners Manual", 51 Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003 52 6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual", 53 Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003 54 7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR 55 Digital Equipment Corporation, 1989 56 8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual", 57 Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001 58 59 Peter Bauer's depca.c (V0.5) was referred to when debugging this driver. 60 The hash filter code was derived from Reference 3 and has been tested 61 only to the extent that the Table A-1, page A-7, was confirmed to fill 62 the filter bit positions correctly. Hash filtering is not yet 63 implemented in the current driver set. 64
65 The original DEPCA card requires that the ethernet ROM address counter 66 be enabled to count and has an 8 bit NICSR. The ROM counter enabling is 67 only done when a 0x08 is read as the first address octet (to minimise 68 the chances of writing over some other hardware's I/O register). The 69 NICSR accesses have been changed to byte accesses for all the cards 70 supported by this driver, since there is only one useful bit in the MSB 71 (remote boot timeout) and it is not used. Also, there is a maximum of 72 only 48kB network RAM for this card. My thanks to Torbjorn Lindh for 73 help debugging all this (and holding my feet to the fire until I got it 74 right). 75
76 The DE200 series boards have on-board 64kB RAM for use as a shared 77 memory network buffer. Only the DE100 cards make use of a 2kB buffer 78 mode which has not been implemented in this driver (only the 32kB and 79 64kB modes are supported [16kB/48kB for the original DEPCA]). 80
81 At the most only 2 DEPCA cards can be supported on the ISA bus because 82 there is only provision for two I/O base addresses on each card (0x300 83 and 0x200). The I/O address is detected by searching for a byte sequence 84 in the Ethernet station address PROM at the expected I/O address for the 85 Ethernet PROM. The shared memory base address is 'autoprobed' by 86 looking for the self test PROM and detecting the card name. When a 87 second DEPCA is detected, information is placed in the base_addr 88 variable of the next device structure (which is created if necessary), 89 thus enabling ethif_probe initialization for the device. More than 2 90 EISA cards can be supported, but care will be needed assigning the 91 shared memory to ensure that each slot has the correct IRQ, I/O address 92 and shared memory address assigned. 93
94 ************************************************************************ 95
96 NOTE: If you are using two ISA DEPCAs, it is important that you assign 97 the base memory addresses correctly. The driver autoprobes I/O 0x300 98 then 0x200. The base memory address for the first device must be less 99 than that of the second so that the auto probe will correctly assign the 100 I/O and memory addresses on the same card. I can't think of a way to do 101 this unambiguously at the moment, since there is nothing on the cards to 102 tie I/O and memory information together. 103
104 I am unable to test 2 cards together for now, so this code is 105 unchecked. All reports, good or bad, are welcome. 106
107 ************************************************************************ 108
109 The board IRQ setting must be at an unused IRQ which is auto-probed 110 using Donald Becker's autoprobe routines. DEPCA and DE100 board IRQs are 111 {2,3,4,5,7}, whereas the DE200 is at {5,9,10,11,15}. Note that IRQ2 is 112 really IRQ9 in machines with 16 IRQ lines. 113
114 No 16MB memory limitation should exist with this driver as DMA is not 115 used and the common memory area is in low memory on the network card (my 116 current system has 20MB and I've not had problems yet). 117
118 The ability to load this driver as a loadable module has been added. To 119 utilise this ability, you have to do <8 things: 120
121 1) copy depca.c from the /linux/drivers/net directory to your favourite 122 temporary directory. 123 2) edit the source code near line 1530 to reflect the I/O address and 124 IRQ you're using. 125 3) compile depca.c, but include -DMODULE in the command line to ensure 126 that the correct bits are compiled (see end of source code). 127 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a 128 kernel with the depca configuration turned off and reboot. 129 5) insmod depca.o 130 6) run the net startup bits for your eth?? interface manually 131 (usually /etc/rc.inet[12] at boot time). 132 7) enjoy! 133
134 Note that autoprobing is not allowed in loadable modules - the system is 135 already up and running and you're messing with interrupts. Also, there 136 is no way to check on the number of depcas installed at the moment. 137
138 To unload a module, turn off the associated interface 139 'ifconfig eth?? down' then 'rmmod depca'. 140
141 [Alan Cox: Changed to split off the module values as ints for insmod 142 143 you can now do insmod depca.c irq=7 io=0x200 ] 144 145
146 TO DO: 147 ------ 148
149 1. Implement the 2k buffer mode - does anyone need it?? 150
151 Revision History 152 ---------------- 153
154 Version Date Description 155 156 0.1 25-jan-94 Initial writing. 157 0.2 27-jan-94 Added LANCE TX hardware buffer chaining. 158 0.3 1-feb-94 Added multiple DEPCA support. 159 0.31 4-feb-94 Added DE202 recognition. 160 0.32 19-feb-94 Tidy up. Improve multi-DEPCA support. 161 0.33 25-feb-94 Fix DEPCA ethernet ROM counter enable. 162 Add jabber packet fix from murf@perftech.com 163 and becker@super.org 164 0.34 7-mar-94 Fix DEPCA max network memory RAM & NICSR access. 165 0.35 8-mar-94 Added DE201 recognition. Tidied up. 166 0.351 30-apr-94 Added EISA support. Added DE422 recognition. 167 0.36 16-may-94 DE422 fix released. 168 0.37 22-jul-94 Added MODULE support 169 0.38 15-aug-94 Added DBR ROM switch in depca_close(). 170 Multi DEPCA bug fix. 171 0.38axp 15-sep-94 Special version for Alpha AXP Linux V1.0. 172 0.381 12-dec-94 Added DE101 recognition, fix multicast bug. 173 0.382 9-feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>. 174
175 ========================================================================= 176 */ 177
178 staticchar *version = "depca.c:v0.382 2/9/94 davies@wanton.lkg.dec.com\n";
179
180 #include <linux/config.h>
181 #ifdefMODULE 182 #include <linux/module.h>
183 #include <linux/version.h>
184 #else 185 #defineMOD_INC_USE_COUNT 186 #defineMOD_DEC_USE_COUNT 187 #endif/* MODULE */ 188
189 #include <linux/kernel.h>
190 #include <linux/sched.h>
191 #include <linux/string.h>
192 #include <linux/ptrace.h>
193 #include <linux/errno.h>
194 #include <linux/ioport.h>
195 #include <linux/malloc.h>
196 #include <linux/interrupt.h>
197 #include <asm/bitops.h>
198 #include <asm/io.h>
199 #include <asm/dma.h>
200
201 #include <linux/netdevice.h>
202 #include <linux/etherdevice.h>
203 #include <linux/skbuff.h>
204
205 #include "depca.h"
206
207 #ifdefDEPCA_DEBUG 208 staticintdepca_debug = DEPCA_DEBUG;
209 #else 210 staticintdepca_debug = 1;
211 #endif 212
213 #ifndefPROBE_LENGTH 214 #definePROBE_LENGTH 32
215 #endif 216
217 #defineETH_PROM_SIG 0xAA5500FFUL
218
219 #ifndefDEPCA_SIGNATURE 220 #defineDEPCA_SIGNATURE{"DEPCA",\
221 "DE100","DE101",\
222 "DE200","DE201","DE202",\
223 "DE210",\
224 "DE422",\
225 ""} 226 #defineDEPCA_NAME_LENGTH 8
227 #endif 228
229 #ifndefDEPCA_RAM_BASE_ADDRESSES 230 #defineDEPCA_RAM_BASE_ADDRESSES{0xc0000,0xd0000,0xe0000,0x00000} 231 #endif 232 staticshortmem_chkd = 0; /* holds which base addrs have been */ 233 /* checked, for multi-DEPCA case */ 234
235 #ifndefDEPCA_IO_PORTS 236 #defineDEPCA_IO_PORTS{0x300, 0x200, 0} 237 #endif 238
239 #ifndefDEPCA_TOTAL_SIZE 240 #defineDEPCA_TOTAL_SIZE 0x10
241 #endif 242
243 #ifndefMAX_NUM_DEPCAS 244 #defineMAX_NUM_DEPCAS 2
245 #endif 246
247 #ifndefDEPCA_EISA_IO_PORTS 248 #defineDEPCA_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */ 249 #endif 250
251 #ifndefMAX_EISA_SLOTS 252 #defineMAX_EISA_SLOTS 8
253 #endif 254
255 /* 256 ** Set the number of Tx and Rx buffers. 257 */ 258 #ifndef DEPCA_BUFFER_LOG_SZ
259 #defineRING_SIZE 16 /* 16 buffers */ 260 #else 261 #defineRING_SIZE (1 << (DEPCA_BUFFERS_LOG_SZ))
262 #endif/* DEPCA_BUFFER_LOG_SZ */ 263
264 #definePKT_BUF_SZ 1544 /* Buffer size for each Tx/Rx buffer */ 265 #definePKT_SZ 1514 /* Maximum ethernet packet length */ 266 #defineDAT_SZ 1500 /* Maximum ethernet data length */ 267 #definePKT_HDR_LEN 14 /* Addresses and data length info */ 268
269 #ifdefHAVE_MULTICAST 270 #ifndefCRC_POLYNOMIAL 271 #defineCRC_POLYNOMIAL 0x04c11db7 /* Ethernet CRC polynomial */ 272 #endif/* CRC_POLYNOMIAL */ 273 #endif/* HAVE_MULTICAST */ 274
275 /* 276 ** The DEPCA Rx and Tx ring descriptors. 277 */ 278 structdepca_rx_head{ 279 volatilelongbase;
280 shortbuf_length; /* This length is negative 2's complement! */ 281 shortmsg_length; /* This length is "normal". */ 282 };
283
284 structdepca_tx_head{ 285 volatilelongbase;
286 shortlength; /* This length is negative 2's complement! */ 287 shortmisc; /* Errors and TDR info */ 288 };
289
290 #defineLA_MASK 0x0000ffff /* LANCE address mask for mapping network RAM 291 to LANCE memory address space */ 292
293 /* 294 ** The Lance initialization block, described in databook, in common memory. 295 */ 296 structdepca_init{ 297 unsignedshortmode; /* Mode register */ 298 unsignedcharphys_addr[ETH_ALEN]; /* Physical ethernet address */ 299 unsignedshortfilter[4]; /* Multicast filter. */ 300 unsignedlongrx_ring; /* Rx ring base pointer & ring length */ 301 unsignedlongtx_ring; /* Tx ring base pointer & ring length */ 302 };
303
304 structdepca_private{ 305 chardevname[8]; /* Device Product String */ 306 structdepca_rx_head *rx_ring; /* Pointer to start of RX descriptor ring */ 307 structdepca_tx_head *tx_ring; /* Pointer to start of TX descriptor ring */ 308 structdepca_initinit_block;/* Initialization block */ 309 longbus_offset; /* (E)ISA bus address offset vs LANCE */ 310 longdma_buffs; /* Start address of Rx and Tx buffers. */ 311 intcur_rx, cur_tx; /* The next free ring entry */ 312 intdirty_rx, dirty_tx; /* The ring entries to be free()ed. */ 313 intdma;
314 structenet_statisticsstats;
315 char depca_na; /* NICSR access width: 0=>byte, 1=>word */ 316 shortringSize; /* ring size based on available memory */ 317 shortrmask; /* modulus mask based on ring size */ 318 longrlen; /* log2(ringSize) for the descriptors */ 319 };
320
321 /* 322 ** Public Functions 323 */ 324 staticintdepca_open(structdevice *dev);
325 staticintdepca_start_xmit(structsk_buff *skb, structdevice *dev);
326 staticvoiddepca_interrupt(intirq, structpt_regs * regs);
327 staticintdepca_close(structdevice *dev);
328 staticstructenet_statistics *depca_get_stats(structdevice *dev);
329 #ifdefHAVE_MULTICAST 330 staticvoidset_multicast_list(structdevice *dev, intnum_addrs, void *addrs);
331 #endif 332
333 /* 334 ** Private functions 335 */ 336 staticintdepca_probe1(structdevice *dev, shortioaddr);
337 staticvoiddepca_init_ring(structdevice *dev);
338 staticintdepca_rx(structdevice *dev);
339 staticintdepca_tx(structdevice *dev);
340
341 staticvoidLoadCSRs(structdevice *dev);
342 staticintInitRestartDepca(structdevice *dev);
343 staticchar *DepcaSignature(unsignedlongmem_addr);
344 staticintDevicePresent(shortioaddr);
345 #ifdefHAVE_MULTICAST 346 staticvoidSetMulticastFilter(intnum_addrs, char *addrs, char *multicast_table);
347 #endif 348
349 #ifndefMODULE 350 staticstructdevice *isa_probe(structdevice *dev);
351 staticstructdevice *eisa_probe(structdevice *dev);
352 staticstructdevice *alloc_device(structdevice *dev, intioaddr);
353
354 staticintnum_depcas = 0, num_eth = 0, autoprobed = 0;
355
356 #else 357 intinit_module(void);
358 voidcleanup_module(void);
359
360 #endif/* MODULE */ 361
362 /* 363 ** Miscellaneous defines... 364 */ 365 #defineSTOP_DEPCA \
366 outw(CSR0, DEPCA_ADDR);\
367 outw(STOP, DEPCA_DATA)
368
369
370
371
372 intdepca_probe(structdevice *dev)
/* */ 373 { 374 shortbase_addr = dev->base_addr;
375 intstatus = -ENODEV;
376 #ifndefMODULE 377 structdevice *eth0;
378 #endif 379
380 if (base_addr > 0x1ff) {/* Check a single specified location. */ 381 if (DevicePresent(base_addr) == 0) {/* Is DEPCA really here? */ 382 status = depca_probe1(dev, base_addr);
383 } 384 }elseif (base_addr > 0) {/* Don't probe at all. */ 385 status = -ENXIO;
386
387 #ifdefMODULE 388 }else{ 389 printk("Autoprobing is not supported when loading a module based driver.\n");
390 status = -EIO;
391 #else 392 }elseif (!autoprobed) {/* First probe for the DEPCA test */ 393 /* pattern in ROM */ 394 eth0=isa_probe(dev);
395 eth0=eisa_probe(eth0);
396 if (dev->priv) status=0;
397 autoprobed = 1;
398 }else{ 399 status = -ENXIO;
400 #endif/* MODULE */ 401
402 } 403
404 if (status) dev->base_addr = base_addr;
405
406 returnstatus; /* ENODEV would be more accurate. */ 407 } 408
409 staticint 410 depca_probe1(structdevice *dev, shortioaddr)
/* */ 411 { 412 structdepca_private *lp;
413 inti,j, status=0;
414 unsignedlongmem_start, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
415 char *name = NULL;
416 unsignedintnicsr, offset, netRAM;
417
418
419 /* 420 ** Stop the DEPCA. Enable the DBR ROM. Disable interrupts and remote boot. 421 */ 422 STOP_DEPCA;
423
424 nicsr = inb(DEPCA_NICSR);
425 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
426 outb(nicsr, DEPCA_NICSR);
427
428 if (inw(DEPCA_DATA) == STOP) { 429
430 /* Now find out what kind of DEPCA we have. The DE100 uses a different 431 ** addressing scheme for some registers compared to the DE2xx series. 432 ** Note that a base address location is marked as checked if no DEPCA is 433 ** there or one is found (when the search is immediately terminated). This 434 ** shortens the search time a little for multiple DEPCAs. 435 */ 436
437 for (j = 0, i = 0; mem_base[i] && (j == 0);i++) { 438 if (((mem_chkd >> i) & 0x01) == 0) {/* has the memory been checked? */ 439 name = DepcaSignature(mem_base[i]);/* check for a DEPCA here */ 440 mem_chkd |= (0x01 << i); /* mark location checked */ 441 if (*name != '\0') {/* one found? */ 442 j = 1; /* set exit flag */ 443 --i;
444 } 445 } 446 } 447
448 if (*name != '\0') {/* found a DEPCA device */ 449 mem_start = mem_base[i];
450 dev->base_addr = ioaddr;
451
452 if ((ioaddr&0x0fff)==DEPCA_EISA_IO_PORTS) {/* EISA slot address */ 453 printk("%s: %s at %#3x (EISA slot %d)",
454 dev->name, name, ioaddr, ((ioaddr>>12)&0x0f));
455 }else{/* ISA port address */ 456 printk("%s: %s at %#3x", dev->name, name, ioaddr);
457 } 458
459 /* There is a 32 byte station address PROM at DEPCA_PROM address. 460 The first six bytes are the station address. They can be read 461 directly since the signature search set up the ROM address 462 counter correctly just before this function. 463
464 For the DE100 we have to be careful about which port is used to 465 read the ROM info. 466 */ 467
468 if (strstr(name,"DE100")!= NULL) { 469 j = 1;
470 }else{ 471 j = 0;
472 } 473
474 printk(", h/w address ");
475 for (i = 0; i < ETH_ALEN - 1; i++) {/* get the ethernet address */ 476 printk("%2.2x:", dev->dev_addr[i] = inb(DEPCA_PROM + j));
477 } 478 printk("%2.2x", dev->dev_addr[i] = inb(DEPCA_PROM + j));
479
480 for (;i<32;i++) {/* leave ROM counter in known state */ 481 j=inb(DEPCA_PROM);
482 } 483
484 request_region(ioaddr, DEPCA_TOTAL_SIZE, dev->name);
485
486 /* 487 ** Set up the maximum amount of network RAM(kB) 488 */ 489 if (strstr(name,"DEPCA")== NULL) { 490 netRAM=64;
491 }else{ 492 netRAM=48;
493 } 494
495 /* 496 ** Determine the base address for the DEPCA RAM from the NI-CSR 497 ** and make up a DEPCA-specific-data structure. 498 */ 499
500 if (nicsr & BUF) { 501 offset = 0x8000; /* 32kbyte RAM offset*/ 502 nicsr &= ~BS; /* DEPCA RAM in top 32k */ 503 printk(",\n has %dkB RAM", netRAM - 32);
504 }elseif ((nicsr & _128KB) && (netRAM!=48)) { 505 offset = 0x0000;
506 printk(",\n has 128kB RAM");
507 }else{ 508 offset = 0x0000; /* 64k/48k bytes RAM */ 509 printk(",\n has %dkB RAM", netRAM);
510 } 511
512 mem_start += offset; /* (E)ISA start address */ 513 printk(" at 0x%.5lx", mem_start);
514
515 /* 516 ** Enable the shadow RAM. 517 */ 518 if (strstr(name,"DEPCA") == NULL) { 519 nicsr |= SHE;
520 outb(nicsr, DEPCA_NICSR);
521 } 522
523 /* 524 ** Calculate the ring size based on the available RAM 525 ** found above. Allocate an equal number of buffers, each 526 ** of size PKT_BUF_SZ (1544 bytes) to the Tx and Rx, allowing one 527 ** descriptor entry (8 bytes) for each buffer. Make sure 528 ** that this ring size is <= RING_SIZE. The ring size must be 529 ** a power of 2. 530 */ 531
532 j = (((netRAM << 10) - offset - sizeof(structdepca_private)) /
533 (PKT_BUF_SZ + 8)) >> 1;
534 for (i=0;j>1;i++) { 535 j >>= 1;
536 } 537
538 /* Hold the ring size information here before the depca 539 ** private structure is allocated. Need this for the memory 540 ** space calculations. 541 */ 542 j = 1 << i;
543
544 /* 545 ** Set up memory information in the device structure. 546 ** Align the descriptor rings on an 8 byte (quadword) boundary. 547 ** 548 ** depca_private area 549 ** rx ring descriptors 550 ** tx ring descriptors 551 ** rx buffers 552 ** tx buffers 553 ** 554 */ 555
556 /* private area & initialise */ 557 dev->priv = (void *)((mem_start + 0x07) & ~0x07);
558 lp = (structdepca_private *)dev->priv;
559 memset(dev->priv, 0, sizeof(structdepca_private));
560 strcpy(lp->devname,name);
561
562 /* Tx & Rx descriptors (aligned to a quadword boundary) */ 563 mem_start = ((((unsignedlong)dev->priv +
564 sizeof(structdepca_private)) +
565 (unsignedlong)0x07) & (unsignedlong)~0x07);
566 lp->rx_ring = (structdepca_rx_head *)mem_start;
567
568 mem_start += (sizeof(structdepca_rx_head) * j);
569 lp->tx_ring = (structdepca_tx_head *)mem_start;
570
571 mem_start += (sizeof(structdepca_tx_head) * j);
572 lp->bus_offset = mem_start & 0x00ff0000;
573 mem_start &= LA_MASK; /* LANCE re-mapped start address */ 574
575 lp->dma_buffs = mem_start;
576
577 mem_start += (PKT_BUF_SZ * j);
578 /* (mem_start now points to the start of the Tx buffers) */ 579
580 /* Initialise the data structures wrt CPU */ 581 memset(lp->rx_ring, 0, sizeof(structdepca_rx_head)*j);
582 memset(lp->tx_ring, 0, sizeof(structdepca_tx_head)*j);
583
584 /* This should never happen. */ 585 if ((long)(lp->rx_ring) & 0x07) { 586 printk("\n **ERROR** DEPCA Rx and Tx descriptor rings not on a quadword boundary.\n");
587 return -ENXIO;
588 } 589
590 /* 591 ** Finish initialising the ring information. 592 */ 593 lp->ringSize = j;
594 if (lp->ringSize > RING_SIZE) lp->ringSize = RING_SIZE;
595 lp->rmask = lp->ringSize - 1;
596
597 /* 598 ** calculate the real RLEN size for the descriptors. It is 599 ** log2(ringSize). 600 */ 601 for (i=0, j = lp->ringSize; j>1; i++) { 602 j >>= 1;
603 } 604 lp->rlen = (unsignedlong)(i << 29);
605
606 /* 607 ** load the initialisation block 608 */ 609 depca_init_ring(dev);
610
611 /* 612 ** Initialise the control and status registers 613 */ 614 LoadCSRs(dev);
615
616 /* 617 ** Enable DEPCA board interrupts for autoprobing 618 */ 619 nicsr = ((nicsr & ~IM)|IEN);
620 outb(nicsr, DEPCA_NICSR);
621
622 /* The DMA channel may be passed in on this parameter. */ 623 dev->dma = 0;
624
625 /* To auto-IRQ we enable the initialization-done and DMA err, 626 interrupts. For now we will always get a DMA error. */ 627 if (dev->irq < 2) { 628 #ifndefMODULE 629 autoirq_setup(0);
630
631 /* Trigger an initialization just for the interrupt. */ 632 outw(INEA | INIT, DEPCA_DATA);
633
634 dev->irq = autoirq_report(1);
635 if (dev->irq) { 636 printk(" and uses IRQ%d.\n", dev->irq);
637 }else{ 638 printk(" and failed to detect IRQ line.\n");
639 status = -EAGAIN;
640 } 641 #endif/* MODULE */ 642 }else{ 643 printk(" and assigned IRQ%d.\n", dev->irq);
644 } 645 }else{ 646 status = -ENXIO;
647 } 648 if (!status) { 649 if (depca_debug > 0) { 650 printk(version);
651 } 652
653 /* The DEPCA-specific entries in the device structure. */ 654 dev->open = &depca_open;
655 dev->hard_start_xmit = &depca_start_xmit;
656 dev->stop = &depca_close;
657 dev->get_stats = &depca_get_stats;
658 #ifdefHAVE_MULTICAST 659 dev->set_multicast_list = &set_multicast_list;
660 #endif 661
662 dev->mem_start = 0;
663
664 /* Fill in the generic field of the device structure. */ 665 ether_setup(dev);
666 } 667 }else{ 668 status = -ENXIO;
669 } 670
671 returnstatus;
672 } 673
674
675 staticint 676 depca_open(structdevice *dev)
/* */ 677 { 678 structdepca_private *lp = (structdepca_private *)dev->priv;
679 inti,nicsr,ioaddr = dev->base_addr;
680
681 if (request_irq(dev->irq, &depca_interrupt, 0, "depca")) { 682 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
683 return -EAGAIN;
684 } 685
686 irq2dev_map[dev->irq] = dev;
687
688 /* 689 ** Stop the DEPCA & get the board status information. 690 */ 691 STOP_DEPCA;
692 nicsr = inb(DEPCA_NICSR);
693
694 /* 695 ** Make sure the shadow RAM is enabled 696 */ 697 if (strstr(lp->devname,"DEPCA") == NULL) { 698 nicsr |= SHE;
699 outb(nicsr, DEPCA_NICSR);
700 } 701
702 /* 703 ** Re-initialize the DEPCA... 704 */ 705 depca_init_ring(dev); /* initialize the descriptor rings */ 706 LoadCSRs(dev);
707
708 if (depca_debug > 1){ 709 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
710 printk("Descriptor head addresses:\n");
711 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring,(long)lp->tx_ring);
712 printk("Descriptor addresses:\n");
713 for (i=0;i<lp->ringSize;i++){ 714 printk("\t0x%8.8lx 0x%8.8lx\n",(long)&lp->rx_ring[i].base,
715 (long)&lp->tx_ring[i].base);
716 } 717 printk("Buffer addresses:\n");
718 for (i=0;i<lp->ringSize;i++){ 719 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring[i].base,
720 (long)lp->tx_ring[i].base);
721 } 722 printk("Initialisation block at 0x%8.8lx\n",(long)&lp->init_block);
723 printk("\tmode: 0x%4.4x\n",lp->init_block.mode);
724 printk("\tphysical address: ");
725 for (i=0;i<6;i++){ 726 printk("%2.2x:",(short)lp->init_block.phys_addr[i]);
727 } 728 printk("\n\tlogical address filter: 0x");
729 for (i=0;i<4;i++){ 730 printk("%2.2x",(short)lp->init_block.filter[i]);
731 } 732 printk("\n\trx_ring at: 0x%8.8lx\n",(long)lp->init_block.rx_ring);
733 printk("\ttx_ring at: 0x%8.8lx\n",(long)lp->init_block.tx_ring);
734 printk("dma_buffs: 0x%8.8lx\n",(long)lp->dma_buffs);
735 printk("Ring size: %d\nMask: 0x%2.2x\nLog2(ringSize): 0x%8.8lx\n",
736 (short)lp->ringSize,
737 (char)lp->rmask,
738 (long)lp->rlen);
739 outw(CSR2,DEPCA_ADDR);
740 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
741 outw(CSR1,DEPCA_ADDR);
742 printk("%4.4x\n",inw(DEPCA_DATA));
743 outw(CSR3,DEPCA_ADDR);
744 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
745 } 746
747 /* 748 ** Enable DEPCA board interrupts and turn off LED 749 */ 750 nicsr = ((nicsr & ~IM & ~LED)|IEN);
751 outb(nicsr, DEPCA_NICSR);
752 outw(CSR0,DEPCA_ADDR);
753
754 dev->tbusy = 0;
755 dev->interrupt = 0;
756 dev->start = 1;
757
758 InitRestartDepca(dev); /* ignore the return status */ 759
760 if (depca_debug > 1){ 761 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
762 printk("nicsr: 0x%02x\n",inb(DEPCA_NICSR));
763 } 764
765 MOD_INC_USE_COUNT;
766
767 return 0; /* Always succeed */ 768 } 769
770 /* Initialize the lance Rx and Tx descriptor rings. */ 771 staticvoid 772 depca_init_ring(structdevice *dev)
/* */ 773 { 774 structdepca_private *lp = (structdepca_private *)dev->priv;
775 unsignedlongi;
776
777 lp->init_block.mode = DTX | DRX; /* Disable Rx and Tx. */ 778 lp->cur_rx = lp->cur_tx = 0;
779 lp->dirty_rx = lp->dirty_tx = 0;
780
781 /* Initialize the base addresses and length of each buffer in the ring */ 782 for (i = 0; i < lp->ringSize; i++) { 783 lp->rx_ring[i].base = (lp->dma_buffs + i*PKT_BUF_SZ) | R_OWN;
784 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
785 lp->tx_ring[i].base = (lp->dma_buffs + (i+lp->ringSize) * PKT_BUF_SZ) &
786 (unsignedlong)(0x00ffffff);
787 } 788
789 /* Set up the initialization block */ 790 for (i = 0; i < ETH_ALEN; i++) { 791 lp->init_block.phys_addr[i] = dev->dev_addr[i];
792 } 793 for (i = 0; i < 4; i++) { 794 lp->init_block.filter[i] = 0x0000;
795 } 796 lp->init_block.rx_ring = ((unsignedlong)lp->rx_ring & LA_MASK) | lp->rlen;
797 lp->init_block.tx_ring = ((unsignedlong)lp->tx_ring & LA_MASK) | lp->rlen;
798
799 lp->init_block.mode = 0x0000; /* Enable the Tx and Rx */ 800 } 801
802 /* 803 ** Writes a socket buffer to TX descriptor ring and starts transmission 804 */ 805 staticint 806 depca_start_xmit(structsk_buff *skb, structdevice *dev)
/* */ 807 { 808 structdepca_private *lp = (structdepca_private *)dev->priv;
809 intioaddr = dev->base_addr;
810 intstatus = 0;
811
812 /* Transmitter timeout, serious problems. */ 813 if (dev->tbusy) { 814 inttickssofar = jiffies - dev->trans_start;
815 if (tickssofar < 10) { 816 status = -1;
817 }else{ 818 printk("%s: transmit timed out, status %04x, resetting.\n",
819 dev->name, inw(DEPCA_DATA));
820
821 STOP_DEPCA;
822 depca_init_ring(dev);
823 LoadCSRs(dev);
824 InitRestartDepca(dev);
825 dev->tbusy=0;
826 dev->trans_start = jiffies;
827 } 828 returnstatus;
829 } 830
831 if (skb == NULL) { 832 dev_tint(dev);
833 return 0;
834 } 835
836 if (skb->len <= 0) { 837 return 0;
838 } 839
840 if (depca_debug > 3) { 841 outw(CSR0, DEPCA_ADDR);
842 printk("%s: depca_start_xmit() called, csr0 %4.4x.\n", dev->name,
843 inw(DEPCA_DATA));
844 } 845
846 /* Block a timer-based transmit from overlapping. This could better be 847 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */ 848 if (set_bit(0, (void*)&dev->tbusy) != 0)
849 printk("%s: Transmitter access conflict.\n", dev->name);
850
851 /* 852 ** The TX buffer, skb, has to be copied into the local network RAM 853 ** for the LANCE to access it. The skb may be at > 16MB for large 854 ** (memory) systems. 855 */ 856 {/* Fill in a Tx ring entry */ 857 unsignedchar *buf;
858 intentry = lp->cur_tx++;
859 intlen;
860 longskbL = skb->len;
861 char *p = (char *) skb->data;
862
863 entry &= lp->rmask; /* Ring around buffer number. */ 864 buf = (unsignedchar *)((lp->tx_ring[entry].base+lp->bus_offset) &
865 0x00ffffff);
866
867 /* Wait for a full ring to free up */ 868 while (lp->tx_ring[entry].base < 0);
869
870 /* 871 ** Caution: the write order is important here... don't set up the 872 ** ownership rights until all the other information is in place. 873 */ 874 len = ((skbL > PKT_SZ) ? PKT_SZ : skbL); /* skb too long */ 875 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */ 876 skbL -= len;
877 lp->tx_ring[entry].length = -len;
878
879 /* Clears various error flags */ 880 lp->tx_ring[entry].misc = 0x0000;
881
882 /* copy the data from the socket buffer to the net memory */ 883 memcpy((unsignedchar *)(buf), skb->data, len);
884
885 /* Hand over buffer ownership to the LANCE */ 886 if (skbL <= 0) lp->tx_ring[entry].base |= (T_ENP);
887 lp->tx_ring[entry].base |= (T_OWN|T_STP);
888
889 /* Trigger an immediate send demand. */ 890 outw(CSR0, DEPCA_ADDR);
891 outw(INEA | TDMD, DEPCA_DATA);
892
893 dev->trans_start = jiffies;
894
895 for (p += len; skbL > 0; p += len) { 896
897 /* Get new buffer pointer */ 898 entry = lp->cur_tx++;
899 entry &= lp->rmask; /* Ring around buffer number. */ 900 buf = (unsignedchar *)((lp->tx_ring[entry].base+lp->bus_offset) &
901 0x00ffffff);
902
903 /* Wait for a full ring to free up */ 904 while (lp->tx_ring[entry].base < 0);
905 dev->tbusy=0;
906
907 /* Copy ethernet header to the new buffer */ 908 memcpy((unsignedchar *)buf, skb->data, PKT_HDR_LEN);
909
910 /* Determine length of data buffer */ 911 len = ((skbL > DAT_SZ) ? DAT_SZ : skbL); /* skbL too long */ 912 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */ 913 skbL -= len;
914 lp->tx_ring[entry].length = -len;
915
916 /* Clears various error flags */ 917 lp->tx_ring[entry].misc = 0x0000;
918
919 /* copy the data from the socket buffer to the net memory */ 920 memcpy((unsignedchar *)(buf + PKT_HDR_LEN), (unsignedchar *)p, len);
921
922 /* Hand over buffer ownership to the LANCE */ 923 if (skbL <= 0) lp->tx_ring[entry].base |= T_ENP;
924 lp->tx_ring[entry].base |= T_OWN;
925 } 926
927 if (depca_debug > 4) { 928 unsignedchar *pkt =
929 (unsignedchar *)((lp->tx_ring[entry].base+lp->bus_offset) &
930 0x00ffffff);
931
932 printk("%s: tx ring[%d], %#lx, sk_buf %#lx len %d.\n",
933 dev->name, entry, (unsignedlong) &lp->tx_ring[entry],
934 lp->tx_ring[entry].base, -lp->tx_ring[entry].length);
935 printk("%s: Tx %2.2x %2.2x %2.2x ... %2.2x %2.2x %2.2x %2.2x...%2.2x len %2.2x %2.2x %2.2x %2.2x.\n",
936 dev->name, pkt[0], pkt[1], pkt[2], pkt[5], pkt[6],
937 pkt[7], pkt[8], pkt[11], pkt[12], pkt[13],
938 pkt[14], pkt[15]);
939 } 940
941 /* Check if the TX ring is full or not - 'tbusy' cleared if not full. */ 942 if (lp->tx_ring[(entry+1) & lp->rmask].base >= 0) { 943 dev->tbusy=0;
944 } 945
946 dev_kfree_skb (skb, FREE_WRITE);
947 } 948
949 return 0;
950 } 951
952 /* 953 ** The DEPCA interrupt handler. 954 */ 955 staticvoid 956 depca_interrupt(intirq, structpt_regs * regs)
/* */ 957 { 958 structdevice *dev = (structdevice *)(irq2dev_map[irq]);
959 structdepca_private *lp;
960 intcsr0, ioaddr, nicsr;
961
962 if (dev == NULL) { 963 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
964 }else{ 965 lp = (structdepca_private *)dev->priv;
966 ioaddr = dev->base_addr;
967
968 if (dev->interrupt)
969 printk("%s: Re-entering the interrupt handler.\n", dev->name);
970
971 dev->interrupt = MASK_INTERRUPTS;
972
973 /* mask the DEPCA board interrupts and turn on the LED */ 974 nicsr = inb(DEPCA_NICSR);
975 nicsr |= (IM|LED);
976 outb(nicsr, DEPCA_NICSR);
977
978 outw(CSR0, DEPCA_ADDR);
979 csr0 = inw(DEPCA_DATA);
980
981 /* Acknowledge all of the current interrupt sources ASAP. */ 982 outw(csr0 & ~(INEA|TDMD|STOP|STRT|INIT), DEPCA_DATA);
983
984 if (depca_debug > 5)
985 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
986 dev->name, csr0, inw(DEPCA_DATA));
987
988 if (csr0 & RINT) /* Rx interrupt (packet arrived) */ 989 depca_rx(dev);
990
991 if (csr0 & TINT) /* Tx interrupt (packet sent) */ 992 depca_tx(dev);
993
994 /* Clear the interrupts we've handled. */ 995 outw(CSR0, DEPCA_ADDR);
996 outw(BABL|CERR|MISS|MERR|RINT|TINT|IDON|INEA, DEPCA_DATA);
997
998 if (depca_debug > 4) { 999 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
1000 dev->name, inw(DEPCA_ADDR),
1001 inw(DEPCA_DATA));
1002 }1003
1004 /* Unmask the DEPCA board interrupts and turn off the LED */1005 nicsr = (nicsr & ~IM & ~LED);
1006 outb(nicsr, DEPCA_NICSR);
1007 dev->interrupt = UNMASK_INTERRUPTS;
1008 }1009
1010 return;
1011 }1012
1013 staticint1014 depca_rx(structdevice *dev)
/* */1015 {1016 structdepca_private *lp = (structdepca_private *)dev->priv;
1017 intentry = lp->cur_rx & lp->rmask;
1018
1019 /* If we own the next entry, it's a new packet. Send it up. */1020 for (; lp->rx_ring[entry].base >= 0; entry = (++lp->cur_rx) & lp->rmask) {1021 intstatus = lp->rx_ring[entry].base >> 16 ;
1022 intchained;
1023
1024 /*1025 ** There is a tricky error noted by John Murphy, <murf@perftech.com>1026 ** to Russ Nelson: even with full-sized buffers, it's possible for a1027 ** jabber packet to use two buffers, with only the last one correctly1028 ** noting the error.1029 */1030
1031 /* Check for a chaining buffer */1032 chained = 0;
1033 if (status == R_STP) {1034 chained = 1;
1035
1036 /* 1037 ** Wait for next buffer to complete to check for errors. This1038 ** is slow but infrequent and allows for correct hardware buffer1039 ** chaining (whilst defeating the chaining's purpose).1040 */1041 while ((status=(lp->rx_ring[(entry+1)&lp->rmask].base >> 16)) < 0);
1042
1043 /* NB: 'status' now comes from the buffer following 'entry'. */1044 }1045
1046 if (status & R_ERR) {/* There was an error. */1047 lp->stats.rx_errors++; /* Update the error stats. */1048 if (status & R_FRAM) lp->stats.rx_frame_errors++;
1049 if (status & R_OFLO) lp->stats.rx_over_errors++;
1050 if (status & R_CRC) lp->stats.rx_crc_errors++;
1051 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
1052 }else{/* Malloc up new buffer, compatible with net-2e. */1053 shortpkt_len = lp->rx_ring[entry].msg_length;
1054 structsk_buff *skb;
1055
1056 skb = alloc_skb(pkt_len, GFP_ATOMIC);
1057 if (skb == NULL) {1058 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1059 lp->stats.rx_dropped++; /* Really, deferred. */1060 break;
1061 }1062 skb->len = pkt_len;
1063 skb->dev = dev;
1064 memcpy(skb->data,
1065 (unsignedchar *)((lp->rx_ring[entry].base+lp->bus_offset) &
1066 0x00ffffff),
1067 pkt_len);
1068 /* 1069 ** Notify the upper protocol layers that there is another 1070 ** packet to handle1071 */1072 netif_rx(skb);
1073 lp->stats.rx_packets++;
1074 }1075
1076 /* turn over ownership of the current entry back to the LANCE */1077 lp->rx_ring[entry].base |= R_OWN;
1078 if (chained && (status & R_ERR)) {/* next entry also bad */1079 entry = (++lp->cur_rx) & lp->rmask;
1080 lp->rx_ring[entry].base |= R_OWN;
1081 }1082 }1083
1084 /* 1085 ** We should check that at least two ring entries are free. If not,1086 ** we should free one and mark stats->rx_dropped++. 1087 */1088
1089 return 0;
1090 }1091
1092 /*1093 ** Buffer sent - check for buffer errors.1094 */1095 staticint1096 depca_tx(structdevice *dev)
/* */1097 {1098 structdepca_private *lp = (structdepca_private *)dev->priv;
1099 intdirty_tx = lp->dirty_tx & lp->rmask;
1100
1101 if (depca_debug > 5)
1102 printk("%s: Cleaning tx ring, dirty %d clean %d.\n",
1103 dev->name, dirty_tx, (lp->cur_tx & lp->rmask));
1104
1105 /* 1106 ** While the dirty entry is not the current one AND 1107 ** the LANCE doesn't own it... 1108 */1109 for (; dirty_tx!=(lp->cur_tx & lp->rmask) && lp->tx_ring[dirty_tx].base>0;
1110 dirty_tx = ++lp->dirty_tx & lp->rmask) {1111 unsignedlong *tmdp = (unsignedlong *)(&lp->tx_ring[dirty_tx]);
1112 intstatus = lp->tx_ring[dirty_tx].base >> 16;
1113
1114 if (status < 0) {/* Packet not yet sent! */1115 printk("interrupt for packet not yet sent!\n");
1116 break;
1117 }1118 if (status & T_ERR) {/* There was an major error, log it. */1119 interr_status = lp->tx_ring[dirty_tx].misc;
1120
1121 lp->stats.tx_errors++;
1122 if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1123 if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1124 if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
1125 if (err_status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1126 /* We should re-init() after the FIFO error. */1127 }elseif (status & (T_MORE | T_ONE)) {1128 lp->stats.collisions++;
1129 }else{1130 lp->stats.tx_packets++;
1131 }1132
1133 if (depca_debug > 5)
1134 printk("%s: Tx done entry %d, %4.4lx %4.4lx %4.4lx %4.4lx.\n",
1135 dev->name, dirty_tx,
1136 tmdp[0], tmdp[1], tmdp[2], tmdp[3]);
1137 }1138 /*mark_bh(INET_BH);*/1139 return 0;
1140 }1141
1142 staticint1143 depca_close(structdevice *dev)
/* */1144 {1145 structdepca_private *lp = (structdepca_private *)dev->priv;
1146 intnicsr, ioaddr = dev->base_addr;
1147
1148 dev->start = 0;
1149 dev->tbusy = 1;
1150
1151 outw(CSR0, DEPCA_ADDR);
1152
1153 if (depca_debug > 1) {1154 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1155 dev->name, inw(DEPCA_DATA));
1156 }1157
1158 /* 1159 ** We stop the DEPCA here -- it occasionally polls1160 ** memory if we don't. 1161 */1162 outw(STOP, DEPCA_DATA);
1163
1164 /*1165 ** Give back the ROM in case the user wants to go to DOS1166 */1167 if (strstr(lp->devname,"DEPCA") == NULL) {1168 nicsr = inb(DEPCA_NICSR);
1169 nicsr &= ~SHE;
1170 outb(nicsr, DEPCA_NICSR);
1171 }1172
1173 free_irq(dev->irq);
1174
1175 irq2dev_map[dev->irq] = 0;
1176
1177 MOD_DEC_USE_COUNT;
1178
1179 return 0;
1180 }1181
1182 staticvoidLoadCSRs(structdevice *dev)
/* */1183 {1184 structdepca_private *lp = (structdepca_private *)dev->priv;
1185 intioaddr = dev->base_addr;
1186
1187 outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */1188 outw((unsignedshort)((unsignedlong)(&lp->init_block) & LA_MASK),
1189 DEPCA_DATA);
1190 outw(CSR2, DEPCA_ADDR); /* initialisation block address MSW */1191 outw((unsignedshort)(((unsignedlong)(&lp->init_block) & LA_MASK) >> 16),
1192 DEPCA_DATA);
1193 outw(CSR3, DEPCA_ADDR); /* ALE control */1194 outw(ACON, DEPCA_DATA);
1195 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */1196 }1197
1198 staticintInitRestartDepca(structdevice *dev)
/* */1199 {1200 structdepca_private *lp = (structdepca_private *)dev->priv;
1201 intioaddr = dev->base_addr;
1202 inti, status=0;
1203
1204 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */1205 outw(INIT, DEPCA_DATA); /* initialize DEPCA */1206
1207 /* wait for lance to complete initialisation */1208 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1209
1210 if (i!=100) {1211 /* clear IDON by writing a "1", enable interrupts and start lance */1212 outw(IDON | INEA | STRT, DEPCA_DATA);
1213 if (depca_debug > 2) {1214 printk("%s: DEPCA open after %d ticks, init block %#lx csr0 %4.4x.\n",
1215 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1216 }1217 }else{1218 status = -1;
1219 printk("%s: DEPCA unopened after %d ticks, init block %#lx csr0 %4.4x.\n",
1220 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1221 }1222
1223 returnstatus;
1224 }1225
1226 staticstructenet_statistics *
1227 depca_get_stats(structdevice *dev)
/* */1228 {1229 structdepca_private *lp = (structdepca_private *)dev->priv;
1230
1231 /* Null body since there is no framing error counter */1232
1233 return &lp->stats;
1234 }1235
1236 #ifdefHAVE_MULTICAST1237 /*1238 ** Set or clear the multicast filter for this adaptor.1239 ** num_addrs == -1 Promiscuous mode, receive all packets1240 ** num_addrs == 0 Normal mode, clear multicast list1241 ** num_addrs > 0 Multicast mode, receive normal and MC packets, and do1242 ** best-effort filtering.1243 */1244 #definehash_filterlp->init_block.filter1245
1246 staticvoid1247 set_multicast_list(structdevice *dev, intnum_addrs, void *addrs)
/* */1248 {1249 shortioaddr = dev->base_addr;
1250 structdepca_private *lp = (structdepca_private *)dev->priv;
1251
1252 if (irq2dev_map[dev->irq] != NULL) {1253 STOP_DEPCA; /* Temporarily stop the depca. */1254 depca_init_ring(dev); /* Initialize the descriptor rings */1255
1256 if (num_addrs >= 0) {1257 SetMulticastFilter(num_addrs, (char *)addrs, (char *)hash_filter);
1258 lp->init_block.mode &= ~PROM; /* Unset promiscuous mode */1259 }else{1260 lp->init_block.mode |= PROM; /* Set promiscuous mode */1261 }1262
1263 LoadCSRs(dev); /* Reload CSR3 */1264 InitRestartDepca(dev); /* Resume normal operation. */1265 }1266 }1267
1268 /*1269 ** Calculate the hash code and update the logical address filter1270 ** from a list of ethernet multicast addresses.1271 ** Derived from a 'C' program in the AMD data book:1272 ** "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)", 1273 ** Pub #17781, Rev. A, May 19931274 */1275 staticvoidSetMulticastFilter(intnum_addrs, char *addrs, char *multicast_table)
/* */1276 {1277 charj, ctrl, bit, octet, hashcode;
1278 shortinti;
1279 longintCRC, poly = (longint) CRC_POLYNOMIAL;
1280
1281 for (i=0;i<num_addrs;i++) {/* for each address in the list */1282 if (((char) *(addrs+ETH_ALEN*i) & 0x01) == 1) {/* is multicast address? */1283 CRC = (longint) 0xffffffff; /* init CRC for each address */1284 for (octet=0;octet<ETH_ALEN;octet++) {/* for each address octet */1285 for(j=0;j<8;j++) {/* process each address bit */1286 bit = (((char)* (addrs+ETH_ALEN*i+octet)) >> j) & 0x01;
1287 ctrl = ((CRC < 0) ? 1 : 0); /* shift the control bit */1288 CRC <<= 1; /* shift the CRC */1289 if (bit ^ ctrl) {/* (bit) XOR (control bit) */1290 CRC ^= poly; /* (CRC) XOR (polynomial) */1291 }1292 }1293 }1294 hashcode = (CRC & 0x00000001); /* hashcode is 6 LSb of CRC ... */1295 for (j=0;j<5;j++) {/* ... in reverse order. */1296 hashcode <<= 1;
1297 CRC >>= 1;
1298 hashcode |= (CRC & 0x00000001);
1299 }1300 octet = hashcode >> 3; /* bit[3-5] -> octet in filter */1301 /* bit[0-2] -> bit in octet */1302 multicast_table[octet] |= (1 << (hashcode & 0x07));
1303 }1304 }1305 return;
1306 }1307
1308 #endif/* HAVE_MULTICAST */1309
1310 #ifndefMODULE1311 /*1312 ** ISA bus I/O device probe1313 */1314 staticstructdevice *isa_probe(structdevice *dev)
/* */1315 {1316 int *port, ports[] = DEPCA_IO_PORTS;
1317 intstatus;
1318
1319 for (status = -ENODEV, port = &ports[0];
1320 *port && (num_depcas < MAX_NUM_DEPCAS); port++) {1321 intioaddr = *port;
1322
1323 if (DevicePresent(ioaddr) == 0) {1324 if (num_depcas > 0) {/* only gets here in autoprobe */1325 dev = alloc_device(dev, ioaddr);
1326 }else{1327 if ((status = depca_probe1(dev, ioaddr)) == 0) {1328 num_depcas++;
1329 }1330 }1331 num_eth++;
1332 }1333 }1334 returndev;
1335 }1336
1337 /*1338 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually1339 ** the motherboard.1340 */1341 staticstructdevice *eisa_probe(structdevice *dev)
/* */1342 {1343 inti, ioaddr = DEPCA_EISA_IO_PORTS;
1344 intstatus;
1345
1346 ioaddr+=0x1000; /* get the first slot address */1347 for (status = -ENODEV, i=1; i<MAX_EISA_SLOTS; i++, ioaddr+=0x1000) {1348
1349 if (DevicePresent(ioaddr) == 0) {1350 if (num_depcas > 0) {/* only gets here in autoprobe */1351 dev = alloc_device(dev, ioaddr);
1352 }else{1353 if ((status = depca_probe1(dev, ioaddr)) == 0) {1354 num_depcas++;
1355 }1356 }1357 num_eth++;
1358 }1359 }1360 returndev;
1361 }1362
1363 /*1364 ** Allocate the device by pointing to the next available space in the1365 ** device structure. Should one not be available, it is created.1366 */1367 staticstructdevice *alloc_device(structdevice *dev, intioaddr)
/* */1368 {1369 /*1370 ** Check the device structures for an end of list or unused device1371 */1372 while (dev->next != NULL) {1373 if (dev->next->base_addr == 0xffe0) break;
1374 dev = dev->next; /* walk through eth device list */1375 num_eth++; /* increment eth device number */1376 }1377
1378 /*1379 ** If no more device structures, malloc one up. If memory could1380 ** not be allocated, print an error message.1381 */1382 if (dev->next == NULL) {1383 dev->next = (structdevice *)kmalloc(sizeof(structdevice) + 8,
1384 GFP_KERNEL);
1385 if (dev->next == NULL) {1386 printk("eth%d: Device not initialised, insufficient memory\n",
1387 num_eth);
1388 }1389 }1390
1391 /*1392 ** If the memory was allocated, point to the new memory area1393 ** and initialize it (name, I/O address, next device (NULL) and1394 ** initialisation probe routine).1395 */1396 if ((dev->next != NULL) &&
1397 (num_eth > 0) && (num_eth < 9999)) {1398 dev = dev->next; /* point to the new device */1399 dev->name = (char *)(dev + 1);
1400 sprintf(dev->name,"eth%d", num_eth);/* New device name */1401 dev->base_addr = ioaddr; /* assign the io address */1402 dev->next = NULL; /* mark the end of list */1403 dev->init = &depca_probe; /* initialisation routine */1404 num_depcas++;
1405 }1406
1407 returndev;
1408 }1409 #endif/* MODULE */1410
1411 /*1412 ** Look for a particular board name in the on-board Remote Diagnostics1413 ** and Boot (RDB) ROM. This will also give us a clue to the network RAM1414 ** base address.1415 */1416 staticchar *DepcaSignature(unsignedlongmem_addr)
/* */1417 {1418 unsignedlongi,j,k;
1419 staticcharsignatures[][DEPCA_NAME_LENGTH] = DEPCA_SIGNATURE;
1420 staticcharthisName[DEPCA_NAME_LENGTH];
1421 chartmpstr[17];
1422
1423 for (i=0;i<16;i++) {/* copy the first 16 bytes of ROM to */1424 tmpstr[i] = *(unsignedchar *)(mem_addr+0xc000+i); /* a temporary string */1425 }1426 tmpstr[i]='\0';
1427
1428 strcpy(thisName,"");
1429 for (i=0;*signatures[i]!='\0' && *thisName=='\0';i++) {1430 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {1431 if (signatures[i][k] == tmpstr[j]) {/* track signature */1432 k++;
1433 }else{/* lost signature; begin search again */1434 k=0;
1435 }1436 }1437 if (k == strlen(signatures[i])) {1438 strcpy(thisName,signatures[i]);
1439 }1440 }1441
1442 returnthisName; /* return the device name string */1443 }1444
1445 /*1446 ** Look for a special sequence in the Ethernet station address PROM that1447 ** is common across all DEPCA products. Note that the original DEPCA needs1448 ** its ROM address counter to be initialized and enabled. Only enable1449 ** if the first address octet is a 0x08 - this minimises the chances of1450 ** messing around with some other hardware, but it assumes that this DEPCA1451 ** card initialized itself correctly.1452 ** 1453 ** Search the Ethernet address ROM for the signature. Since the ROM address1454 ** counter can start at an arbitrary point, the search must include the entire1455 ** probe sequence length plus the (length_of_the_signature - 1).1456 ** Stop the search IMMEDIATELY after the signature is found so that the1457 ** PROM address counter is correctly positioned at the start of the1458 ** ethernet address for later read out.1459 */1460 staticintDevicePresent(shortioaddr)
/* */1461 {1462 union{1463 struct{1464 u_longa;
1465 u_longb;
1466 }llsig;
1467 charSig[sizeof(long) << 1];
1468 }dev;
1469 shortsigLength=0;
1470 chardata;
1471 inti, j, nicsr, status = 0;
1472
1473 data = inb(DEPCA_PROM); /* clear counter on DEPCA */1474 data = inb(DEPCA_PROM); /* read data */1475
1476 if (data == 0x08) {/* Enable counter on DEPCA */1477 nicsr = inb(DEPCA_NICSR);
1478 nicsr |= AAC;
1479 outb(nicsr, DEPCA_NICSR);
1480 }1481
1482 dev.llsig.a = ETH_PROM_SIG;
1483 dev.llsig.b = ETH_PROM_SIG;
1484 sigLength = sizeof(long) << 1;
1485
1486 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {1487 data = inb(DEPCA_PROM);
1488 if (dev.Sig[j] == data) {/* track signature */1489 j++;
1490 }else{/* lost signature; begin search again */1491 if (data == dev.Sig[0]) {/* rare case.... */1492 j=1;
1493 }else{1494 j=0;
1495 }1496 }1497 }1498
1499 if (j!=sigLength) {1500 status = -ENODEV; /* search failed */1501 }1502
1503 returnstatus;
1504 }1505
1506 #ifdefMODULE1507 charkernel_version[] = UTS_RELEASE;
1508 staticstructdevicethisDepca = {1509 " ", /* device name inserted by /linux/drivers/net/net_init.c */1510 0, 0, 0, 0,
1511 0x200, 7, /* I/O address, IRQ */1512 0, 0, 0, NULL, depca_probe};
1513
1514 /*1515 * This is a tweak to keep the insmod program happy. It can only1516 * set int values with var=value so we split these out.1517 */1518
1519 intirq=7; /* EDIT THESE LINE FOR YOUR CONFIGURATION */1520 intio=0x200; /* Or use the irq= io= options to insmod */1521
1522 int1523 init_module(void)
/* */1524 {1525 thisDepca.irq=irq;
1526 thisDepca.base_addr=io;
1527 if (register_netdev(&thisDepca) != 0)
1528 return -EIO;
1529 return 0;
1530 }1531
1532 void1533 cleanup_module(void)
/* */1534 {1535 if (MOD_IN_USE) {1536 printk("%s: device busy, remove delayed\n",thisDepca.name);
1537 }else{1538 release_region(thisDepca.base_addr, DEPCA_TOTAL_SIZE);
1539 unregister_netdev(&thisDepca);
1540 }1541 }1542 #endif/* MODULE */1543
1544
1545 /*1546 * Local variables:1547 * kernel-compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c depca.c"1548 *1549 * module-compile-command: "gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c depca.c"1550 * End:1551 */