This source file includes following definitions.
- wavelan_splhi
- wavelan_splx
- hasr_read
- hacr_write
- hacr_write_slow
- set_chan_attn
- wavelan_reset
- wavelan_16_off
- wavelan_16_on
- wavelan_ints_off
- wavelan_ints_on
- psa_read
- obram_read
- obram_write
- mmc_read
- mmc_write
- wavelan_map_irq
- wavelan_mmc_init
- wavelan_ack
- wavelan_synchronous_cmd
- wavelan_hardware_reset
- wavelan_struct_check
- wavelan_probe
- wavelan_probe1
- wavelan_ru_start
- wavelan_cu_start
- wavelan_open
- hardware_send_packet
- wavelan_send_packet
- addrcmp
- wavelan_receive
- wavelan_complete
- wavelan_watchdog
- wavelan_interrupt
- wavelan_close
- wavelan_get_stats
- wavelan_set_multicast_list
- sprintf_stats
- wavelan_get_info
- init_module
- cleanup_module
- wavelan_cu_show_one
- wavelan_psa_show
- wavelan_mmc_show
- wavelan_scb_show
- wavelan_ru_show
- wavelan_cu_show
- wavelan_dev_show
- wavelan_local_show
1
2
3
4
5
6
7 #include <linux/config.h>
8
9 #if defined(CONFIG_WAVELAN)
10 #if defined(MODULE)
11 #include <linux/module.h>
12 #include <linux/version.h>
13 #endif
14
15 #include <linux/kernel.h>
16 #include <linux/sched.h>
17 #include <linux/types.h>
18 #include <linux/fcntl.h>
19 #include <linux/interrupt.h>
20 #include <linux/ptrace.h>
21 #include <linux/ioport.h>
22 #include <linux/in.h>
23 #include <linux/string.h>
24 #include <linux/delay.h>
25 #include <asm/system.h>
26 #include <asm/bitops.h>
27 #include <asm/io.h>
28 #include <asm/dma.h>
29 #include <errno.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/skbuff.h>
33 #include <linux/malloc.h>
34 #include <linux/timer.h>
35 #define STRUCT_CHECK 1
36 #include "i82586.h"
37 #include "wavelan.h"
38
39 #ifndef WAVELAN_DEBUG
40 #define WAVELAN_DEBUG 0
41 #endif
42
43 #define nels(a) (sizeof(a) / sizeof(a[0]))
44
45 #define WATCHDOG_JIFFIES 512
46
47 typedef struct device device;
48 typedef struct enet_statistics en_stats;
49 typedef struct net_local net_local;
50 typedef struct timer_list timer_list;
51
52 struct net_local
53 {
54 en_stats stats;
55 unsigned int tx_n_in_use;
56 unsigned char nwid[2];
57 unsigned short hacr;
58 unsigned short rx_head;
59 unsigned short rx_last;
60 unsigned short tx_first_free;
61 unsigned short tx_first_in_use;
62 unsigned int nresets;
63 unsigned int correct_nwid;
64 unsigned int wrong_nwid;
65 unsigned int promiscuous;
66 timer_list watchdog;
67 device *dev;
68 net_local *prev;
69 net_local *next;
70 };
71
72 extern int wavelan_probe(device *);
73
74 static char *version = "wavelan.c:v6 22/2/95\n";
75
76
77
78
79 static int wavelan_probe1(device *, unsigned short);
80 static int wavelan_open(device *);
81 static int wavelan_send_packet(struct sk_buff *, device *);
82 static void wavelan_interrupt(int, struct pt_regs *);
83 static int wavelan_close(device *);
84 static en_stats *wavelan_get_stats(device *);
85 static void wavelan_set_multicast_list(device *, int, void *);
86
87
88
89
90 static void wavelan_cu_show_one(device *, net_local *, int, unsigned short);
91 static void wavelan_cu_start(device *);
92 static void wavelan_ru_start(device *);
93 static void wavelan_watchdog(unsigned long);
94 #if 0
95 static void wavelan_psa_show(psa_t *);
96 static void wavelan_mmc_show(unsigned short);
97 #endif
98 static void wavelan_scb_show(unsigned short);
99 static void wavelan_ru_show(device *);
100 static void wavelan_cu_show(device *);
101 static void wavelan_dev_show(device *);
102 static void wavelan_local_show(device *);
103
104 static unsigned int wavelan_debug = WAVELAN_DEBUG;
105 static net_local *first_wavelan = (net_local *)0;
106
107 static
108 unsigned long
109 wavelan_splhi(void)
110 {
111 unsigned long flags;
112
113 save_flags(flags);
114 cli();
115
116 return flags;
117 }
118
119 static
120 void
121 wavelan_splx(unsigned long flags)
122 {
123 restore_flags(flags);
124 }
125
126 static
127 unsigned short
128 hasr_read(unsigned short ioaddr)
129 {
130 return inw(HASR(ioaddr));
131 }
132
133 static
134 void
135 hacr_write(unsigned short ioaddr, int hacr)
136 {
137 outw(hacr, HACR(ioaddr));
138 }
139
140 static
141 void
142 hacr_write_slow(unsigned short ioaddr, int hacr)
143 {
144 hacr_write(ioaddr, hacr);
145
146 udelay(1000);
147 }
148
149
150
151
152 static
153 void
154 set_chan_attn(unsigned short ioaddr, unsigned short current_hacr)
155 {
156 hacr_write(ioaddr, current_hacr | HACR_CA);
157 }
158
159
160
161
162 static
163 void
164 wavelan_reset(unsigned short ioaddr)
165 {
166 hacr_write_slow(ioaddr, HACR_RESET);
167 hacr_write(ioaddr, HACR_DEFAULT);
168 }
169
170 static
171 void
172 wavelan_16_off(unsigned short ioaddr, unsigned short hacr)
173 {
174 hacr &= ~HACR_16BITS;
175
176 hacr_write(ioaddr, hacr);
177 }
178
179 static
180 void
181 wavelan_16_on(unsigned short ioaddr, unsigned short hacr)
182 {
183 hacr |= HACR_16BITS;
184
185 hacr_write(ioaddr, hacr);
186 }
187
188 static
189 void
190 wavelan_ints_off(device *dev)
191 {
192 unsigned short ioaddr;
193 net_local *lp;
194 unsigned long x;
195
196 ioaddr = dev->base_addr;
197 lp = (net_local *)dev->priv;
198
199 x = wavelan_splhi();
200
201 lp->hacr &= ~HACR_INTRON;
202 hacr_write(ioaddr, lp->hacr);
203
204 wavelan_splx(x);
205 }
206
207 static
208 void
209 wavelan_ints_on(device *dev)
210 {
211 unsigned short ioaddr;
212 net_local *lp;
213 unsigned long x;
214
215 ioaddr = dev->base_addr;
216 lp = (net_local *)dev->priv;
217
218 x = wavelan_splhi();
219
220 lp->hacr |= HACR_INTRON;
221 hacr_write(ioaddr, lp->hacr);
222
223 wavelan_splx(x);
224 }
225
226
227
228
229 static
230 void
231 psa_read(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
232 {
233 wavelan_16_off(ioaddr, hacr);
234
235 while (n-- > 0)
236 {
237 outw(o, PIOR2(ioaddr));
238 o++;
239 *b++ = inb(PIOP2(ioaddr));
240 }
241
242 wavelan_16_on(ioaddr, hacr);
243 }
244
245
246
247
248 static
249 void
250 obram_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
251 {
252 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
253
254 outw(o, PIOR1(ioaddr));
255
256 insw(PIOP1(ioaddr), (unsigned short *)b, n);
257 }
258
259
260
261
262 static
263 void
264 obram_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
265 {
266 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
267
268 outw(o, PIOR1(ioaddr));
269
270 outsw(PIOP1(ioaddr), (unsigned short *)b, n);
271 }
272
273
274
275
276 static
277 void
278 mmc_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
279 {
280 while (n-- > 0)
281 {
282 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
283 ;
284
285 outw(o << 1, MMCR(ioaddr));
286 o++;
287
288 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
289 ;
290
291 *b++ = (unsigned char)(inw(MMCR(ioaddr)) >> 8);
292 }
293 }
294
295
296
297
298 static
299 void
300 mmc_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
301 {
302 while (n-- > 0)
303 {
304 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
305 ;
306
307 outw((unsigned short)(((unsigned short)*b << 8) | (o << 1) | 1), MMCR(ioaddr));
308 b++;
309 o++;
310 }
311 }
312
313
314
315
316 static
317 int
318 wavelan_map_irq(unsigned short ioaddr, unsigned char irqval)
319 {
320 int irq;
321 static int irqvals[] =
322 {
323 0, 0, 0, 0x01,
324 0x02, 0x04, 0, 0x08,
325 0, 0, 0x10, 0x20,
326 0x40, 0, 0, 0x80,
327 };
328
329 for (irq = 0; irq < nels(irqvals); irq++)
330 {
331 if (irqvals[irq] == (int)irqval)
332 return irq;
333 }
334
335 return -1;
336 }
337
338
339
340
341 static
342 void
343 wavelan_mmc_init(device *dev, psa_t *psa)
344 {
345 unsigned short ioaddr;
346 net_local *lp;
347 mmw_t m;
348 int configured;
349
350 ioaddr = dev->base_addr;
351 lp = (net_local *)dev->priv;
352 memset(&m, 0x00, sizeof(m));
353
354
355
356
357
358
359
360
361
362 configured = 0;
363
364
365
366
367
368 m.mmw_jabber_enable = 0x01;
369 m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
370 m.mmw_ifs = 0x20;
371 m.mmw_mod_delay = 0x04;
372 m.mmw_jam_time = 0x38;
373
374 m.mmw_encr_enable = 0;
375 m.mmw_des_io_invert = 0;
376 m.mmw_freeze = 0;
377 m.mmw_decay_prm = 0;
378 m.mmw_decay_updat_prm = 0;
379
380 if (configured)
381 {
382
383
384
385 if (psa->psa_undefined & 1)
386 m.mmw_loopt_sel = 0x00;
387 else
388 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
389
390 m.mmw_thr_pre_set = psa->psa_thr_pre_set & 0x3F;
391 m.mmw_quality_thr = psa->psa_quality_thr & 0x0F;
392 }
393 else
394 {
395 if (lp->promiscuous)
396 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
397 else
398 m.mmw_loopt_sel = 0x00;
399
400
401
402
403
404 if (psa->psa_comp_number & 1)
405 m.mmw_thr_pre_set = 0x01;
406 else
407 m.mmw_thr_pre_set = 0x04;
408
409 m.mmw_quality_thr = 0x03;
410 }
411
412 m.mmw_netw_id_l = lp->nwid[1];
413 m.mmw_netw_id_h = lp->nwid[0];
414
415 mmc_write(ioaddr, 0, (unsigned char *)&m, sizeof(m));
416 }
417
418 static
419 void
420 wavelan_ack(device *dev)
421 {
422 unsigned short ioaddr;
423 net_local *lp;
424 unsigned short scb_cs;
425 int i;
426
427 ioaddr = dev->base_addr;
428 lp = (net_local *)dev->priv;
429
430 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
431 scb_cs &= SCB_ST_INT;
432
433 if (scb_cs == 0)
434 return;
435
436 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
437
438 set_chan_attn(ioaddr, lp->hacr);
439
440 for (i = 1000; i > 0; i--)
441 {
442 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
443 if (scb_cs == 0)
444 break;
445
446 udelay(1000);
447 }
448
449 if (i <= 0)
450 printk("%s: wavelan_ack(): board not accepting command.\n", dev->name);
451 }
452
453
454
455
456
457 static
458 int
459 wavelan_synchronous_cmd(device *dev, char *str)
460 {
461 unsigned short ioaddr;
462 net_local *lp;
463 unsigned short scb_cmd;
464 ach_t cb;
465 int i;
466
467 ioaddr = dev->base_addr;
468 lp = (net_local *)dev->priv;
469
470 scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO;
471 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
472
473 set_chan_attn(ioaddr, lp->hacr);
474
475 for (i = 64; i > 0; i--)
476 {
477 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
478 if (cb.ac_status & AC_SFLD_C)
479 break;
480
481 udelay(1000);
482 }
483
484 if (i <= 0 || !(cb.ac_status & AC_SFLD_OK))
485 {
486 printk("%s: %s failed; status = 0x%x\n", dev->name, str, cb.ac_status);
487 wavelan_scb_show(ioaddr);
488 return -1;
489 }
490
491 wavelan_ack(dev);
492
493 return 0;
494 }
495
496 static
497 int
498 wavelan_hardware_reset(device *dev)
499 {
500 unsigned short ioaddr;
501 psa_t psa;
502 net_local *lp;
503 scp_t scp;
504 iscp_t iscp;
505 scb_t scb;
506 ach_t cb;
507 int i;
508 ac_cfg_t cfg;
509 ac_ias_t ias;
510
511 ioaddr = dev->base_addr;
512 lp = (net_local *)dev->priv;
513
514 lp->nresets++;
515
516 wavelan_reset(ioaddr);
517 lp->hacr = HACR_DEFAULT;
518
519
520
521
522 {
523 unsigned char zeroes[512];
524
525 memset(&zeroes[0], 0x00, sizeof(zeroes));
526
527 for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes))
528 obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes));
529 }
530
531 psa_read(ioaddr, lp->hacr, 0, (unsigned char *)&psa, sizeof(psa));
532
533 wavelan_mmc_init(dev, &psa);
534
535
536
537
538
539 memset(&scp, 0x00, sizeof(scp));
540 scp.scp_sysbus = SCP_SY_16BBUS;
541 scp.scp_iscpl = OFFSET_ISCP;
542 obram_write(ioaddr, OFFSET_SCP, (unsigned char *)&scp, sizeof(scp));
543
544 memset(&iscp, 0x00, sizeof(iscp));
545 iscp.iscp_busy = 1;
546 iscp.iscp_offset = OFFSET_SCB;
547 obram_write(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
548
549 memset(&scb, 0x00, sizeof(scb));
550 scb.scb_command = SCB_CMD_RESET;
551 scb.scb_cbl_offset = OFFSET_CU;
552 scb.scb_rfa_offset = OFFSET_RU;
553 obram_write(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
554
555 set_chan_attn(ioaddr, lp->hacr);
556
557 for (i = 1000; i > 0; i--)
558 {
559 obram_read(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
560
561 if (iscp.iscp_busy == (unsigned short)0)
562 break;
563
564 udelay(1000);
565 }
566
567 if (i <= 0)
568 printk("%s: wavelan_hardware_reset(): iscp_busy timeout.\n", dev->name);
569
570 for (i = 15; i > 0; i--)
571 {
572 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
573
574 if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA))
575 break;
576
577 udelay(1000);
578 }
579
580 if (i <= 0)
581 printk("%s: wavelan_hardware_reset(): status: expected 0x%02x, got 0x%02x.\n", dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status);
582
583 wavelan_ack(dev);
584
585 memset(&cb, 0x00, sizeof(cb));
586 cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose);
587 cb.ac_link = OFFSET_CU;
588 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
589
590 if (wavelan_synchronous_cmd(dev, "diag()") == -1)
591 return -1;
592
593 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
594 if (cb.ac_status & AC_SFLD_FAIL)
595 {
596 printk("%s: wavelan_hardware_reset(): i82586 Self Test failed.\n", dev->name);
597 return -1;
598 }
599
600 memset(&cfg, 0x00, sizeof(cfg));
601
602 #if 0
603
604
605
606 cfg.fifolim_bytecnt = 0x080c;
607 cfg.addrlen_mode = 0x2600;
608 cfg.linprio_interframe = 0x7820;
609 cfg.slot_time = 0xf00c;
610 cfg.hardware = 0x0008;
611 cfg.min_frame_len = 0x0040;
612 #endif
613
614
615
616
617
618
619 cfg.cfg_byte_cnt = AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t));
620 cfg.cfg_fifolim = AC_CFG_FIFOLIM(8);
621 cfg.cfg_byte8 = AC_CFG_SAV_BF(0) |
622 AC_CFG_SRDY(0);
623 cfg.cfg_byte9 = AC_CFG_ELPBCK(0) |
624 AC_CFG_ILPBCK(0) |
625 AC_CFG_PRELEN(AC_CFG_PLEN_2) |
626 AC_CFG_ALOC(1) |
627 AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE);
628 cfg.cfg_byte10 = AC_CFG_BOFMET(0) |
629 AC_CFG_ACR(0) |
630 AC_CFG_LINPRIO(0);
631 cfg.cfg_ifs = 32;
632 cfg.cfg_slotl = 0;
633 cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) |
634 AC_CFG_SLTTMHI(2);
635 cfg.cfg_byte14 = AC_CFG_FLGPAD(0) |
636 AC_CFG_BTSTF(0) |
637 AC_CFG_CRC16(0) |
638 AC_CFG_NCRC(0) |
639 AC_CFG_TNCRS(1) |
640 AC_CFG_MANCH(0) |
641 AC_CFG_BCDIS(0) |
642 AC_CFG_PRM(lp->promiscuous);
643 cfg.cfg_byte15 = AC_CFG_ICDS(0) |
644 AC_CFG_CDTF(0) |
645 AC_CFG_ICSS(0) |
646 AC_CFG_CSTF(0);
647
648
649
650 cfg.cfg_min_frm_len = AC_CFG_MNFRM(8);
651
652 cfg.cfg_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_configure);
653 cfg.cfg_h.ac_link = OFFSET_CU;
654 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cfg, sizeof(cfg));
655
656 if (wavelan_synchronous_cmd(dev, "reset()-configure") == -1)
657 return -1;
658
659 memset(&ias, 0x00, sizeof(ias));
660 ias.ias_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_ia_setup);
661 ias.ias_h.ac_link = OFFSET_CU;
662 memcpy(&ias.ias_addr[0], (unsigned char *)&dev->dev_addr[0], sizeof(ias.ias_addr));
663 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&ias, sizeof(ias));
664
665 if (wavelan_synchronous_cmd(dev, "reset()-address") == -1)
666 return -1;
667
668 wavelan_ints_on(dev);
669
670 if (wavelan_debug > 4)
671 {
672 wavelan_scb_show(ioaddr);
673 printk("%s: Initialized WaveLAN.\n", dev->name);
674 }
675
676 wavelan_ru_start(dev);
677 wavelan_cu_start(dev);
678
679 return 0;
680 }
681
682 #if STRUCT_CHECK == 1
683
684 static
685 char *
686 wavelan_struct_check(void)
687 {
688 #define SC(t,s,n) if (sizeof(t) != s) return n
689 SC(psa_t, PSA_SIZE, "psa_t");
690 SC(mmw_t, MMW_SIZE, "mmw_t");
691 SC(mmr_t, MMR_SIZE, "mmr_t");
692 SC(ha_t, HA_SIZE, "ha_t");
693 #undef SC
694
695 return (char *)0;
696 }
697
698 #endif
699
700
701
702
703
704
705
706
707 int
708 wavelan_probe(device *dev)
709 {
710 int i;
711 short base_addr;
712 static unsigned short iobase[] =
713 {
714 #if 0
715 Leave out 0x3C0 for now -- seems to clash
716 with some video controllers.
717 Leave out the others too -- we will always
718 use 0x390 and leave 0x300 for the Ethernet device.
719 0x300, 0x390, 0x3E0, 0x3C0,
720 #endif
721 0x390,
722 };
723
724 #if STRUCT_CHECK == 1
725 if (wavelan_struct_check() != (char *)0)
726 {
727 printk("%s: structure/compiler botch: \"%s\"\n", dev->name, wavelan_struct_check());
728 return ENODEV;
729 }
730 #endif
731
732 base_addr = dev->base_addr;
733
734 if (base_addr < 0)
735
736
737
738 return ENXIO;
739
740 if (base_addr > 0x100)
741
742
743
744 return wavelan_probe1(dev, base_addr);
745
746 for (i = 0; i < nels(iobase); i++)
747 {
748 if (check_region(iobase[i], sizeof(ha_t)))
749 continue;
750
751 if (wavelan_probe1(dev, iobase[i]) == 0)
752 return 0;
753 }
754
755 return ENODEV;
756 }
757
758 static
759 int
760 wavelan_probe1(device *dev, unsigned short ioaddr)
761 {
762 psa_t psa;
763 int irq;
764 int i;
765 net_local *lp;
766
767 wavelan_reset(ioaddr);
768
769 psa_read(ioaddr, HACR_DEFAULT, 0, (unsigned char *)&psa, sizeof(psa));
770
771
772
773
774
775 if
776 (
777 psa.psa_univ_mac_addr[0] != SA_ADDR0
778 ||
779 psa.psa_univ_mac_addr[1] != SA_ADDR1
780 ||
781 psa.psa_univ_mac_addr[2] != SA_ADDR2
782 )
783 return ENODEV;
784
785 printk("%s: WaveLAN at %#x,", dev->name, ioaddr);
786
787 if ((irq = wavelan_map_irq(ioaddr, psa.psa_int_req_no)) == -1)
788 {
789 printk(" could not wavelan_map_irq(0x%x, %d).\n", ioaddr, psa.psa_int_req_no);
790 return EAGAIN;
791 }
792
793 dev->irq = irq;
794
795 request_region(ioaddr, sizeof(ha_t), "wavelan");
796 dev->base_addr = ioaddr;
797
798
799
800
801
802
803 if (dev->mem_start != 0)
804 {
805 psa.psa_nwid[0] = (dev->mem_start >> 8) & 0xFF;
806 psa.psa_nwid[1] = (dev->mem_start >> 0) & 0xFF;
807 }
808
809 dev->mem_start = 0x0000;
810 dev->mem_end = 0x0000;
811 dev->if_port = 0;
812
813 memcpy(&dev->dev_addr[0], &psa.psa_univ_mac_addr[0], WAVELAN_ADDR_SIZE);
814
815 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
816 printk("%s%02x", (i == 0) ? " " : ":", dev->dev_addr[i]);
817
818 printk(", IRQ %d", dev->irq);
819 printk(", nwid 0x%02x%02x", psa.psa_nwid[0], psa.psa_nwid[1]);
820
821 printk(", PC");
822 switch (psa.psa_comp_number)
823 {
824 case PSA_COMP_PC_AT_915:
825 case PSA_COMP_PC_AT_2400:
826 printk("-AT");
827 break;
828
829 case PSA_COMP_PC_MC_915:
830 case PSA_COMP_PC_MC_2400:
831 printk("-MC");
832 break;
833
834 case PSA_COMP_PCMCIA_915:
835 printk("MCIA");
836 break;
837
838 default:
839 printk("???");
840 break;
841 }
842
843 printk(", ");
844 switch (psa.psa_subband)
845 {
846 case PSA_SUBBAND_915:
847 printk("915");
848 break;
849
850 case PSA_SUBBAND_2425:
851 printk("2425");
852 break;
853
854 case PSA_SUBBAND_2460:
855 printk("2460");
856 break;
857
858 case PSA_SUBBAND_2484:
859 printk("2484");
860 break;
861
862 case PSA_SUBBAND_2430_5:
863 printk("2430.5");
864 break;
865
866 default:
867 printk("???");
868 break;
869 }
870 printk(" MHz");
871
872 printk("\n");
873
874 if (wavelan_debug)
875 printk(version);
876
877 dev->priv = kmalloc(sizeof(net_local), GFP_KERNEL);
878 memset(dev->priv, 0x00, sizeof(net_local));
879 lp = (net_local *)dev->priv;
880
881 if (first_wavelan == (net_local *)0)
882 {
883 first_wavelan = lp;
884 lp->prev = lp;
885 lp->next = lp;
886 }
887 else
888 {
889 lp->prev = first_wavelan->prev;
890 lp->next = first_wavelan;
891 first_wavelan->prev->next = lp;
892 first_wavelan->prev = lp;
893 }
894 lp->dev = dev;
895
896 lp->hacr = HACR_DEFAULT;
897
898 lp->nwid[0] = psa.psa_nwid[0];
899 lp->nwid[1] = psa.psa_nwid[1];
900
901 lp->watchdog.function = wavelan_watchdog;
902 lp->watchdog.data = (unsigned long)dev;
903
904 dev->open = wavelan_open;
905 dev->stop = wavelan_close;
906 dev->hard_start_xmit = wavelan_send_packet;
907 dev->get_stats = wavelan_get_stats;
908 dev->set_multicast_list = &wavelan_set_multicast_list;
909
910
911
912
913
914 ether_setup(dev);
915
916 dev->mtu = WAVELAN_MTU;
917
918 return 0;
919 }
920
921
922
923
924
925 static
926 void
927 wavelan_ru_start(device *dev)
928 {
929 unsigned short ioaddr;
930 net_local *lp;
931 unsigned short scb_cs;
932 fd_t fd;
933 rbd_t rbd;
934 unsigned short rx;
935 unsigned short rx_next;
936 int i;
937
938 ioaddr = dev->base_addr;
939 lp = (net_local *)dev->priv;
940
941 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
942 if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY)
943 return;
944
945 lp->rx_head = OFFSET_RU;
946
947 for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next)
948 {
949 rx_next = (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ;
950
951 fd.fd_status = 0;
952 fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0;
953 fd.fd_link_offset = rx_next;
954 fd.fd_rbd_offset = rx + sizeof(fd);
955 obram_write(ioaddr, rx, (unsigned char *)&fd, sizeof(fd));
956
957 rbd.rbd_status = 0;
958 rbd.rbd_next_rbd_offset = I82586NULL;
959 rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd);
960 rbd.rbd_bufh = 0;
961 rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ);
962 obram_write(ioaddr, rx + sizeof(fd), (unsigned char *)&rbd, sizeof(rbd));
963
964 lp->rx_last = rx;
965 }
966
967 obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset), (unsigned char *)&lp->rx_head, sizeof(lp->rx_head));
968
969 scb_cs = SCB_CMD_RUC_GO;
970 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
971
972 set_chan_attn(ioaddr, lp->hacr);
973
974 for (i = 1000; i > 0; i--)
975 {
976 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
977 if (scb_cs == 0)
978 break;
979
980 udelay(1000);
981 }
982
983 if (i <= 0)
984 printk("%s: wavelan_ru_start(): board not accepting command.\n", dev->name);
985 }
986
987
988
989
990
991
992 static
993 void
994 wavelan_cu_start(device *dev)
995 {
996 unsigned short ioaddr;
997 net_local *lp;
998 int i;
999 unsigned short txblock;
1000 unsigned short first_nop;
1001 unsigned short scb_cs;
1002
1003 ioaddr = dev->base_addr;
1004 lp = (net_local *)dev->priv;
1005
1006 lp->tx_first_free = OFFSET_CU;
1007 lp->tx_first_in_use = I82586NULL;
1008
1009 for
1010 (
1011 i = 0, txblock = OFFSET_CU;
1012 i < NTXBLOCKS;
1013 i++, txblock += TXBLOCKZ
1014 )
1015 {
1016 ac_tx_t tx;
1017 ac_nop_t nop;
1018 tbd_t tbd;
1019 unsigned short tx_addr;
1020 unsigned short nop_addr;
1021 unsigned short tbd_addr;
1022 unsigned short buf_addr;
1023
1024 tx_addr = txblock;
1025 nop_addr = tx_addr + sizeof(tx);
1026 tbd_addr = nop_addr + sizeof(nop);
1027 buf_addr = tbd_addr + sizeof(tbd);
1028
1029 tx.tx_h.ac_status = 0;
1030 tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I;
1031 tx.tx_h.ac_link = nop_addr;
1032 tx.tx_tbd_offset = tbd_addr;
1033 obram_write(ioaddr, tx_addr, (unsigned char *)&tx, sizeof(tx));
1034
1035 nop.nop_h.ac_status = 0;
1036 nop.nop_h.ac_command = acmd_nop;
1037 nop.nop_h.ac_link = nop_addr;
1038 obram_write(ioaddr, nop_addr, (unsigned char *)&nop, sizeof(nop));
1039
1040 tbd.tbd_status = TBD_STATUS_EOF;
1041 tbd.tbd_next_bd_offset = I82586NULL;
1042 tbd.tbd_bufl = buf_addr;
1043 tbd.tbd_bufh = 0;
1044 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1045 }
1046
1047 first_nop = OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t);
1048 obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset), (unsigned char *)&first_nop, sizeof(first_nop));
1049
1050 scb_cs = SCB_CMD_CUC_GO;
1051 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1052
1053 set_chan_attn(ioaddr, lp->hacr);
1054
1055 for (i = 1000; i > 0; i--)
1056 {
1057 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1058 if (scb_cs == 0)
1059 break;
1060
1061 udelay(1000);
1062 }
1063
1064 if (i <= 0)
1065 printk("%s: wavelan_cu_start(): board not accepting command.\n", dev->name);
1066
1067 lp->tx_n_in_use = 0;
1068 dev->tbusy = 0;
1069 }
1070
1071 static
1072 int
1073 wavelan_open(device *dev)
1074 {
1075 unsigned short ioaddr;
1076 net_local *lp;
1077
1078 ioaddr = dev->base_addr;
1079 lp = (net_local *)dev->priv;
1080
1081 if (dev->irq == 0)
1082 return -ENXIO;
1083
1084 if
1085 (
1086 irq2dev_map[dev->irq] != (device *)0
1087
1088 ||
1089 (irq2dev_map[dev->irq] = dev) == (device *)0
1090 ||
1091 request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN") != 0
1092 )
1093 {
1094 irq2dev_map[dev->irq] = (device *)0;
1095 return -EAGAIN;
1096 }
1097
1098 if (wavelan_hardware_reset(dev) == -1)
1099 {
1100 free_irq(dev->irq);
1101 irq2dev_map[dev->irq] = (device *)0;
1102 return -EAGAIN;
1103 }
1104
1105 dev->interrupt = 0;
1106 dev->start = 1;
1107
1108 #if defined(MODULE)
1109 MOD_INC_USE_COUNT;
1110 #endif
1111
1112 return 0;
1113 }
1114
1115 static
1116 void
1117 hardware_send_packet(device *dev, void *buf, short length)
1118 {
1119 unsigned short ioaddr;
1120 net_local *lp;
1121 unsigned short txblock;
1122 unsigned short txpred;
1123 unsigned short tx_addr;
1124 unsigned short nop_addr;
1125 unsigned short tbd_addr;
1126 unsigned short buf_addr;
1127 ac_tx_t tx;
1128 ac_nop_t nop;
1129 tbd_t tbd;
1130 unsigned long x;
1131
1132 ioaddr = dev->base_addr;
1133 lp = (net_local *)dev->priv;
1134
1135 x = wavelan_splhi();
1136
1137 txblock = lp->tx_first_free;
1138 txpred = txblock - TXBLOCKZ;
1139 if (txpred < OFFSET_CU)
1140 txpred += NTXBLOCKS * TXBLOCKZ;
1141 lp->tx_first_free += TXBLOCKZ;
1142 if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1143 lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
1144
1145
1146
1147
1148
1149
1150 lp->tx_n_in_use++;
1151
1152 tx_addr = txblock;
1153 nop_addr = tx_addr + sizeof(tx);
1154 tbd_addr = nop_addr + sizeof(nop);
1155 buf_addr = tbd_addr + sizeof(tbd);
1156
1157
1158
1159
1160 tx.tx_h.ac_status = 0;
1161 obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status), (unsigned char *)&tx.tx_h.ac_status, sizeof(tx.tx_h.ac_status));
1162
1163
1164
1165
1166 nop.nop_h.ac_status = 0;
1167 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1168 nop.nop_h.ac_link = nop_addr;
1169 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1170
1171
1172
1173
1174 tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & length);
1175 tbd.tbd_next_bd_offset = I82586NULL;
1176 tbd.tbd_bufl = buf_addr;
1177 tbd.tbd_bufh = 0;
1178 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1179
1180
1181
1182
1183 obram_write(ioaddr, buf_addr, buf, length);
1184
1185
1186
1187
1188
1189 nop_addr = txpred + sizeof(tx);
1190 nop.nop_h.ac_status = 0;
1191 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1192 nop.nop_h.ac_link = txblock;
1193 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1194
1195 if (lp->tx_first_in_use == I82586NULL)
1196 lp->tx_first_in_use = txblock;
1197
1198 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1199 dev->tbusy = 0;
1200
1201 dev->trans_start = jiffies;
1202
1203 if (lp->watchdog.next == (timer_list *)0)
1204 wavelan_watchdog((unsigned long)dev);
1205
1206 wavelan_splx(x);
1207
1208 if (wavelan_debug > 4)
1209 {
1210 unsigned char *a;
1211
1212 a = (unsigned char *)buf;
1213
1214 printk
1215 (
1216 "%s: tx: dest %02x:%02x:%02x:%02x:%02x:%02x, length %d, tbd.tbd_bufl 0x%x.\n",
1217 dev->name,
1218 a[0], a[1], a[2], a[3], a[4], a[5],
1219 length,
1220 buf_addr
1221 );
1222 }
1223 }
1224
1225 static
1226 int
1227 wavelan_send_packet(struct sk_buff *skb, device *dev)
1228 {
1229 unsigned short ioaddr;
1230
1231 ioaddr = dev->base_addr;
1232
1233 if (dev->tbusy)
1234 {
1235
1236
1237
1238
1239 int tickssofar;
1240
1241 tickssofar = jiffies - dev->trans_start;
1242
1243
1244
1245
1246
1247
1248
1249
1250 return 1;
1251
1252 wavelan_scb_show(ioaddr);
1253 wavelan_ru_show(dev);
1254 wavelan_cu_show(dev);
1255 wavelan_dev_show(dev);
1256 wavelan_local_show(dev);
1257
1258 printk("%s: transmit timed out -- resetting board.\n", dev->name);
1259
1260 (void)wavelan_hardware_reset(dev);
1261 }
1262
1263
1264
1265
1266
1267
1268 if (skb == (struct sk_buff *)0)
1269 {
1270 dev_tint(dev);
1271 return 0;
1272 }
1273
1274
1275
1276
1277 if (set_bit(0, (void *)&dev->tbusy) == 0)
1278 {
1279 short length;
1280 unsigned char *buf;
1281
1282 length = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
1283 buf = skb->data;
1284
1285 hardware_send_packet(dev, buf, length);
1286 }
1287 else
1288 printk("%s: Transmitter access conflict.\n", dev->name);
1289
1290 dev_kfree_skb(skb, FREE_WRITE);
1291
1292 return 0;
1293 }
1294
1295 #if 0
1296 static
1297 int
1298 addrcmp(unsigned char *a0, unsigned char *a1)
1299 {
1300 int i;
1301
1302 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1303 {
1304 if (a0[i] != a1[i])
1305 return a0[i] - a1[i];
1306 }
1307
1308 return 0;
1309 }
1310 #endif
1311
1312
1313
1314
1315
1316
1317 static
1318 void
1319 wavelan_receive(device *dev)
1320 {
1321 unsigned short ioaddr;
1322 net_local *lp;
1323 int nreaped;
1324
1325 ioaddr = dev->base_addr;
1326 lp = (net_local *)dev->priv;
1327 nreaped = 0;
1328
1329 for (;;)
1330 {
1331 fd_t fd;
1332 rbd_t rbd;
1333 ushort pkt_len;
1334 int sksize;
1335 struct sk_buff *skb;
1336
1337 obram_read(ioaddr, lp->rx_head, (unsigned char *)&fd, sizeof(fd));
1338
1339 if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C)
1340 break;
1341
1342 nreaped++;
1343
1344 if
1345 (
1346 (fd.fd_status & (FD_STATUS_B | FD_STATUS_OK))
1347 !=
1348 (FD_STATUS_B | FD_STATUS_OK)
1349 )
1350 {
1351
1352
1353
1354
1355
1356
1357
1358 if ((fd.fd_status & FD_STATUS_OK) != FD_STATUS_OK)
1359 printk("%s: frame not received successfully.\n", dev->name);
1360 }
1361
1362 if ((fd.fd_status & (FD_STATUS_S6 | FD_STATUS_S7 | FD_STATUS_S8 | FD_STATUS_S9 | FD_STATUS_S10 | FD_STATUS_S11)) != 0)
1363 {
1364 lp->stats.rx_errors++;
1365
1366 if ((fd.fd_status & FD_STATUS_S6) != 0)
1367 printk("%s: no EOF flag.\n", dev->name);
1368
1369 if ((fd.fd_status & FD_STATUS_S7) != 0)
1370 {
1371 lp->stats.rx_length_errors++;
1372 printk("%s: frame too short.\n", dev->name);
1373 }
1374
1375 if ((fd.fd_status & FD_STATUS_S8) != 0)
1376 {
1377 lp->stats.rx_over_errors++;
1378 printk("%s: rx DMA overrun.\n", dev->name);
1379 }
1380
1381 if ((fd.fd_status & FD_STATUS_S9) != 0)
1382 {
1383 lp->stats.rx_fifo_errors++;
1384 printk("%s: ran out of resources.\n", dev->name);
1385 }
1386
1387 if ((fd.fd_status & FD_STATUS_S10) != 0)
1388 {
1389 lp->stats.rx_frame_errors++;
1390 printk("%s: alignment error.\n", dev->name);
1391 }
1392
1393 if ((fd.fd_status & FD_STATUS_S11) != 0)
1394 {
1395 lp->stats.rx_crc_errors++;
1396 printk("%s: CRC error.\n", dev->name);
1397 }
1398 }
1399
1400 if (fd.fd_rbd_offset == I82586NULL)
1401 printk("%s: frame has no data.\n", dev->name);
1402 else
1403 {
1404 obram_read(ioaddr, fd.fd_rbd_offset, (unsigned char *)&rbd, sizeof(rbd));
1405
1406 if ((rbd.rbd_status & RBD_STATUS_EOF) != RBD_STATUS_EOF)
1407 printk("%s: missing EOF flag.\n", dev->name);
1408
1409 if ((rbd.rbd_status & RBD_STATUS_F) != RBD_STATUS_F)
1410 printk("%s: missing F flag.\n", dev->name);
1411
1412 pkt_len = rbd.rbd_status & RBD_STATUS_ACNT;
1413
1414 #if 0
1415 {
1416 unsigned char addr[WAVELAN_ADDR_SIZE];
1417 int i;
1418 static unsigned char toweraddr[WAVELAN_ADDR_SIZE] =
1419 {
1420 0x08, 0x00, 0x0e, 0x20, 0x3e, 0xd3,
1421 };
1422
1423 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1424 if
1425 (
1426
1427
1428
1429
1430 addrcmp(&addr[0], toweraddr) != 0
1431 )
1432 {
1433 printk("%s: foreign MAC source addr=", dev->name);
1434 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1435 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1436 printk("\n");
1437 }
1438 }
1439 #endif
1440
1441 if (wavelan_debug > 0)
1442 {
1443 unsigned char addr[WAVELAN_ADDR_SIZE];
1444 unsigned short ltype;
1445 int i;
1446
1447 #if 0
1448 printk("%s: fd_dest=", dev->name);
1449 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1450 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_dest[i]);
1451 printk("\n");
1452
1453 printk("%s: fd_src=", dev->name);
1454 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1455 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_src[i]);
1456 printk("\n");
1457 printk("%s: fd_length=%d\n", dev->name, fd.fd_length);
1458 #endif
1459
1460 obram_read(ioaddr, rbd.rbd_bufl, &addr[0], sizeof(addr));
1461 printk("%s: dest=", dev->name);
1462 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1463 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1464 printk("\n");
1465
1466 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1467 printk("%s: src=", dev->name);
1468 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1469 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1470 printk("\n");
1471
1472 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr) * 2, (unsigned char *)<ype, sizeof(ltype));
1473 printk("%s: ntohs(length/type)=0x%04x\n", dev->name, ntohs(ltype));
1474 }
1475
1476 sksize = pkt_len;
1477
1478 if ((skb = alloc_skb(sksize, GFP_ATOMIC)) == (struct sk_buff *)0)
1479 {
1480 printk("%s: could not alloc_skb(%d, GFP_ATOMIC).\n", dev->name, sksize);
1481 lp->stats.rx_dropped++;
1482 }
1483 else
1484 {
1485 skb->len = pkt_len;
1486 skb->dev = dev;
1487
1488 obram_read(ioaddr, rbd.rbd_bufl, skb->data, pkt_len);
1489
1490 if (wavelan_debug > 5)
1491 {
1492 int i;
1493 int maxi;
1494
1495 printk("%s: pkt_len=%d, data=\"", dev->name, pkt_len);
1496
1497 if ((maxi = pkt_len) > 16)
1498 maxi = 16;
1499
1500 for (i = 0; i < maxi; i++)
1501 {
1502 unsigned char c;
1503
1504 c = skb->data[i];
1505 if (c >= ' ' && c <= '~')
1506 printk(" %c", skb->data[i]);
1507 else
1508 printk("%02x", skb->data[i]);
1509 }
1510
1511 if (maxi < pkt_len)
1512 printk("..");
1513
1514 printk("\"\n\n");
1515 }
1516
1517 netif_rx(skb);
1518
1519 lp->stats.rx_packets++;
1520 }
1521 }
1522
1523 fd.fd_status = 0;
1524 obram_write(ioaddr, fdoff(lp->rx_head, fd_status), (unsigned char *)&fd.fd_status, sizeof(fd.fd_status));
1525
1526 fd.fd_command = FD_COMMAND_EL;
1527 obram_write(ioaddr, fdoff(lp->rx_head, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1528
1529 fd.fd_command = 0;
1530 obram_write(ioaddr, fdoff(lp->rx_last, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1531
1532 lp->rx_last = lp->rx_head;
1533 lp->rx_head = fd.fd_link_offset;
1534 }
1535
1536
1537
1538
1539
1540 }
1541
1542
1543
1544
1545
1546 static
1547 int
1548 wavelan_complete(device *dev, unsigned short ioaddr, net_local *lp)
1549 {
1550 int nreaped;
1551
1552 nreaped = 0;
1553
1554 for (;;)
1555 {
1556 unsigned short tx_status;
1557
1558 if (lp->tx_first_in_use == I82586NULL)
1559 break;
1560
1561 obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status), (unsigned char *)&tx_status, sizeof(tx_status));
1562
1563 if ((tx_status & AC_SFLD_C) == 0)
1564 break;
1565
1566 nreaped++;
1567
1568 --lp->tx_n_in_use;
1569
1570
1571
1572
1573
1574
1575 if (lp->tx_n_in_use <= 0)
1576 lp->tx_first_in_use = I82586NULL;
1577 else
1578 {
1579 lp->tx_first_in_use += TXBLOCKZ;
1580 if (lp->tx_first_in_use >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1581 lp->tx_first_in_use -= NTXBLOCKS * TXBLOCKZ;
1582 }
1583
1584 if (tx_status & AC_SFLD_OK)
1585 {
1586 int ncollisions;
1587
1588 lp->stats.tx_packets++;
1589 ncollisions = tx_status & AC_SFLD_MAXCOL;
1590 lp->stats.collisions += ncollisions;
1591
1592
1593
1594
1595 }
1596 else
1597 {
1598 lp->stats.tx_errors++;
1599 if (tx_status & AC_SFLD_S10)
1600 {
1601 lp->stats.tx_carrier_errors++;
1602 if (wavelan_debug > 0)
1603 printk("%s: tx error: no CS.\n", dev->name);
1604 }
1605 if (tx_status & AC_SFLD_S9)
1606 {
1607 lp->stats.tx_carrier_errors++;
1608 printk("%s: tx error: lost CTS.\n", dev->name);
1609 }
1610 if (tx_status & AC_SFLD_S8)
1611 {
1612 lp->stats.tx_fifo_errors++;
1613 printk("%s: tx error: slow DMA.\n", dev->name);
1614 }
1615 if (tx_status & AC_SFLD_S6)
1616 {
1617 lp->stats.tx_heartbeat_errors++;
1618 if (wavelan_debug > 0)
1619 printk("%s: tx error: heart beat.\n", dev->name);
1620 }
1621 if (tx_status & AC_SFLD_S5)
1622 {
1623 lp->stats.tx_aborted_errors++;
1624 if (wavelan_debug > 0)
1625 printk("%s: tx error: too many collisions.\n", dev->name);
1626 }
1627 }
1628
1629 if (wavelan_debug > 5)
1630 printk("%s: tx completed, tx_status 0x%04x.\n", dev->name, tx_status);
1631 }
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1642 {
1643 dev->tbusy = 0;
1644 mark_bh(NET_BH);
1645 }
1646
1647 return nreaped;
1648 }
1649
1650 static
1651 void
1652 wavelan_watchdog(unsigned long a)
1653 {
1654 device *dev;
1655 net_local *lp;
1656 unsigned short ioaddr;
1657 unsigned long x;
1658 unsigned int nreaped;
1659
1660 x = wavelan_splhi();
1661
1662 dev = (device *)a;
1663 ioaddr = dev->base_addr;
1664 lp = (net_local *)dev->priv;
1665
1666 if (lp->tx_n_in_use <= 0)
1667 {
1668 wavelan_splx(x);
1669 return;
1670 }
1671
1672 lp->watchdog.expires = WATCHDOG_JIFFIES;
1673 add_timer(&lp->watchdog);
1674
1675 if (jiffies - dev->trans_start < WATCHDOG_JIFFIES)
1676 {
1677 wavelan_splx(x);
1678 return;
1679 }
1680
1681 nreaped = wavelan_complete(dev, ioaddr, lp);
1682
1683 printk("%s: warning: wavelan_watchdog(): %d reaped, %d remain.\n", dev->name, nreaped, lp->tx_n_in_use);
1684
1685
1686
1687
1688
1689
1690
1691
1692 wavelan_splx(x);
1693 }
1694
1695 static
1696 void
1697 wavelan_interrupt(int irq, struct pt_regs *regs)
1698 {
1699 device *dev;
1700 unsigned short ioaddr;
1701 net_local *lp;
1702 unsigned short hasr;
1703 unsigned short status;
1704 unsigned short ack_cmd;
1705
1706 if ((dev = (device *)(irq2dev_map[irq])) == (device *)0)
1707 {
1708 printk("wavelan_interrupt(): irq %d for unknown device.\n", irq);
1709 return;
1710 }
1711
1712 ioaddr = dev->base_addr;
1713 lp = (net_local *)dev->priv;
1714
1715 dev->interrupt = 1;
1716
1717 if ((hasr = hasr_read(ioaddr)) & HASR_MMC_INTR)
1718 {
1719 unsigned char dce_status;
1720
1721
1722
1723
1724
1725 mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status, sizeof(dce_status));
1726 if (wavelan_debug > 4)
1727 printk("%s: warning: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n", dev->name, dce_status);
1728 }
1729
1730 if ((hasr & HASR_82586_INTR) == 0)
1731 {
1732 dev->interrupt = 0;
1733 if (wavelan_debug > 4)
1734 printk("%s: warning: wavelan_interrupt() but (hasr & HASR_82586_INTR) == 0.\n", dev->name);
1735 return;
1736 }
1737
1738 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&status, sizeof(status));
1739
1740
1741
1742
1743 ack_cmd = status & SCB_ST_INT;
1744
1745 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&ack_cmd, sizeof(ack_cmd));
1746
1747 set_chan_attn(ioaddr, lp->hacr);
1748
1749 if (wavelan_debug > 4)
1750 printk("%s: interrupt, status 0x%04x.\n", dev->name, status);
1751
1752 if ((status & SCB_ST_CX) == SCB_ST_CX)
1753 {
1754
1755
1756
1757 if (wavelan_debug > 5)
1758 printk("%s: command completed.\n", dev->name);
1759 (void)wavelan_complete(dev, ioaddr, lp);
1760 }
1761
1762 if ((status & SCB_ST_FR) == SCB_ST_FR)
1763 {
1764
1765
1766
1767 if (wavelan_debug > 5)
1768 printk("%s: received packet.\n", dev->name);
1769 wavelan_receive(dev);
1770 }
1771
1772 if
1773 (
1774 (status & SCB_ST_CNA) == SCB_ST_CNA
1775 ||
1776 (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) && dev->start)
1777 )
1778 {
1779 printk("%s: warning: CU inactive -- restarting.\n", dev->name);
1780
1781 (void)wavelan_hardware_reset(dev);
1782 }
1783
1784 if
1785 (
1786 (status & SCB_ST_RNR) == SCB_ST_RNR
1787 ||
1788 (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) && dev->start)
1789 )
1790 {
1791 printk("%s: warning: RU not ready -- restarting.\n", dev->name);
1792
1793 (void)wavelan_hardware_reset(dev);
1794 }
1795
1796 dev->interrupt = 0;
1797 }
1798
1799 static
1800 int
1801 wavelan_close(device *dev)
1802 {
1803 unsigned short ioaddr;
1804 net_local *lp;
1805 unsigned short scb_cmd;
1806
1807 ioaddr = dev->base_addr;
1808 lp = (net_local *)dev->priv;
1809
1810 dev->tbusy = 1;
1811 dev->start = 0;
1812
1813
1814
1815
1816 scb_cmd = (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC & SCB_CMD_RUC_SUS);
1817 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
1818 set_chan_attn(ioaddr, lp->hacr);
1819
1820 wavelan_ints_off(dev);
1821
1822 free_irq(dev->irq);
1823 irq2dev_map[dev->irq] = (device *)0;
1824
1825
1826
1827
1828 release_region(ioaddr, sizeof(ha_t));
1829
1830 #if defined(MODULE)
1831 MOD_DEC_USE_COUNT;
1832 #endif
1833
1834 return 0;
1835 }
1836
1837
1838
1839
1840
1841 static
1842 en_stats *
1843 wavelan_get_stats(device *dev)
1844 {
1845 net_local *lp;
1846
1847 lp = (net_local *)dev->priv;
1848
1849 return &lp->stats;
1850 }
1851
1852 static
1853 void
1854 wavelan_set_multicast_list(device *dev, int num_addrs, void *addrs)
1855 {
1856 net_local *lp;
1857 unsigned long x;
1858
1859 lp = (net_local *)dev->priv;
1860
1861 switch (num_addrs)
1862 {
1863 case -1:
1864
1865
1866
1867 lp->promiscuous = 1;
1868 x = wavelan_splhi();
1869 (void)wavelan_hardware_reset(dev);
1870 wavelan_splx(x);
1871 break;
1872
1873 case 0:
1874
1875
1876
1877
1878 lp->promiscuous = 0;
1879 x = wavelan_splhi();
1880 (void)wavelan_hardware_reset(dev);
1881 wavelan_splx(x);
1882 break;
1883
1884 default:
1885
1886
1887
1888
1889 break;
1890 }
1891 }
1892
1893
1894
1895
1896
1897 static
1898 int
1899 sprintf_stats(char *buffer, device *dev)
1900 {
1901 net_local *lp;
1902 unsigned char v;
1903 mmr_t m;
1904
1905 lp = (net_local *)dev->priv;
1906
1907 if (lp == (net_local *)0)
1908 return sprintf(buffer, "%6s: No statistics available.\n", dev->name);
1909
1910 v = (unsigned char)1;
1911 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
1912
1913 mmc_read(dev->base_addr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, sizeof(m.mmr_dce_status));
1914 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_h), &m.mmr_correct_nwid_h, sizeof(m.mmr_correct_nwid_h));
1915 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_l), &m.mmr_correct_nwid_l, sizeof(m.mmr_correct_nwid_l));
1916 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_h), &m.mmr_wrong_nwid_h, sizeof(m.mmr_wrong_nwid_h));
1917 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, sizeof(m.mmr_wrong_nwid_l));
1918 mmc_read(dev->base_addr, mmroff(0, mmr_signal_lvl), &m.mmr_signal_lvl, sizeof(m.mmr_signal_lvl));
1919 mmc_read(dev->base_addr, mmroff(0, mmr_silence_lvl), &m.mmr_silence_lvl, sizeof(m.mmr_silence_lvl));
1920 mmc_read(dev->base_addr, mmroff(0, mmr_sgnl_qual), &m.mmr_sgnl_qual, sizeof(m.mmr_sgnl_qual));
1921
1922 v = (unsigned char)0;
1923 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
1924
1925 lp->correct_nwid += (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l;
1926 lp->wrong_nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
1927
1928 return sprintf
1929 (
1930 buffer,
1931 "%6s: %02x %08x %08x %02x %02x %02x %02x %u\n",
1932 dev->name,
1933 m.mmr_dce_status,
1934 lp->correct_nwid,
1935 lp->wrong_nwid,
1936 m.mmr_signal_lvl,
1937 m.mmr_silence_lvl,
1938 m.mmr_sgnl_qual,
1939 lp->tx_n_in_use,
1940 lp->nresets
1941 );
1942 }
1943
1944 int
1945 wavelan_get_info(char *buffer, char **start, off_t offset, int length)
1946 {
1947 int len;
1948 off_t begin;
1949 off_t pos;
1950 int size;
1951 unsigned long x;
1952
1953 len = 0;
1954 begin = 0;
1955 pos = 0;
1956
1957 size = sprintf(buffer, "%s", "Iface | dce +nwid -nwid lvl slnc qual ntxq nrst\n");
1958
1959 pos += size;
1960 len += size;
1961
1962 x = wavelan_splhi();
1963
1964 if (first_wavelan != (net_local *)0)
1965 {
1966 net_local *lp;
1967
1968 lp = first_wavelan;
1969 do
1970 {
1971 size = sprintf_stats(buffer + len, lp->dev);
1972
1973 len += size;
1974 pos = begin + len;
1975
1976 if (pos < offset)
1977 {
1978 len = 0;
1979 begin = pos;
1980 }
1981
1982 if (pos > offset + length)
1983 break;
1984 }
1985 while ((lp = lp->next) != first_wavelan);
1986 }
1987
1988 wavelan_splx(x);
1989
1990 *start = buffer + (offset - begin);
1991 len -= (offset - begin);
1992 if (len > length)
1993 len = length;
1994
1995 return len;
1996 }
1997
1998 #if defined(MODULE)
1999 char kernel_version[] = UTS_RELEASE;
2000 static struct device dev_wavelan =
2001 {
2002 " " ,
2003 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, wavelan_probe
2004 };
2005
2006 int
2007 init_module(void)
2008 {
2009 if (register_netdev(&dev_wavelan) != 0)
2010 return -EIO;
2011 return 0;
2012 }
2013
2014 void
2015 cleanup_module(void)
2016 {
2017 if (MOD_IN_USE)
2018 printk("wavelan: device busy, remove delayed\n");
2019 else
2020 {
2021 unregister_netdev(&dev_wavelan);
2022 kfree_s(dev_wavelan.priv, sizeof(struct net_local));
2023 dev_wavelan.priv = NULL;
2024 }
2025 }
2026 #endif
2027
2028 static
2029 void
2030 wavelan_cu_show_one(device *dev, net_local *lp, int i, unsigned short p)
2031 {
2032 unsigned short ioaddr;
2033 ac_tx_t actx;
2034
2035 ioaddr = dev->base_addr;
2036
2037 printk("%d: 0x%x:", i, p);
2038
2039 obram_read(ioaddr, p, (unsigned char *)&actx, sizeof(actx));
2040 printk(" status=0x%x,", actx.tx_h.ac_status);
2041 printk(" command=0x%x,", actx.tx_h.ac_command);
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052 printk("|");
2053 }
2054
2055 #if 0
2056 static
2057 void
2058 wavelan_psa_show(psa_t *p)
2059 {
2060 printk("psa:");
2061
2062 printk("psa_io_base_addr_1: 0x%02x,", p->psa_io_base_addr_1);
2063 printk("psa_io_base_addr_2: 0x%02x,", p->psa_io_base_addr_2);
2064 printk("psa_io_base_addr_3: 0x%02x,", p->psa_io_base_addr_3);
2065 printk("psa_io_base_addr_4: 0x%02x,", p->psa_io_base_addr_4);
2066 printk("psa_rem_boot_addr_1: 0x%02x,", p->psa_rem_boot_addr_1);
2067 printk("psa_rem_boot_addr_2: 0x%02x,", p->psa_rem_boot_addr_2);
2068 printk("psa_rem_boot_addr_3: 0x%02x,", p->psa_rem_boot_addr_3);
2069 printk("psa_holi_params: 0x%02x,", p->psa_holi_params);
2070 printk("psa_int_req_no: %d,", p->psa_int_req_no);
2071 printk
2072 (
2073 "psa_univ_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2074 p->psa_univ_mac_addr[0],
2075 p->psa_univ_mac_addr[1],
2076 p->psa_univ_mac_addr[2],
2077 p->psa_univ_mac_addr[3],
2078 p->psa_univ_mac_addr[4],
2079 p->psa_univ_mac_addr[5]
2080 );
2081 printk
2082 (
2083 "psa_local_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2084 p->psa_local_mac_addr[0],
2085 p->psa_local_mac_addr[1],
2086 p->psa_local_mac_addr[2],
2087 p->psa_local_mac_addr[3],
2088 p->psa_local_mac_addr[4],
2089 p->psa_local_mac_addr[5]
2090 );
2091 printk("psa_univ_local_sel: %d,", p->psa_univ_local_sel);
2092 printk("psa_comp_number: %d,", p->psa_comp_number);
2093 printk("psa_thr_pre_set: 0x%02x,", p->psa_thr_pre_set);
2094 printk("psa_feature_select/decay_prm: 0x%02x,", p->psa_feature_select);
2095 printk("psa_subband/decay_update_prm: %d,", p->psa_subband);
2096 printk("psa_quality_thr: 0x%02x,", p->psa_quality_thr);
2097 printk("psa_mod_delay: 0x%02x,", p->psa_mod_delay);
2098 printk("psa_nwid: 0x%02x%02x,", p->psa_nwid[0], p->psa_nwid[1]);
2099 printk("psa_undefined: %d,", p->psa_undefined);
2100 printk("psa_encryption_select: %d,", p->psa_encryption_select);
2101 printk
2102 (
2103 "psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x,",
2104 p->psa_encryption_key[0],
2105 p->psa_encryption_key[1],
2106 p->psa_encryption_key[2],
2107 p->psa_encryption_key[3],
2108 p->psa_encryption_key[4],
2109 p->psa_encryption_key[5],
2110 p->psa_encryption_key[6],
2111 p->psa_encryption_key[7]
2112 );
2113 printk("psa_databus_width: %d,", p->psa_databus_width);
2114 printk("psa_call_code/auto_squelch: 0x%02x,", p->psa_call_code);
2115 printk("psa_no_of_retries: %d,", p->psa_no_of_retries);
2116 printk("psa_acr: %d,", p->psa_acr);
2117 printk("psa_dump_count: %d,", p->psa_dump_count);
2118 printk("psa_nwid_prefix: 0x%02x,", p->psa_nwid_prefix);
2119 printk("psa_conf_status: %d,", p->psa_conf_status);
2120 printk("psa_crc: 0x%02x%02x,", p->psa_crc[0], p->psa_crc[1]);
2121 printk("psa_crc_status: 0x%02x,", p->psa_crc_status);
2122
2123 printk("\n");
2124 }
2125
2126 static
2127 void
2128 wavelan_mmc_show(unsigned short ioaddr)
2129 {
2130 mmr_t m;
2131
2132 mmc_read(ioaddr, 0, (unsigned char *)&m, sizeof(m));
2133
2134 printk("mmr:");
2135 printk(" des_status: 0x%x", m.mmr_des_status);
2136 printk(" des_avail: 0x%x", m.mmr_des_avail);
2137 printk(" des_io_invert: 0x%x", m.mmr_des_io_invert);
2138 printk
2139 (
2140 " dce_status: 0x%x[%s%s%s%s]",
2141 m.mmr_dce_status & 0x0F,
2142 (m.mmr_dce_status & MMR_DCE_STATUS_ENERG_DET) ? "energy detected," : "",
2143 (m.mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ? "loop test indicated," : "",
2144 (m.mmr_dce_status & MMR_DCE_STATUS_XMTITR_IND) ? "transmitter on," : "",
2145 (m.mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ? "jabber timer expired," : ""
2146 );
2147 printk(" correct_nwid: %d", m.mmr_correct_nwid_h << 8 | m.mmr_correct_nwid_l);
2148 printk(" wrong_nwid: %d", (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
2149 printk(" thr_pre_set: 0x%x", m.mmr_thr_pre_set);
2150 printk(" signal_lvl: %d", m.mmr_signal_lvl);
2151 printk(" silence_lvl: %d", m.mmr_silence_lvl);
2152 printk(" sgnl_qual: 0x%x", m.mmr_sgnl_qual);
2153 printk(" netw_id_l: %x", m.mmr_netw_id_l);
2154
2155 printk("\n");
2156 }
2157 #endif
2158
2159 static
2160 void
2161 wavelan_scb_show(unsigned short ioaddr)
2162 {
2163 scb_t scb;
2164
2165 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
2166
2167 printk("scb:");
2168
2169 printk(" status:");
2170 printk
2171 (
2172 " stat 0x%x[%s%s%s%s]",
2173 (scb.scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA | SCB_ST_RNR)) >> 12,
2174 (scb.scb_status & SCB_ST_CX) ? "cmd completion interrupt," : "",
2175 (scb.scb_status & SCB_ST_FR) ? "frame received," : "",
2176 (scb.scb_status & SCB_ST_CNA) ? "cmd unit not active," : "",
2177 (scb.scb_status & SCB_ST_RNR) ? "rcv unit not ready," : ""
2178 );
2179 printk
2180 (
2181 " cus 0x%x[%s%s%s]",
2182 (scb.scb_status & SCB_ST_CUS) >> 8,
2183 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_IDLE) ? "idle" : "",
2184 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_SUSP) ? "suspended" : "",
2185 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_ACTV) ? "active" : ""
2186 );
2187 printk
2188 (
2189 " rus 0x%x[%s%s%s%s]",
2190 (scb.scb_status & SCB_ST_RUS) >> 4,
2191 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_IDLE) ? "idle" : "",
2192 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_SUSP) ? "suspended" : "",
2193 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_NRES) ? "no resources" : "",
2194 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_RDY) ? "ready" : ""
2195 );
2196
2197 printk(" command:");
2198 printk
2199 (
2200 " ack 0x%x[%s%s%s%s]",
2201 (scb.scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR | SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12,
2202 (scb.scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "",
2203 (scb.scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "",
2204 (scb.scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "",
2205 (scb.scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : ""
2206 );
2207 printk
2208 (
2209 " cuc 0x%x[%s%s%s%s%s]",
2210 (scb.scb_command & SCB_CMD_CUC) >> 8,
2211 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_NOP) ? "nop" : "",
2212 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_GO) ? "start cbl_offset" : "",
2213 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_RES) ? "resume execution" : "",
2214 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_SUS) ? "suspend execution" : "",
2215 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_ABT) ? "abort execution" : ""
2216 );
2217 printk
2218 (
2219 " ruc 0x%x[%s%s%s%s%s]",
2220 (scb.scb_command & SCB_CMD_RUC) >> 4,
2221 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_NOP) ? "nop" : "",
2222 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_GO) ? "start rfa_offset" : "",
2223 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_RES) ? "resume reception" : "",
2224 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_SUS) ? "suspend reception" : "",
2225 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_ABT) ? "abort reception" : ""
2226 );
2227
2228 printk(" cbl_offset 0x%x", scb.scb_cbl_offset);
2229 printk(" rfa_offset 0x%x", scb.scb_rfa_offset);
2230
2231 printk(" crcerrs %d", scb.scb_crcerrs);
2232 printk(" alnerrs %d", scb.scb_alnerrs);
2233 printk(" rscerrs %d", scb.scb_rscerrs);
2234 printk(" ovrnerrs %d", scb.scb_ovrnerrs);
2235
2236 printk("\n");
2237 }
2238
2239 static
2240 void
2241 wavelan_ru_show(device *dev)
2242 {
2243 net_local *lp;
2244
2245 lp = (net_local *)dev->priv;
2246
2247 printk("ru:");
2248
2249
2250
2251 printk("\n");
2252 }
2253
2254 static
2255 void
2256 wavelan_cu_show(device *dev)
2257 {
2258 net_local *lp;
2259 unsigned int i;
2260 unsigned short p;
2261
2262 lp = (net_local *)dev->priv;
2263
2264 printk("cu:");
2265 printk("\n");
2266
2267 for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++)
2268 {
2269 wavelan_cu_show_one(dev, lp, i, p);
2270
2271 p += TXBLOCKZ;
2272 if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
2273 p -= NTXBLOCKS * TXBLOCKZ;
2274 }
2275 }
2276
2277 static
2278 void
2279 wavelan_dev_show(device *dev)
2280 {
2281 printk("dev:");
2282 printk(" start=%d,", dev->start);
2283 printk(" tbusy=%d,", dev->tbusy);
2284 printk(" interrupt=%d,", dev->interrupt);
2285 printk(" trans_start=%ld,", dev->trans_start);
2286 printk(" flags=0x%x,", dev->flags);
2287 printk("\n");
2288 }
2289
2290 static
2291 void
2292 wavelan_local_show(device *dev)
2293 {
2294 net_local *lp;
2295
2296 lp = (net_local *)dev->priv;
2297
2298 printk("local:");
2299 printk(" tx_n_in_use=%d,", lp->tx_n_in_use);
2300 printk(" hacr=0x%x,", lp->hacr);
2301 printk(" rx_head=0x%x,", lp->rx_head);
2302 printk(" rx_last=0x%x,", lp->rx_last);
2303 printk(" tx_first_free=0x%x,", lp->tx_first_free);
2304 printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use);
2305 printk("\n");
2306 }
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2348 #endif