drivers/net/de4x5.c

/* */
This source file includes following definitions.
de4x5_probe
de4x5_hw_init
de4x5_open
de4x5_init
de4x5_queue_pkt
de4x5_interrupt
de4x5_rx
de4x5_tx
de4x5_close
de4x5_get_stats
load_packet
set_multicast_list
SetMulticastFilter
eisa_probe
pci_probe
alloc_device
autoconf_media
create_packet
dce_get_ticks
dce_us_delay
dce_ms_delay
EISA_signature
DevicePresent
aprom_crc
de4x5_ioctl
init_module
cleanup_module
   1 /*  de4x5.c: A DIGITAL DE425/DE434/DE435 ethernet driver for linux.
   2 
   3     Copyright 1994 Digital Equipment Corporation.
   4 
   5     This software may be used and distributed according to the terms of
   6     the GNU Public License, incorporated herein by reference.
   7 
   8     This driver is written for the Digital Equipment Corporation series
   9     of EtherWORKS ethernet cards:
  10 
  11         DE425 TP/COAX EISA
  12         DE434 TP PCI
  13         DE435 TP/COAX/AUI PCI
  14 
  15     The driver has been tested on a  relatively busy network using the DE425
  16     and DE435 cards and benchmarked with 'ttcp': it  transferred 16M of data
  17     at 1.08MB/s (8.6Mb/s) to a DECstation 5000/200.
  18 
  19     ************************************************************************
  20     However there is still a known bug which causes ttcp to hang on transmit
  21     (receive  is  OK), although  the  adapter/driver  continues to  function
  22     normally for  other applications e.g.  nfs  mounting disks, pinging etc.
  23     The cause is under investigation.
  24     ************************************************************************
  25 
  26     The author may    be  reached as davies@wanton.lkg.dec.com  or   Digital
  27     Equipment Corporation, 550 King Street, Littleton MA 01460.
  28 
  29     =========================================================================
  30     This driver has been written  substantially  from scratch, although  its
  31     inheritance of style and stack interface from 'ewrk3.c' and in turn from
  32     Donald Becker's 'lance.c' should be obvious.
  33 
  34     Upto 15 EISA cards can be supported under this driver, limited primarily
  35     by the available IRQ lines.  I have  checked different configurations of
  36     multiple depca, EtherWORKS 3 cards and de4x5 cards and  have not found a
  37     problem yet (provided you have at least depca.c v0.38) ...
  38 
  39     PCI support  has been added  to allow the  driver to work with the DE434
  40     and  DE435 cards. The I/O  accesses  are a  bit of a   kludge due to the
  41     differences  in the  EISA and PCI    CSR address offsets  from the  base
  42     address.
  43 
  44     The ability to load  this driver as a loadable  module has been included
  45     and  used extensively during the  driver development (to save those long
  46     reboot sequences).  Loadable module support under  PCI has been achieved
  47     by letting any I/O address less than 0x1000 be assigned as:
  48 
  49                        0xghh
  50 
  51     where g is the bus number (usually 0 until the BIOS's get fixed)
  52          hh is the device number (max is 32 per bus).
  53 
  54     Essentially, the I/O address and IRQ information  are ignored and filled
  55     in later by  the PCI BIOS   during the PCI  probe.  Note  that the board
  56     should be in the system at boot time so that its I/O address and IRQ are
  57     allocated by the PCI BIOS automatically. The special case of device 0 on
  58     bus 0  is  not allowed  as  the probe  will think   you're autoprobing a
  59     module.
  60 
  61     To utilise this ability, you have to do 8 things:
  62 
  63     0) have a copy of the loadable modules code installed on your system.
  64     1) copy de4x5.c from the  /linux/drivers/net directory to your favourite
  65     temporary directory.
  66     2) edit the  source code near  line 1945 to reflect  the I/O address and
  67     IRQ you're using, or assign these when loading by:
  68 
  69                    insmod de4x5.o irq=x io=y
  70 
  71     3) compile  de4x5.c, but include -DMODULE in  the command line to ensure
  72     that the correct bits are compiled (see end of source code).
  73     4) if you are wanting to add a new  card, goto 5. Otherwise, recompile a
  74     kernel with the de4x5 configuration turned off and reboot.
  75     5) insmod de4x5.o
  76     6) run the net startup bits for your new eth?? interface manually 
  77     (usually /etc/rc.inet[12] at boot time). 
  78     7) enjoy!
  79 
  80     Note that autoprobing is not allowed in loadable modules - the system is
  81     already up and running and you're messing with interrupts.
  82 
  83     To unload a module, turn off the associated interface 
  84     'ifconfig eth?? down' then 'rmmod de4x5'.
  85 
  86     Automedia detection is included so that in  principal you can disconnect
  87     from, e.g.  TP, reconnect  to BNC  and  things will still work  (after a
  88     pause whilst the   driver figures out   where its media went).  My tests
  89     using ping showed that it appears to work....
  90 
  91     A compile time  switch to allow  Zynx  recognition has been  added. This
  92     "feature" is in no way supported nor tested  in this driver and the user
  93     may use it at his/her sole discretion.  I have had 2 conflicting reports
  94     that  my driver  will or   won't  work with   Zynx. Try Donald  Becker's
  95     'tulip.c' if this driver doesn't work for  you. I will not be supporting
  96     Zynx cards since I have no information on them  and can't test them in a
  97     system.
  98 
  99     TO DO:
 100     ------
 101     1. Add DC21041 Nway/Autosense support
 102     2. Add DC21140 Autosense support
 103     3. Add timer support
 104 
 105 
 106     Revision History
 107     ----------------
 108 
 109     Version   Date        Description
 110   
 111       0.1     17-Nov-94   Initial writing. ALPHA code release.
 112       0.2     13-Jan-95   Added PCI support for DE435's
 113       0.21    19-Jan-95   Added auto media detection
 114       0.22    10-Feb-95   Fix interrupt handler call <chris@cosy.sbg.ac.at>
 115                           Fix recognition bug reported by <bkm@star.rl.ac.uk>
 116                           Add request/release_region code
 117                           Add loadable modules support for PCI
 118                           Clean up loadable modules support
 119 
 120     =========================================================================
 121 */
 122 
 123 static char *version = "de4x5.c:v0.22 2/10/95 davies@wanton.lkg.dec.com\n";
 124 
 125 #include <linux/config.h>
 126 #ifdef MODULE
 127 #include <linux/module.h>
 128 #include <linux/version.h>
 129 #else
 130 #define MOD_INC_USE_COUNT
 131 #define MOD_DEC_USE_COUNT
 132 #endif /* MODULE */
 133 
 134 #include <linux/kernel.h>
 135 #include <linux/sched.h>
 136 #include <linux/string.h>
 137 #include <linux/interrupt.h>
 138 #include <linux/ptrace.h>
 139 #include <linux/errno.h>
 140 #include <linux/ioport.h>
 141 #include <linux/malloc.h>
 142 #include <linux/pci.h>
 143 #include <asm/bitops.h>
 144 #include <asm/io.h>
 145 #include <asm/dma.h>
 146 #include <asm/segment.h>
 147 
 148 #include <linux/netdevice.h>
 149 #include <linux/etherdevice.h>
 150 #include <linux/skbuff.h>
 151 
 152 #include <linux/time.h>
 153 #include <linux/types.h>
 154 #include <linux/unistd.h>
 155 
 156 #include "de4x5.h"
 157 
 158 #ifdef DE4X5_DEBUG
 159 static int de4x5_debug = DE4X5_DEBUG;
 160 #else
 161 static int de4x5_debug = 1;
 162 #endif
 163 
 164 /*
 165 ** Ethernet PROM defines
 166 */
 167 #define PROBE_LENGTH    32
 168 #define ETH_PROM_SIG    0xAA5500FFUL
 169 
 170 /*
 171 ** Ethernet Info
 172 */
 173 #define PKT_BUF_SZ      1544            /* Buffer size for each Tx/Rx buffer */
 174 #define MAX_PKT_SZ      1514            /* Maximum ethernet packet length */
 175 #define MAX_DAT_SZ      1500            /* Maximum ethernet data length */
 176 #define MIN_DAT_SZ      1               /* Minimum ethernet data length */
 177 #define PKT_HDR_LEN     14              /* Addresses and data length info */
 178 
 179 #define CRC_POLYNOMIAL_BE 0x04c11db7UL   /* Ethernet CRC, big endian */
 180 #define CRC_POLYNOMIAL_LE 0xedb88320UL   /* Ethernet CRC, little endian */
 181 
 182 /*
 183 ** EISA bus defines
 184 */
 185 #define DE4X5_EISA_IO_PORTS   0x0c00     /* I/O port base address, slot 0 */
 186 #define DE4X5_EISA_TOTAL_SIZE 0xfff      /* I/O address extent */
 187 
 188 #define MAX_EISA_SLOTS 16
 189 #define EISA_SLOT_INC 0x1000
 190 
 191 #define DE4X5_SIGNATURE {"DE425",""}
 192 #define DE4X5_NAME_LENGTH 8
 193 
 194 /*
 195 ** PCI Bus defines
 196 */
 197 #define PCI_MAX_BUS_NUM 8
 198 #define DE4X5_PCI_TOTAL_SIZE 0x80        /* I/O address extent */
 199 
 200 /*
 201 ** Timer defines
 202 */
 203 #define TIMER_WIDTH   16
 204 #define TIMER_PORT    0x43
 205 #define TIMER_LATCH   0x06
 206 #define TIMER_READ    0x40
 207 #define TIMER_TICK    419  /*ns*/
 208 #define DELAY_QUANT   5    /*us*/
 209 
 210 #define LWPAD ((long)(sizeof(long) - 1)) /* for longword alignment */
 211 
 212 #ifndef IS_ZYNX                          /* See README.de4x5 for using this */
 213 static int is_zynx = 0;
 214 #else
 215 static int is_zynx = 1;
 216 #endif
 217 
 218 /*
 219 ** DE4X5 IRQ ENABLE/DISABLE
 220 */
 221 static u_long irq_mask = IMR_RIM | IMR_TIM | IMR_TUM ;
 222 
 223 static u_long irq_en   = IMR_NIM | IMR_AIM;
 224 
 225 #define ENABLE_IRQs \
 226     imr |= irq_en;\
 227     outl(imr, DE4X5_IMR)                    /* Enable the IRQs */
 228 
 229 #define DISABLE_IRQs \
 230     imr = inl(DE4X5_IMR);\
 231     imr &= ~irq_en;\
 232     outl(imr, DE4X5_IMR)                    /* Disable the IRQs */
 233 
 234 #define UNMASK_IRQs \
 235     imr |= irq_mask;\
 236     outl(imr, DE4X5_IMR)                    /* Unmask the IRQs */
 237 
 238 #define MASK_IRQs \
 239     imr = inl(DE4X5_IMR);\
 240     imr &= ~irq_mask;\
 241     outl(imr, DE4X5_IMR)                    /* Mask the IRQs */
 242 
 243 /*
 244 ** DE4X5 START/STOP
 245 */
 246 #define START_DE4X5 \
 247     omr = inl(DE4X5_OMR);\
 248     omr |= OMR_ST | OMR_SR;\
 249     outl(omr, DE4X5_OMR)                    /* Enable the TX and/or RX */
 250 
 251 #define STOP_DE4X5 \
 252     omr = inl(DE4X5_OMR);\
 253     omr &= ~(OMR_ST|OMR_SR);\
 254     outl(omr, DE4X5_OMR)                    /* Disable the TX and/or RX */
 255 
 256 /*
 257 ** DE4X5 SIA RESET
 258 */
 259 #define RESET_SIA \
 260     outl(SICR_RESET, DE4X5_SICR);           /* Reset SIA connectivity regs */ \
 261     outl(STRR_RESET, DE4X5_STRR);           /* Write reset values */ \
 262     outl(SIGR_RESET, DE4X5_SIGR)            /* Write reset values */
 263 
 264 /*
 265 ** DE4X5 Descriptors. Make sure that all the RX buffers are contiguous
 266 ** and have sizes of both a power of 2 and a multiple of 4.
 267 ** A size of 256 bytes for each buffer was chosen because over 90% of
 268 ** all packets in our network are <256 bytes long.
 269 */
 270 #define NUM_RX_DESC 64                       /* Number of RX descriptors */
 271 #define NUM_TX_DESC 8                        /* Number of TX descriptors */
 272 #define BUFF_ALLOC_RETRIES 10                /* In case of memory shortage */
 273 #define RX_BUFF_SZ 256                       /* Power of 2 for kmalloc and */
 274                                              /* Multiple of 4 for DC21040 */
 275 
 276 struct de4x5_desc {
 277     volatile long status;
 278     u_long des1;
 279     char *buf;
 280     char *next;
 281 };
 282 
 283 /*
 284 ** The DE4X5 private structure
 285 */
 286 #define DE4X5_PKT_STAT_SZ 16
 287 #define DE4X5_PKT_BIN_SZ  128                /* Should be >=100 unless you
 288                                                 increase DE4X5_PKT_STAT_SZ */
 289 
 290 struct de4x5_private {
 291     char adapter_name[80];                   /* Adapter name */
 292     struct de4x5_desc rx_ring[NUM_RX_DESC];  /* RX descriptor ring */
 293     struct de4x5_desc tx_ring[NUM_TX_DESC];  /* TX descriptor ring */
 294     struct sk_buff *skb[NUM_TX_DESC];        /* TX skb for freeing when sent */
 295     int rx_new, rx_old;                      /* RX descriptor ring pointers */
 296     int tx_new, tx_old;                      /* TX descriptor ring pointers */
 297     char setup_frame[SETUP_FRAME_LEN];       /* Holds MCA and PA info. */
 298     struct enet_statistics stats;            /* Public stats */
 299     struct {
 300         unsigned long bins[DE4X5_PKT_STAT_SZ]; /* Private stats counters */
 301         unsigned long unicast;
 302         unsigned long multicast;
 303         unsigned long broadcast;
 304         unsigned long excessive_collisions;
 305         unsigned long tx_underruns;
 306         unsigned long excessive_underruns;
 307     } pktStats;
 308     char rxRingSize;
 309     char txRingSize;
 310     char bus;                                /* EISA or PCI */
 311     char lostMedia;                          /* Possibly lost media */
 312 };
 313 
 314 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
 315                          lp->tx_old+lp->txRingSize-lp->tx_new-1:\
 316                          lp->tx_old               -lp->tx_new-1)
 317 #define TX_SUSPENDED   (((sts & STS_TS) ^ TS_SUSP)==0)
 318 
 319 /*
 320 ** Public Functions
 321 */
 322 static int  de4x5_open(struct device *dev);
 323 static int  de4x5_queue_pkt(struct sk_buff *skb, struct device *dev);
 324 static void de4x5_interrupt(int irq, struct pt_regs * regs);
 325 static int  de4x5_close(struct device *dev);
 326 static struct enet_statistics *de4x5_get_stats(struct device *dev);
 327 static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
 328 static int  de4x5_ioctl(struct device *dev, struct ifreq *rq, int cmd);
 329 
 330 /*
 331 ** Private functions
 332 */
 333 static int  de4x5_hw_init(struct device *dev, short iobase);
 334 static int  de4x5_init(struct device *dev);
 335 static int  de4x5_rx(struct device *dev);
 336 static int  de4x5_tx(struct device *dev);
 337 
 338 static int  autoconf_media(struct device *dev);
 339 static void create_packet(struct device *dev, char *frame, int len);
 340 static u_short dce_get_ticks(void);
 341 static void dce_us_delay(u_long usec);
 342 static void dce_ms_delay(u_long msec);
 343 static void load_packet(struct device *dev, char *buf, u_long flags, struct sk_buff *skb);
 344 static void EISA_signature(char * name, short iobase);
 345 static int  DevicePresent(short iobase);
 346 static void SetMulticastFilter(struct device *dev, int num_addrs, char *addrs, char *multicast_table);
 347 
 348 static int aprom_crc (struct device *dev);
 349 
 350 static void eisa_probe(struct device *dev, short iobase);
 351 static void pci_probe(struct device *dev, short iobase);
 352 static struct device *alloc_device(struct device *dev, int iobase);
 353 
 354 #ifdef MODULE
 355 int  init_module(void);
 356 void cleanup_module(void);
 357 static int autoprobed = 1, loading_module = 1;
 358 # else
 359 static unsigned char de4x5_irq[] = {5,9,10,11};
 360 static int autoprobed = 0, loading_module = 0;
 361 #endif /* MODULE */
 362 
 363 static char name[DE4X5_NAME_LENGTH + 1];
 364 static int num_de4x5s = 0, num_eth = 0;
 365 
 366 /*
 367 ** Kludge to get around the fact that the CSR addresses have different
 368 ** offsets in the PCI and EISA boards. Also note that the ethernet address
 369 ** PROM is accessed differently.
 370 */
 371 static struct bus_type {
 372     int bus;
 373     int device;
 374 } bus;
 375 
 376 /*
 377 ** Miscellaneous defines...
 378 */
 379 #define RESET_DE4X5 {\
 380     long i;\
 381     i=inl(DE4X5_BMR);\
 382     outl(i | BMR_SWR, DE4X5_BMR);\
 383     outl(i, DE4X5_BMR);\
 384     for (i=0;i<5;i++) inl(DE4X5_BMR);\
 385                    }
 386 
 387 
 388 
 389 
 390 int de4x5_probe(struct device *dev)
     /*  */
 391 {
 392   int tmp = num_de4x5s, iobase = dev->base_addr;
 393   int status = -ENODEV;
 394 
 395   if ((iobase == 0) && loading_module){
 396     printk("Autoprobing is not supported when loading a module based driver.\n");
 397     status = -EIO;
 398   } else {                              /* First probe for the Ethernet */
 399                                         /* Address PROM pattern */
 400     eisa_probe(dev, iobase);
 401     pci_probe(dev, iobase);
 402 
 403     if ((tmp == num_de4x5s) && (iobase != 0)) {
 404       printk("%s: de4x5_probe() cannot find device at 0x%04x.\n", dev->name, 
 405                                                                        iobase);
 406     }
 407 
 408     /*
 409     ** Walk the device list to check that at least one device
 410     ** initialised OK
 411     */
 412     for (; dev->priv == NULL && dev->next != NULL; dev = dev->next);
 413 
 414     if (dev->priv) status = 0;
 415     if (iobase == 0) autoprobed = 1;
 416   }
 417 
 418   return status;
 419 }
 420 
 421 static int
 422 de4x5_hw_init(struct device *dev, short iobase)
     /*  */
 423 {
 424   struct bus_type *lp = &bus;
 425   int tmpbus, i, j, status=0;
 426   char *tmp;
 427   u_long nicsr;
 428 
 429   RESET_DE4X5;
 430 
 431   if (((nicsr=inl(DE4X5_STS)) & (STS_TS | STS_RS)) == 0) {
 432     /* 
 433     ** Now find out what kind of DC21040/DC21041/DC21140 board we have.
 434     */
 435     if (lp->bus == PCI) {
 436       if (!is_zynx) {
 437         strcpy(name, "DE435");
 438       } else {
 439         strcpy(name, "ZYNX");
 440       }
 441     } else {
 442       EISA_signature(name, EISA_ID0);
 443     }
 444 
 445     if (*name != '\0') {                         /* found a board signature */
 446       dev->base_addr = iobase;
 447       request_region(iobase, (lp->bus == PCI ? DE4X5_PCI_TOTAL_SIZE :
 448                                                DE4X5_EISA_TOTAL_SIZE), name);
 449       
 450       if (lp->bus == EISA) {
 451         printk("%s: %s at %#3x (EISA slot %d)", 
 452                dev->name, name, (u_short)iobase, (((u_short)iobase>>12)&0x0f));
 453       } else {                                   /* PCI port address */
 454         printk("%s: %s at %#3x (PCI device %d)", dev->name, name, (u_short)iobase,lp->device);
 455       }
 456         
 457       printk(", h/w address ");
 458       status = aprom_crc(dev);
 459       for (i = 0; i < ETH_ALEN - 1; i++) {       /* get the ethernet addr. */
 460         printk("%2.2x:", dev->dev_addr[i]);
 461       }
 462       printk("%2.2x,\n", dev->dev_addr[i]);
 463       
 464       tmpbus = lp->bus;
 465 
 466       if (status == 0) {
 467         struct de4x5_private *lp;
 468 
 469         /* 
 470         ** Reserve a section of kernel memory for the adapter
 471         ** private area and the TX/RX descriptor rings.
 472         */
 473         dev->priv = (void *) kmalloc(sizeof(struct de4x5_private) + LWPAD, 
 474                                                                    GFP_KERNEL);
 475         /*
 476         ** Align to a longword boundary
 477         */
 478         dev->priv = (void *)(((u_long)dev->priv + LWPAD) & ~LWPAD);
 479         lp = (struct de4x5_private *)dev->priv;
 480         memset(dev->priv, 0, sizeof(struct de4x5_private));
 481         lp->bus = tmpbus;
 482         strcpy(lp->adapter_name, name);
 483 
 484         /*
 485         ** Allocate contiguous receive buffers, long word aligned. 
 486         ** This could be a possible memory leak if the private area
 487         ** is ever hosed.
 488         */
 489         for (tmp=NULL, j=0; j<BUFF_ALLOC_RETRIES && tmp==NULL; j++) {
 490           if ((tmp = (void *)kmalloc(RX_BUFF_SZ * NUM_RX_DESC + LWPAD, 
 491                                                         GFP_KERNEL)) != NULL) {
 492             tmp = (void *)(((u_long) tmp + LWPAD) & ~LWPAD);
 493             for (i=0; i<NUM_RX_DESC; i++) {
 494               lp->rx_ring[i].status = 0;
 495               lp->rx_ring[i].des1 = RX_BUFF_SZ;
 496               lp->rx_ring[i].buf = tmp + i * RX_BUFF_SZ;
 497               lp->rx_ring[i].next = NULL;
 498             }
 499           }
 500         }
 501 
 502         if (tmp != NULL) {
 503           lp->rxRingSize = NUM_RX_DESC;
 504           lp->txRingSize = NUM_TX_DESC;
 505           
 506           /* Write the end of list marker to the descriptor lists */
 507           lp->rx_ring[lp->rxRingSize - 1].des1 |= RD_RER;
 508           lp->tx_ring[lp->txRingSize - 1].des1 |= TD_TER;
 509 
 510           /* Tell the adapter where the TX/RX rings are located. */
 511           outl((u_long)lp->rx_ring, DE4X5_RRBA);
 512           outl((u_long)lp->tx_ring, DE4X5_TRBA);
 513 
 514           if (dev->irq < 2) {
 515 #ifndef MODULE
 516             unsigned char irqnum;
 517             u_long omr;
 518             autoirq_setup(0);
 519             
 520             omr = inl(DE4X5_OMR);
 521             outl(IMR_AIM|IMR_RUM, DE4X5_IMR); /* Unmask RUM interrupt */
 522             outl(OMR_SR | omr, DE4X5_OMR);    /* Start RX w/no descriptors */
 523 
 524             irqnum = autoirq_report(1);
 525             if (!irqnum) {
 526               printk("      and failed to detect IRQ line.\n");
 527               status = -ENXIO;
 528             } else {
 529               for (dev->irq=0,i=0; i<sizeof(de4x5_irq) && !dev->irq; i++) {
 530                 if (irqnum == de4x5_irq[i]) {
 531                   dev->irq = irqnum;
 532                   printk("      and uses IRQ%d.\n", dev->irq);
 533                 }
 534               }
 535                   
 536               if (!dev->irq) {
 537                 printk("      but incorrect IRQ line detected.\n");
 538                 status = -ENXIO;
 539               }
 540             }
 541                 
 542             outl(0, DE4X5_IMR);               /* Re-mask RUM interrupt */
 543 
 544 #endif /* MODULE */
 545           } else {
 546             printk("      and requires IRQ%d (not probed).\n", dev->irq);
 547           }
 548         } else {
 549           printk("%s: Kernel could not allocate RX buffer memory.\n", 
 550                                                                     dev->name);
 551           status = -ENXIO;
 552         }
 553       } else {
 554         printk("      which has an Ethernet PROM CRC error.\n");
 555         status = -ENXIO;
 556       }
 557       if (status) release_region(iobase, (lp->bus == PCI ? 
 558                                                      DE4X5_PCI_TOTAL_SIZE :
 559                                                      DE4X5_EISA_TOTAL_SIZE));
 560     } else {
 561       status = -ENXIO;
 562     }
 563   } else {
 564     status = -ENXIO;
 565   }
 566   
 567   if (!status) {
 568     if (de4x5_debug > 0) {
 569       printk(version);
 570     }
 571     
 572     /* The DE4X5-specific entries in the device structure. */
 573     dev->open = &de4x5_open;
 574     dev->hard_start_xmit = &de4x5_queue_pkt;
 575     dev->stop = &de4x5_close;
 576     dev->get_stats = &de4x5_get_stats;
 577 #ifdef HAVE_MULTICAST
 578     dev->set_multicast_list = &set_multicast_list;
 579 #endif
 580     dev->do_ioctl = &de4x5_ioctl;
 581     
 582     dev->mem_start = 0;
 583     
 584     /* Fill in the generic field of the device structure. */
 585     ether_setup(dev);
 586   } else {                            /* Incorrectly initialised hardware */
 587     struct de4x5_private *lp = (struct de4x5_private *)dev->priv;
 588     if (lp) {
 589       kfree_s(lp->rx_ring[0].buf, RX_BUFF_SZ * NUM_RX_DESC + LWPAD);
 590     }
 591     if (dev->priv) {
 592       kfree_s(dev->priv, sizeof(struct de4x5_private) + LWPAD);
 593       dev->priv = NULL;
 594     }
 595   }
 596 
 597   return status;
 598 }
 599 
 600 
 601 static int
 602 de4x5_open(struct device *dev)
     /*  */
 603 {
 604   struct de4x5_private *lp = (struct de4x5_private *)dev->priv;
 605   short iobase = dev->base_addr;
 606   int i, status = 0;
 607   u_long imr, omr, sts;
 608 
 609   /*
 610   ** Stop the TX and RX...
 611   */
 612   STOP_DE4X5;
 613 
 614   if (request_irq(dev->irq, (void *)de4x5_interrupt, 0, lp->adapter_name)) {
 615     printk("de4x5_open(): Requested IRQ%d is busy\n",dev->irq);
 616     status = -EAGAIN;
 617   } else {
 618 
 619     irq2dev_map[dev->irq] = dev;
 620     /* 
 621     ** Re-initialize the DE4X5... 
 622     */
 623     status = de4x5_init(dev);
 624 
 625     if (de4x5_debug > 1){
 626       printk("%s: de4x5 open with irq %d\n",dev->name,dev->irq);
 627       printk("\tphysical address: ");
 628       for (i=0;i<6;i++){
 629         printk("%2.2x:",(short)dev->dev_addr[i]);
 630       }
 631       printk("\n");
 632       printk("Descriptor head addresses:\n");
 633       printk("\t0x%8.8lx  0x%8.8lx\n",(long)lp->rx_ring,(long)lp->tx_ring);
 634       printk("Descriptor addresses:\nRX: ");
 635       for (i=0;i<lp->rxRingSize-1;i++){
 636         if (i < 3) {
 637           printk("0x%8.8lx  ",(long)&lp->rx_ring[i].status);
 638         }
 639       }
 640       printk("...0x%8.8lx\n",(long)&lp->rx_ring[i].status);
 641       printk("TX: ");
 642       for (i=0;i<lp->txRingSize-1;i++){
 643         if (i < 3) {
 644           printk("0x%8.8lx  ", (long)&lp->tx_ring[i].status);
 645         }
 646       }
 647       printk("...0x%8.8lx\n", (long)&lp->tx_ring[i].status);
 648       printk("Descriptor buffers:\nRX: ");
 649       for (i=0;i<lp->rxRingSize-1;i++){
 650         if (i < 3) {
 651           printk("0x%8.8lx  ",(long)lp->rx_ring[i].buf);
 652         }
 653       }
 654       printk("...0x%8.8lx\n",(long)lp->rx_ring[i].buf);
 655       printk("TX: ");
 656       for (i=0;i<lp->txRingSize-1;i++){
 657         if (i < 3) {
 658           printk("0x%8.8lx  ", (long)lp->tx_ring[i].buf);
 659         }
 660       }
 661       printk("...0x%8.8lx\n", (long)lp->tx_ring[i].buf);
 662       printk("Ring size: \nRX: %d\nTX: %d\n", 
 663              (short)lp->rxRingSize, 
 664              (short)lp->txRingSize); 
 665       printk("\tstatus:  %d\n", status);
 666     }
 667 
 668     if (!status) {
 669       dev->tbusy = 0;                         
 670       dev->start = 1;
 671       dev->interrupt = UNMASK_INTERRUPTS;
 672       
 673       /*
 674       ** Reset any pending interrupts
 675       */
 676       sts = inl(DE4X5_STS);
 677       outl(sts, DE4X5_STS);
 678 
 679       /*
 680       ** Unmask and enable DE4X5 board interrupts
 681       */
 682       imr = 0;
 683       UNMASK_IRQs;
 684       ENABLE_IRQs;
 685 
 686       START_DE4X5;
 687     }
 688     if (de4x5_debug > 1) {
 689       printk("\tsts:  0x%08x\n", inl(DE4X5_STS));
 690       printk("\tbmr:  0x%08x\n", inl(DE4X5_BMR));
 691       printk("\timr:  0x%08x\n", inl(DE4X5_IMR));
 692       printk("\tomr:  0x%08x\n", inl(DE4X5_OMR));
 693       printk("\tsisr: 0x%08x\n", inl(DE4X5_SISR));
 694       printk("\tsicr: 0x%08x\n", inl(DE4X5_SICR));
 695       printk("\tstrr: 0x%08x\n", inl(DE4X5_STRR));
 696       printk("\tsigr: 0x%08x\n", inl(DE4X5_SIGR));
 697     }
 698   }
 699 
 700   MOD_INC_USE_COUNT;
 701 
 702   return status;
 703 }
 704 
 705 /*
 706 ** Initialize the DE4X5 operating conditions
 707 */
 708 static int
 709 de4x5_init(struct device *dev)
     /*  */
 710 {  
 711   struct de4x5_private *lp = (struct de4x5_private *)dev->priv;
 712   short iobase = dev->base_addr;
 713   int offset, status = 0;
 714   u_long i, j, bmr, omr;
 715   char *pa;
 716 
 717   /* Ensure a full reset */
 718   RESET_DE4X5;
 719 
 720   /* Set up automatic transmit polling every 1.6ms */
 721   bmr = inl(DE4X5_BMR);
 722   bmr |= TAP_1_6MS | CAL_16LONG;
 723   outl(bmr, DE4X5_BMR);
 724 
 725   /* Set up imperfect filtering mode as default, turn off promiscuous mode */
 726   omr = OMR_HP;
 727   offset = IMPERF_PA_OFFSET;
 728 
 729   /* Lock out other processes whilst setting up the hardware */
 730   set_bit(0, (void *)&dev->tbusy);
 731 
 732   /* Rewrite the descriptor lists' start addresses */
 733   outl((u_long)lp->rx_ring, DE4X5_RRBA);  /* Start of RX Descriptor List */
 734   outl((u_long)lp->tx_ring, DE4X5_TRBA);  /* Start of TX Descriptor List */
 735 
 736   /* Reset the buffer pointers */
 737   lp->rx_new = lp->rx_old = 0;
 738   lp->tx_new = lp->tx_old = 0;
 739 
 740   /* Initialize each descriptor ownership in the RX ring */
 741   for (i = 0; i < lp->rxRingSize; i++) {
 742     lp->rx_ring[i].status = R_OWN;
 743   }
 744 
 745   /* Initialize each descriptor ownership in the TX ring */
 746   for (i = 0; i < lp->txRingSize; i++) {
 747     lp->tx_ring[i].status = 0;
 748   }
 749 
 750   /* Initialise the setup frame prior to starting the receive process */
 751   memset(lp->setup_frame, 0, SETUP_FRAME_LEN);
 752 
 753   /* Insert the physical address */
 754   for (pa=lp->setup_frame+offset, j=0; j<ETH_ALEN; j++) {
 755     *(pa + j) = dev->dev_addr[j];
 756     if (j & 0x01) pa += 2;
 757   }
 758 
 759   /* Clear the multicast list */
 760   set_multicast_list(dev, 0, NULL);
 761 
 762   /* Tell the hardware there's a new packet to be sent */
 763   load_packet(dev, lp->setup_frame, HASH_F | TD_SET | SETUP_FRAME_LEN, NULL);
 764 
 765   /* Start the TX process */
 766   outl(omr|OMR_ST, DE4X5_OMR);
 767 
 768   /* Poll for completion of setup frame (interrupts are disabled for now) */
 769   for (j=0, i=0;i<100 && j==0;i++) {
 770     if (lp->tx_ring[lp->tx_new].status >= 0) j=1;
 771   }
 772   outl(omr, DE4X5_OMR);                        /* Stop everything! */
 773 
 774   if (i == 100) {
 775     printk("%s: Setup frame timed out, status %08x\n", dev->name, 
 776                                                                inl(DE4X5_STS));
 777     status = -EIO;
 778   }
 779 
 780   /* Update pointers */
 781   lp->tx_new = (++lp->tx_new) % lp->txRingSize;
 782   lp->tx_old = lp->tx_new;
 783 
 784   /* Autoconfigure the connected port */
 785   if (autoconf_media(dev) == 0) {
 786     status = -EIO;
 787   }
 788 
 789   return 0;
 790 }
 791 
 792 /* 
 793 ** Writes a socket buffer address to the next available transmit descriptor
 794 */
 795 static int
 796 de4x5_queue_pkt(struct sk_buff *skb, struct device *dev)
     /*  */
 797 {
 798   volatile struct de4x5_private *lp = (struct de4x5_private *)dev->priv;
 799   int iobase = dev->base_addr;
 800   int status = 0;
 801   u_long imr, omr, sts;
 802 
 803   sts = inl(DE4X5_STS);
 804 
 805   /* 
 806   ** Transmitter timeout, possibly serious problems.
 807   ** The 'lostMedia' threshold accounts for transient errors that
 808   ** were noticed when switching media.
 809   */
 810   if (dev->tbusy || (lp->lostMedia > 3)) {
 811     int tickssofar = jiffies - dev->trans_start;
 812     if (tickssofar < 10 && !lp->lostMedia) {
 813       /* Check if TX ring is full or not - 'tbusy' cleared if not full. */
 814       if ((TX_BUFFS_AVAIL > 0) && dev->tbusy) {
 815         dev->tbusy = 0;
 816       }
 817       status = -1;
 818     } else {
 819       printk("%s: transmit timed out, status %08x, tbusy:%d, lostMedia:%d tickssofar:%d, resetting.\n",dev->name, inl(DE4X5_STS), dev->tbusy, lp->lostMedia, tickssofar);
 820         
 821       /* Stop and reset the TX and RX... */
 822       STOP_DE4X5;
 823       status = de4x5_init(dev);
 824 
 825       /* Unmask DE4X5 board interrupts */
 826       if (!status) {
 827         /* Start here to clean stale interrupts later */
 828         dev->trans_start = jiffies;
 829         START_DE4X5;
 830 
 831         /* Clear any pending (stale) interrupts */
 832         sts = inl(DE4X5_STS);
 833         outl(sts, DE4X5_STS);
 834 
 835         /* Unmask DE4X5 board interrupts */
 836         imr = 0;
 837         UNMASK_IRQs;
 838           
 839         dev->interrupt = UNMASK_INTERRUPTS;
 840         dev->start = 1;
 841         dev->tbusy = 0;                         
 842       
 843         ENABLE_IRQs;
 844       } else {
 845         printk("%s: hardware initialisation failure, status %08x.\n",
 846                                                     dev->name, inl(DE4X5_STS));
 847       }
 848     }
 849   } else if (skb == NULL) {
 850     dev_tint(dev);
 851   } else if (skb->len > 0) {
 852 
 853     /* 
 854     ** Block a timer-based transmit from overlapping.  This could better be
 855     ** done with atomic_swap(1, dev->tbusy), but set_bit() works as well. 
 856     */
 857     if (set_bit(0, (void*)&dev->tbusy) != 0)
 858       printk("%s: Transmitter access conflict.\n", dev->name);
 859 
 860     if (TX_BUFFS_AVAIL > 0) {                   /* Fill in a Tx ring entry */
 861       if (((u_long)skb->data & ~0x03) != (u_long)skb->data) {
 862         printk("%s: TX skb buffer alignment prob..\n", dev->name);
 863       }
 864 
 865       load_packet(dev, skb->data, TD_IC | TD_LS | TD_FS | skb->len, skb);
 866       outl(POLL_DEMAND, DE4X5_TPD);             /* Start the TX */
 867 
 868       lp->tx_new = (++lp->tx_new) % lp->txRingSize; /* Ensure a wrap */
 869         
 870       dev->trans_start = jiffies;
 871     }
 872 
 873     if (TX_BUFFS_AVAIL > 0) {
 874       dev->tbusy = 0;                           /* Another pkt may be queued */
 875     }
 876   }
 877 
 878   return status;
 879 }
 880 
 881 /*
 882 ** The DE4X5 interrupt handler. 
 883 */
 884 static void
 885 de4x5_interrupt(int irq, struct pt_regs * regs)
     /*  */
 886 {
 887     struct device *dev = (struct device *)(irq2dev_map[irq]);
 888     struct de4x5_private *lp;
 889     int iobase;
 890     u_long imr, sts;
 891 
 892     if (dev == NULL) {
 893         printk ("de4x5_interrupt(): irq %d for unknown device.\n", irq);
 894     } else {
 895       lp = (struct de4x5_private *)dev->priv;
 896       iobase = dev->base_addr;
 897 
 898       if (dev->interrupt)
 899         printk("%s: Re-entering the interrupt handler.\n", dev->name);
 900 
 901       dev->interrupt = MASK_INTERRUPTS;
 902 
 903       /* 
 904       ** Get the interrupt information and disable them. 
 905       ** The device read will ensure pending buffers are flushed
 906       ** in intermediate PCI bridges, so that the posted interrupt
 907       ** has some real data to work with.
 908       */
 909       sts = inl(DE4X5_STS);
 910       MASK_IRQs;
 911 
 912       /* 
 913       ** Acknowledge the DE4X5 board interrupts
 914       */
 915       outl(sts, DE4X5_STS);
 916 
 917       if (sts & STS_RI)                  /* Rx interrupt (packet[s] arrived) */
 918         de4x5_rx(dev);
 919 
 920       if (sts & STS_TI)                  /* Tx interrupt (packet sent) */
 921         de4x5_tx(dev); 
 922 
 923       if ((TX_BUFFS_AVAIL > 0) && dev->tbusy) { /* any resources available? */
 924         dev->tbusy = 0;                  /* clear TX busy flag */
 925         mark_bh(NET_BH);
 926       }
 927 
 928       dev->interrupt = UNMASK_INTERRUPTS;
 929 
 930       UNMASK_IRQs;
 931     }
 932 
 933     return;
 934 }
 935 
 936 static int
 937 de4x5_rx(struct device *dev)
     /*  */
 938 {
 939   struct de4x5_private *lp = (struct de4x5_private *)dev->priv;
 940   int i, entry;
 941   volatile long status;
 942   char *buf;
 943 
 944   /* Loop over any new packets for sending up the stack */
 945   for (entry = lp->rx_new; lp->rx_ring[entry].status >= 0;entry = lp->rx_new) {
 946     status = lp->rx_ring[entry].status;
 947 
 948     if (status & RD_FS) {                   /* Remember the start of frame */
 949       lp->rx_old = entry;
 950     }
 951 
 952     if (status & RD_LS) {                   /* Valid frame status */
 953       if (status & RD_ES) {                 /* There was an error. */
 954         lp->stats.rx_errors++;              /* Update the error stats. */
 955         if (status & (RD_RF | RD_TL)) lp->stats.rx_frame_errors++;
 956         if (status & RD_CE)           lp->stats.rx_crc_errors++;
 957         if (status & RD_OF)           lp->stats.rx_fifo_errors++;
 958       } else {                              /* A valid frame received */
 959         struct sk_buff *skb;
 960         short pkt_len = (short)(lp->rx_ring[entry].status >> 16);
 961 
 962         if ((skb = alloc_skb(pkt_len, GFP_ATOMIC)) != NULL) {
 963           skb->len = pkt_len;
 964           skb->dev = dev;
 965         
 966           if (entry < lp->rx_old) {         /* Wrapped buffer */
 967             short len = (lp->rxRingSize - lp->rx_old) * RX_BUFF_SZ;
 968             memcpy(skb->data, lp->rx_ring[lp->rx_old].buf, len);
 969             memcpy(skb->data + len, lp->rx_ring[0].buf, pkt_len - len);
 970           } else {                          /* Linear buffer */
 971             memcpy(skb->data, lp->rx_ring[lp->rx_old].buf, pkt_len);
 972           }
 973 
 974           /* 
 975           ** Notify the upper protocol layers that there is another 
 976           ** packet to handle
 977           */
 978           netif_rx(skb);
 979 
 980           /*
 981           ** Update stats
 982           */
 983           lp->stats.rx_packets++;
 984           for (i=1; i<DE4X5_PKT_STAT_SZ-1; i++) {
 985             if (pkt_len < i*DE4X5_PKT_BIN_SZ) {
 986               lp->pktStats.bins[i]++;
 987               i = DE4X5_PKT_STAT_SZ;
 988             }
 989           }
 990           buf = skb->data;                  /* Look at the dest addr */
 991           if (buf[0] & 0x01) {              /* Multicast/Broadcast */
 992             if ((*(long *)&buf[0] == -1) && (*(short *)&buf[4] == -1)) {
 993               lp->pktStats.broadcast++;
 994             } else {
 995               lp->pktStats.multicast++;
 996             }
 997           } else if ((*(long *)&buf[0] == *(long *)&dev->dev_addr[0]) &&
 998                      (*(short *)&buf[4] == *(short *)&dev->dev_addr[4])) {
 999             lp->pktStats.unicast++;
1000           }
1001           
1002           lp->pktStats.bins[0]++;           /* Duplicates stats.rx_packets */
1003           if (lp->pktStats.bins[0] == 0) {  /* Reset counters */
1004             memset((char *)&lp->pktStats, 0, sizeof(lp->pktStats));
1005           }
1006         } else {
1007           printk("%s: Insufficient memory; nuking packet.\n", dev->name);
1008           lp->stats.rx_dropped++;             /* Really, deferred. */
1009           break;
1010         }
1011       }
1012 
1013       /* Change buffer ownership for this last frame, back to the adapter */
1014       for (; lp->rx_old!=entry; lp->rx_old=(++lp->rx_old)%lp->rxRingSize) {
1015         lp->rx_ring[lp->rx_old].status = R_OWN;
1016       }
1017       lp->rx_ring[entry].status = R_OWN;
1018     }
1019 
1020     /*
1021     ** Update entry information
1022     */
1023     lp->rx_new = (++lp->rx_new) % lp->rxRingSize;
1024   }
1025 
1026   return 0;
1027 }
1028 
1029 /*
1030 ** Buffer sent - check for TX buffer errors.
1031 */
1032 static int
1033 de4x5_tx(struct device *dev)
     /*  */
1034 {
1035   struct de4x5_private *lp = (struct de4x5_private *)dev->priv;
1036   int entry, iobase = dev->base_addr;
1037   volatile long status;
1038 
1039   for (entry = lp->tx_old; entry != lp->tx_new; entry = lp->tx_old) {
1040     status = lp->tx_ring[entry].status;
1041     if (status < 0) {                            /* Buffer not sent yet */
1042       break;
1043     } else if (status & TD_ES) {                 /* An error happened */
1044       lp->stats.tx_errors++; 
1045       if (status & TD_NC)  lp->stats.tx_carrier_errors++;
1046       if (status & TD_LC)  lp->stats.tx_window_errors++;
1047       if (status & TD_UF)  lp->stats.tx_fifo_errors++;
1048       if (status & TD_LC)  lp->stats.collisions++;
1049       if (status & TD_EC)  lp->pktStats.excessive_collisions++;
1050       if (status & TD_DE)  lp->stats.tx_aborted_errors++;
1051 
1052       if (status & (TD_LO | TD_NC | TD_EC | TD_LF)) {
1053         lp->lostMedia++;
1054       } else {
1055         outl(POLL_DEMAND, DE4X5_TPD);            /* Restart a stalled TX */
1056       }
1057     } else {                                     /* Packet sent */
1058       lp->stats.tx_packets++;
1059       lp->lostMedia = 0;                         /* Remove transient problem */
1060     }
1061     /* Free the buffer if it's not a setup frame. */
1062     if (lp->skb[entry] != NULL) {
1063       dev_kfree_skb(lp->skb[entry], FREE_WRITE);
1064     }
1065 
1066     /* Update all the pointers */
1067     lp->tx_old = (++lp->tx_old) % lp->txRingSize;
1068   }
1069 
1070   return 0;
1071 }
1072 
1073 static int
1074 de4x5_close(struct device *dev)
     /*  */
1075 {
1076   struct de4x5_private *lp = (struct de4x5_private *)dev->priv;
1077   int iobase = dev->base_addr;
1078   u_long imr, omr;
1079 
1080   dev->start = 0;
1081   dev->tbusy = 1;
1082 
1083   if (de4x5_debug > 1) {
1084     printk("%s: Shutting down ethercard, status was %8.8x.\n",
1085            dev->name, inl(DE4X5_STS));
1086   }
1087 
1088   /* 
1089   ** We stop the DE4X5 here... mask interrupts and stop TX & RX
1090   */
1091   DISABLE_IRQs;
1092 
1093   STOP_DE4X5;
1094 
1095   /*
1096   ** Free the associated irq
1097   */
1098   free_irq(dev->irq);
1099   irq2dev_map[dev->irq] = 0;
1100 
1101   MOD_DEC_USE_COUNT;
1102 
1103   return 0;
1104 }
1105 
1106 static struct enet_statistics *
1107 de4x5_get_stats(struct device *dev)
     /*  */
1108 {
1109   struct de4x5_private *lp = (struct de4x5_private *)dev->priv;
1110   int iobase = dev->base_addr;
1111 
1112   lp->stats.rx_missed_errors = (int) inl(DE4X5_MFC);
1113     
1114   return &lp->stats;
1115 }
1116 
1117 static void load_packet(struct device *dev, char *buf, u_long flags, struct sk_buff *skb)
     /*  */
1118 {
1119   struct de4x5_private *lp = (struct de4x5_private *)dev->priv;
1120 
1121   lp->tx_ring[lp->tx_new].buf = buf;
1122   lp->tx_ring[lp->tx_new].des1 &= TD_TER;
1123   lp->tx_ring[lp->tx_new].des1 |= flags;
1124   lp->skb[lp->tx_new] = skb;
1125   lp->tx_ring[lp->tx_new].status = T_OWN;
1126 
1127   return;
1128 }
1129 /*
1130 ** Set or clear the multicast filter for this adaptor.
1131 ** num_addrs == -1      Promiscuous mode, receive all packets
1132 ** num_addrs == 0       Normal mode, clear multicast list
1133 ** num_addrs > 0        Multicast mode, receive normal and MC packets, and do
1134 **                      best-effort filtering.
1135 ** num_addrs == HASH_TABLE_LEN
1136 **                      Set all multicast bits
1137 */
1138 static void
1139 set_multicast_list(struct device *dev, int num_addrs, void *addrs)
     /*  */
1140 {
1141   struct de4x5_private *lp = (struct de4x5_private *)dev->priv;
1142   int iobase = dev->base_addr;
1143   u_long omr;
1144 
1145   /* First, double check that the adapter is open */
1146   if (irq2dev_map[dev->irq] != NULL) {
1147     omr = inl(DE4X5_OMR);
1148 
1149     if (num_addrs >= 0) {
1150       SetMulticastFilter(dev, num_addrs, (char *)addrs, lp->setup_frame);
1151 
1152       /* Tell the hardware that there's a new packet to be sent */
1153       load_packet(dev, lp->setup_frame, TD_IC | HASH_F | TD_SET | 
1154                                                         SETUP_FRAME_LEN, NULL);
1155       lp->tx_new = (++lp->tx_new) % lp->txRingSize;
1156       outl(POLL_DEMAND, DE4X5_TPD);                /* Start the TX */
1157 
1158       omr &= ~OMR_PR;
1159       omr |= OMR_PM;
1160       outl(omr, DE4X5_OMR);
1161     } else {                             /* set promiscuous mode */
1162       omr |= OMR_PR;
1163       omr &= ~OMR_PM;
1164       outl(omr, DE4X5_OMR);
1165     }
1166   }
1167 }
1168 
1169 /*
1170 ** Calculate the hash code and update the logical address filter
1171 ** from a list of ethernet multicast addresses.
1172 ** Little endian crc one liner from Matt Thomas, DEC.
1173 */
1174 static void SetMulticastFilter(struct device *dev, int num_addrs, char *addrs, char *multicast_table)
     /*  */
1175 {
1176   char j, bit, byte;
1177   long *p = (long *) multicast_table;
1178   int i;
1179   u_short hashcode;
1180   u_long crc, poly = CRC_POLYNOMIAL_LE;
1181 
1182   if (num_addrs == HASH_TABLE_LEN) {
1183     for (i=0; i<(HASH_TABLE_LEN >> 4); i++) {
1184       *p++ = 0x0000ffff;
1185     }
1186   } else {
1187     /* Clear the multicast table except for the broadcast bit */
1188     memset(multicast_table, 0, (HASH_TABLE_LEN >> 2));
1189     *(multicast_table + (HASH_TABLE_LEN >> 3) - 3) = 0x80;
1190 
1191     /* Now update the table */
1192     for (i=0;i<num_addrs;i++) {              /* for each address in the list */
1193       if ((*addrs & 0x01) == 1) {            /* multicast address? */ 
1194         crc = 0xffffffff;                    /* init CRC for each address */
1195         for (byte=0;byte<ETH_ALEN;byte++) {  /* for each address byte */
1196                                              /* process each address bit */ 
1197           for (bit = *addrs++,j=0;j<8;j++, bit>>=1) {
1198             crc = (crc >> 1) ^ (((crc ^ bit) & 0x01) ? poly : 0);
1199           }
1200         }
1201         hashcode = crc & ((1 << 9) - 1);     /* hashcode is 9 LSb of CRC */
1202 
1203         byte = hashcode >> 3;                /* bit[3-8] -> byte in filter */
1204         bit = 1 << (hashcode & 0x07);        /* bit[0-2] -> bit in byte */
1205 
1206         byte <<= 1;                          /* calc offset into setup frame */
1207         if (byte & 0x02) {
1208           byte -= 1;
1209         }
1210         multicast_table[byte] |= bit;
1211 
1212       } else {                               /* skip this address */
1213         addrs += ETH_ALEN;
1214       }
1215     }
1216   }
1217 
1218   return;
1219 }
1220 
1221 /*
1222 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1223 ** the motherboard. Upto 15 EISA devices are supported.
1224 */
1225 static void eisa_probe(struct device *dev, short ioaddr)
     /*  */
1226 {
1227   int i, maxSlots;
1228   int status;
1229   u_short iobase;
1230   struct bus_type *lp = &bus;
1231 
1232   if (!ioaddr && autoprobed) return ;            /* Been here before ! */
1233   if ((ioaddr < 0x1000) && (ioaddr > 0)) return; /* PCI MODULE special */
1234 
1235   lp->bus = EISA;
1236 
1237   if (ioaddr == 0) {                     /* Autoprobing */
1238     iobase = EISA_SLOT_INC;              /* Get the first slot address */
1239     i = 1;
1240     maxSlots = MAX_EISA_SLOTS;
1241   } else {                               /* Probe a specific location */
1242     iobase = ioaddr;
1243     i = (ioaddr >> 12);
1244     maxSlots = i + 1;
1245   }
1246 
1247   for (status = -ENODEV; i<maxSlots && dev!=NULL; i++, iobase+=EISA_SLOT_INC) {
1248     if ((DevicePresent(EISA_APROM) == 0) || is_zynx) { 
1249       if (check_region(iobase, DE4X5_EISA_TOTAL_SIZE) == 0) {
1250         if ((dev = alloc_device(dev, iobase)) != NULL) {
1251           if ((status = de4x5_hw_init(dev, iobase)) == 0) {
1252             num_de4x5s++;
1253           }
1254           num_eth++;
1255         }
1256       } else if (autoprobed) {
1257         printk("%s: region already allocated at 0x%04x.\n", dev->name, iobase);
1258       }
1259     }
1260   }
1261 
1262   return;
1263 }
1264 
1265 /*
1266 ** PCI bus I/O device probe
1267 */
1268 #define PCI_DEVICE    (dev_num << 3)
1269 #define PCI_LAST_DEV  32
1270 
1271 static void pci_probe(struct device *dev, short ioaddr)
     /*  */
1272 
1273 {
1274   u_char irq;
1275   u_short pb, dev_num, dev_last;
1276   u_short vendor, device, status;
1277   u_long class, iobase;
1278   struct bus_type *lp = &bus;
1279 
1280   if (!ioaddr && autoprobed) return ;        /* Been here before ! */
1281 
1282   if (pcibios_present()) {
1283     lp->bus = PCI;
1284 
1285     if (ioaddr < 0x1000) {
1286       pb = (u_short)(ioaddr >> 8);
1287       dev_num = (u_short)(ioaddr & 0xff);
1288     } else {
1289       pb = 0;
1290       dev_num = 0;
1291     }
1292     if (ioaddr > 0) {
1293       dev_last = (dev_num < PCI_LAST_DEV) ? dev_num + 1 : PCI_LAST_DEV;
1294     } else {
1295       dev_last = PCI_LAST_DEV;
1296     }
1297 
1298     for (; dev_num < dev_last && dev != NULL; dev_num++) {
1299       pcibios_read_config_dword(pb, PCI_DEVICE, PCI_CLASS_REVISION, &class);
1300       if (class != 0xffffffff) {
1301         pcibios_read_config_word(pb, PCI_DEVICE, PCI_VENDOR_ID, &vendor);
1302         pcibios_read_config_word(pb, PCI_DEVICE, PCI_DEVICE_ID, &device);
1303         if ((vendor == DC21040_VID) && (device == DC21040_DID)) {
1304           /* Set the device number information */
1305           lp->device = dev_num;
1306 
1307           /* Get the board I/O address */
1308           pcibios_read_config_dword(pb, PCI_DEVICE, PCI_BASE_ADDRESS_0, &iobase);
1309           iobase &= CBIO_MASK;
1310           
1311           /* Fetch the IRQ to be used */
1312           pcibios_read_config_byte(pb, PCI_DEVICE, PCI_INTERRUPT_LINE, &irq);
1313 
1314           /* Enable I/O Accesses and Bus Mastering */
1315           pcibios_read_config_word(pb, PCI_DEVICE, PCI_COMMAND, &status);
1316           status |= PCI_COMMAND_IO | PCI_COMMAND_MASTER;
1317           pcibios_write_config_word(pb, PCI_DEVICE, PCI_COMMAND, status);
1318 
1319           /* If there is a device and I/O region is open, initialise dev. */
1320           if ((DevicePresent(DE4X5_APROM) == 0) || is_zynx) {
1321             if (check_region(iobase, DE4X5_PCI_TOTAL_SIZE) == 0) {
1322               if ((dev = alloc_device(dev, iobase)) != NULL) {
1323                 dev->irq = irq;
1324                 if ((status = de4x5_hw_init(dev, iobase)) == 0) {
1325                   num_de4x5s++;
1326                 }
1327                 num_eth++;
1328               }
1329             } else if (autoprobed) {
1330               printk("%s: region already allocated at 0x%04x.\n", dev->name, (u_short)iobase);
1331             }
1332           }
1333         }
1334       }
1335     }
1336   }
1337 
1338   return;
1339 }
1340 
1341 /*
1342 ** Allocate the device by pointing to the next available space in the
1343 ** device structure. Should one not be available, it is created.
1344 */
1345 static struct device *alloc_device(struct device *dev, int iobase)
     /*  */
1346 {
1347   int addAutoProbe = 0;
1348   struct device *tmp = NULL, *ret;
1349   int (*init)(struct device *) = NULL;
1350 
1351   /*
1352   ** Check the device structures for an end of list or unused device
1353   */
1354   if (!loading_module) {
1355     while (dev->next != NULL) {
1356       if ((dev->base_addr == 0xffe0) || (dev->base_addr == 0)) break;
1357       dev = dev->next;                     /* walk through eth device list */
1358       num_eth++;                           /* increment eth device number */
1359     }
1360 
1361     /*
1362     ** If an autoprobe is requested for another device, we must re-insert
1363     ** the request later in the list. Remember the current position first.
1364     */
1365     if ((dev->base_addr == 0) && (num_de4x5s > 0)) {
1366       addAutoProbe++;
1367       tmp = dev->next;                     /* point to the next device */
1368       init = dev->init;                    /* remember the probe function */
1369     }
1370 
1371     /*
1372     ** If at end of list and can't use current entry, malloc one up. 
1373     ** If memory could not be allocated, print an error message.
1374     */
1375     if ((dev->next == NULL) &&  
1376         !((dev->base_addr == 0xffe0) || (dev->base_addr == 0))){
1377       dev->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1378                                            GFP_KERNEL);
1379 
1380       dev = dev->next;                     /* point to the new device */
1381       if (dev == NULL) {
1382         printk("eth%d: Device not initialised, insufficient memory\n",
1383                num_eth);
1384       } else {
1385         /*
1386         ** If the memory was allocated, point to the new memory area
1387         ** and initialize it (name, I/O address, next device (NULL) and
1388         ** initialisation probe routine).
1389         */
1390         dev->name = (char *)(dev + sizeof(struct device));
1391         if (num_eth > 9999) {
1392           sprintf(dev->name,"eth????");    /* New device name */
1393         } else {
1394           sprintf(dev->name,"eth%d", num_eth);/* New device name */
1395         }
1396         dev->base_addr = iobase;           /* assign the io address */
1397         dev->next = NULL;                  /* mark the end of list */
1398         dev->init = &de4x5_probe;          /* initialisation routine */
1399         num_de4x5s++;
1400       }
1401     }
1402     ret = dev;                             /* return current struct, or NULL */
1403   
1404     /*
1405     ** Now figure out what to do with the autoprobe that has to be inserted.
1406     ** Firstly, search the (possibly altered) list for an empty space.
1407     */
1408     if (ret != NULL) {
1409       if (addAutoProbe) {
1410         for (; (tmp->next!=NULL) && (tmp->base_addr!=0xffe0); tmp=tmp->next);
1411 
1412         /*
1413         ** If no more device structures and can't use the current one, malloc
1414         ** one up. If memory could not be allocated, print an error message.
1415         */
1416         if ((tmp->next == NULL) && !(tmp->base_addr == 0xffe0)) {
1417           tmp->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1418                                                GFP_KERNEL);
1419           tmp = tmp->next;                     /* point to the new device */
1420           if (tmp == NULL) {
1421             printk("%s: Insufficient memory to extend the device list.\n", 
1422                    dev->name);
1423           } else {
1424             /*
1425             ** If the memory was allocated, point to the new memory area
1426             ** and initialize it (name, I/O address, next device (NULL) and
1427             ** initialisation probe routine).
1428             */
1429             tmp->name = (char *)(tmp + sizeof(struct device));
1430             if (num_eth > 9999) {
1431               sprintf(tmp->name,"eth????");       /* New device name */
1432             } else {
1433               sprintf(tmp->name,"eth%d", num_eth);/* New device name */
1434             }
1435             tmp->base_addr = 0;                /* re-insert the io address */
1436             tmp->next = NULL;                  /* mark the end of list */
1437             tmp->init = init;                  /* initialisation routine */
1438           }
1439         } else {                               /* structure already exists */
1440           tmp->base_addr = 0;                  /* re-insert the io address */
1441         }
1442       }
1443     }
1444   } else {
1445     ret = dev;
1446   }
1447 
1448   return ret;
1449 }
1450 
1451 /*
1452 ** Auto configure the media here rather than setting the port at compile
1453 ** time. This routine is called by de4x5_init() when a loss of media is
1454 ** detected (excessive collisions, loss of carrier, no carrier or link fail
1455 ** [TP]) to check whether the user has been sneaky and changed the port on us.
1456 */
1457 static int autoconf_media(struct device *dev)
     /*  */
1458 {
1459   struct de4x5_private *lp = (struct de4x5_private *)dev->priv;
1460   int media, entry, iobase = dev->base_addr;
1461   char frame[64];
1462   u_long i, omr, sisr, linkBad;
1463 /*  u_long t_330ms = 920000;*/
1464   u_long t_3s    = 8000000;
1465 
1466   /* Set up for TP port, with LEDs */
1467   media = TP;
1468   RESET_SIA;
1469   outl(SICR_OE57 | SICR_SEL | SICR_SRL, DE4X5_SICR);
1470 
1471   /* Test the TP port */
1472   for (linkBad=1,i=0;i<t_3s && linkBad;i++) {
1473     if (((sisr = inl(DE4X5_SISR)) & SISR_LKF) == 0) linkBad = 0;
1474     if (sisr & SISR_NCR) break;
1475   }
1476     
1477   if (linkBad) {
1478     /* Set up for BNC (Thinwire) port, with LEDs */
1479     media = BNC;
1480     RESET_SIA;
1481     outl(SIGR_JCK | SIGR_HUJ, DE4X5_SIGR);
1482     outl(STRR_CLD | STRR_CSQ | STRR_RSQ | STRR_DREN | STRR_ECEN, DE4X5_STRR);
1483     outl(SICR_OE57| SICR_OE24 | SICR_OE13 | SICR_SEL |
1484                                             SICR_AUI | SICR_SRL, DE4X5_SICR);
1485 
1486     /* Wait 330ms */
1487     dce_ms_delay(330);
1488 /*    for (i=0; i<t_330ms; i++) {
1489       sisr = inl(DE4X5_SISR);
1490     }
1491 */
1492     /* Make up a dummy packet with CRC error */
1493     create_packet(dev, frame, sizeof(frame));
1494 
1495     /* Setup the packet descriptor */
1496     entry = lp->tx_new;                        /* Remember the ring position */
1497     load_packet(dev, frame, TD_LS | TD_FS | TD_AC | sizeof(frame), NULL);
1498 
1499     /* Start the TX process */
1500     omr = inl(DE4X5_OMR);
1501     outl(omr|OMR_ST, DE4X5_OMR);
1502 
1503     /* Update pointers */
1504     lp->tx_new = (++lp->tx_new) % lp->txRingSize;
1505     lp->tx_old = lp->tx_new;
1506 
1507     /* 
1508     ** Poll for completion of frame (interrupts are disabled for now)...
1509     ** Allow upto 3 seconds to complete.
1510     */
1511     for (linkBad=1,i=0;i<t_3s && linkBad;i++) {
1512       if ((inl(DE4X5_SISR) & SISR_NCR) == 1) break;
1513       if (lp->tx_ring[entry].status >= 0) linkBad=0;
1514     }
1515     
1516     outl(omr, DE4X5_OMR);                        /* Stop everything! */
1517 
1518     if (linkBad || (lp->tx_ring[entry].status & TD_ES)) {
1519       /* Set up for AUI (Thickwire) port, with LEDs */
1520       media = AUI;
1521       RESET_SIA;
1522       outl(SIGR_JCK | SIGR_HUJ, DE4X5_SIGR);
1523       outl(STRR_CLD | STRR_CSQ | STRR_RSQ | STRR_DREN | STRR_ECEN, DE4X5_STRR);
1524       outl(SICR_OE57| SICR_SEL | SICR_AUI | SICR_SRL, DE4X5_SICR);
1525       
1526       /* Wait 330ms */
1527       dce_ms_delay(330);
1528 
1529       /* Setup the packet descriptor */
1530       entry = lp->tx_new;                      /* Remember the ring position */
1531       load_packet(dev, frame, TD_LS | TD_FS | TD_AC | sizeof(frame), NULL);
1532       
1533       /* Start the TX process */
1534       omr = inl(DE4X5_OMR);
1535       outl(omr|OMR_ST, DE4X5_OMR);
1536 
1537       /* Update pointers */
1538       lp->tx_new = (++lp->tx_new) % lp->txRingSize;
1539       lp->tx_old = lp->tx_new;
1540 
1541       /* 
1542       ** Poll for completion of frame (interrupts are disabled for now)...
1543       ** Allow 3 seconds to complete.
1544       */
1545       for (linkBad=1,i=0;i<t_3s && linkBad;i++) {
1546         if ((inl(DE4X5_SISR) & SISR_NCR) == 1) break;
1547         if (lp->tx_ring[entry].status >= 0) linkBad=0;
1548       }
1549     
1550       outl(omr, DE4X5_OMR);                        /* Stop everything! */
1551 
1552       if (linkBad || (lp->tx_ring[entry].status & TD_ES)) {
1553         /* Reset the SIA */
1554         outl(SICR_RESET, DE4X5_SICR);        /* Reset SIA connectivity regs */
1555         outl(STRR_RESET, DE4X5_STRR);        /* Write reset values */
1556         outl(SIGR_RESET, DE4X5_SIGR);        /* Write reset values */
1557 
1558         media = NC;
1559       }
1560     } 
1561   }
1562 
1563   if (de4x5_debug >= 1 ) {
1564     printk("%s: Media is %s.\n",dev->name, 
1565                                  (media == NC  ? "unconnected to this device" :
1566                                  (media == TP  ? "TP" :
1567                                  (media == BNC ? "BNC" : 
1568                                                  "AUI"))));
1569   }
1570 
1571   if (media) lp->lostMedia = 0;
1572 
1573   return media;
1574 }
1575 
1576 /*
1577 ** Create an Ethernet packet with an invalid CRC
1578 */
1579 static void create_packet(struct device *dev, char *frame, int len)
     /*  */
1580 {
1581   int i, j;
1582   char *buf = frame;
1583 
1584   for (i=0; i<ETH_ALEN; i++) {             /* Use this source address */
1585     *buf++ = dev->dev_addr[i];
1586   }
1587   for (i=0; i<ETH_ALEN; i++) {             /* Use this destination address */
1588     *buf++ = dev->dev_addr[i];
1589   }
1590   for (j=1; j>=0; j--) {                   /* Packet length (2 bytes) */
1591     *buf++ = (char) ((len >> 8*j) & 0xff);
1592   }
1593   *buf++ = 0;                              /* Data */
1594 
1595   for (i=len-4; i<len; i++) {              /* CRC */
1596     buf[i] = 0;
1597   }
1598   
1599   return;
1600 }
1601 
1602 /*
1603 ** Get the timer ticks from the PIT
1604 */
1605 static u_short dce_get_ticks(void)
     /*  */
1606 {
1607   u_short ticks = 0;
1608   
1609   /* Command 8254 to latch T0's count */
1610   outb(TIMER_PORT, TIMER_LATCH);
1611   
1612   /* Read the counter */
1613   ticks = inb(TIMER_READ);
1614   ticks |= (inb(TIMER_READ) << 8);
1615   
1616   return ticks;
1617 }
1618 
1619 /*
1620 ** Known delay in microseconds
1621 */
1622 static void dce_us_delay(u_long usec)
     /*  */
1623 {
1624   u_long i, start, now, quant=(DELAY_QUANT*1000)/TIMER_TICK+1;
1625   
1626   for (i=0; i<usec/DELAY_QUANT; i++) {
1627     start=dce_get_ticks();  
1628     for (now=start; (start-now)<quant;) {
1629       now=dce_get_ticks();
1630       if (now > start) {         /* Wrapped counter counting down */
1631         quant -= start;
1632         start = (1 << TIMER_WIDTH);
1633       }
1634     }
1635   }
1636 
1637   return;
1638 }
1639 
1640 /*
1641 ** Known delay in milliseconds
1642 */
1643 static void dce_ms_delay(u_long msec)
     /*  */
1644 {
1645   u_long i;
1646   
1647   for (i=0; i<msec; i++) {
1648     dce_us_delay(1000);
1649   }
1650 
1651   return;
1652 }
1653 
1654 
1655 /*
1656 ** Look for a particular board name in the EISA configuration space
1657 */
1658 static void EISA_signature(char *name, short iobase)
     /*  */
1659 {
1660   unsigned long i;
1661   char *signatures[] = DE4X5_SIGNATURE;
1662   char ManCode[8];
1663   union {
1664     u_long ID;
1665     u_char Id[4];
1666   } Eisa;
1667 
1668   strcpy(name, "");
1669   Eisa.ID = inl(iobase);
1670 
1671   ManCode[0]=(((Eisa.Id[0]>>2)&0x1f)+0x40);
1672   ManCode[1]=(((Eisa.Id[1]&0xe0)>>5)+((Eisa.Id[0]&0x03)<<3)+0x40);
1673   ManCode[2]=(((Eisa.Id[2]>>4)&0x0f)+0x30);
1674   ManCode[3]=((Eisa.Id[2]&0x0f)+0x30);
1675   ManCode[4]=(((Eisa.Id[3]>>4)&0x0f)+0x30);
1676   ManCode[5]='\0';
1677 
1678   for (i=0;*signatures[i] != '\0' && *name == '\0';i++) {
1679     if (strstr(ManCode, signatures[i]) != NULL) {
1680       strcpy(name,ManCode);
1681     }
1682   }
1683   
1684   return;                                   /* return the device name string */
1685 }
1686 
1687 /*
1688 ** Look for a special sequence in the Ethernet station address PROM that
1689 ** is common across all DIGITAL network adapter products.
1690 ** 
1691 ** Search the Ethernet address ROM for the signature. Since the ROM address
1692 ** counter can start at an arbitrary point, the search must include the entire
1693 ** probe sequence length plus the (length_of_the_signature - 1).
1694 ** Stop the search IMMEDIATELY after the signature is found so that the
1695 ** PROM address counter is correctly positioned at the start of the
1696 ** ethernet address for later read out.
1697 */
1698 
1699 static int DevicePresent(short aprom_addr)
     /*  */
1700 {
1701   union {
1702     struct {
1703       u_long a;
1704       u_long b;
1705     } llsig;
1706     char Sig[sizeof(long) << 1];
1707   } dev;
1708   char data;
1709   long i, j, tmp;
1710   short sigLength;
1711   int status = 0;
1712   struct bus_type *lp = &bus;
1713 
1714   dev.llsig.a = ETH_PROM_SIG;
1715   dev.llsig.b = ETH_PROM_SIG;
1716   sigLength = sizeof(long) << 1;
1717 
1718   for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
1719     if (lp->bus == PCI) {
1720       while ((tmp = inl(aprom_addr)) < 0);
1721       data = (char)tmp;
1722     } else {
1723       data = inb(aprom_addr);
1724     }
1725     if (dev.Sig[j] == data) {   /* track signature */
1726       j++;
1727     } else {                    /* lost signature; begin search again */
1728       if (data == dev.Sig[0]) {
1729         j=1;
1730       } else {
1731         j=0;
1732       }
1733     }
1734   }
1735 
1736   if (j!=sigLength) {
1737     status = -ENODEV;           /* search failed */
1738   }
1739 
1740   return status;
1741 }
1742 
1743 static int aprom_crc(struct device *dev)
     /*  */
1744 {
1745   int iobase = dev->base_addr;
1746   long i, k, tmp;
1747   unsigned short j,chksum;
1748   unsigned char status = 0;
1749   struct bus_type *lp = &bus;
1750 
1751   for (i=0,k=0,j=0;j<3;j++) {
1752     k <<= 1 ;
1753     if (k > 0xffff) k-=0xffff;
1754 
1755     if (lp->bus == PCI) {
1756       while ((tmp = inl(DE4X5_APROM)) < 0);
1757       k += (u_char) tmp;
1758       dev->dev_addr[i++] = (u_char) tmp;
1759       while ((tmp = inl(DE4X5_APROM)) < 0);
1760       k += (u_short) (tmp << 8);
1761       dev->dev_addr[i++] = (u_char) tmp;
1762     } else {
1763       k += (u_char) (tmp = inb(EISA_APROM));
1764       dev->dev_addr[i++] = (u_char) tmp;
1765       k += (u_short) ((tmp = inb(EISA_APROM)) << 8);
1766       dev->dev_addr[i++] = (u_char) tmp;
1767     }
1768 
1769     if (k > 0xffff) k-=0xffff;
1770   }
1771   if (k == 0xffff) k=0;
1772 
1773   if (lp->bus == PCI) {
1774     while ((tmp = inl(DE4X5_APROM)) < 0);
1775     chksum = (u_char) tmp;
1776     while ((tmp = inl(DE4X5_APROM)) < 0);
1777     chksum |= (u_short) (tmp << 8);
1778   } else {
1779     chksum = (u_char) inb(EISA_APROM);
1780     chksum |= (u_short) (inb(EISA_APROM) << 8);
1781   }
1782 
1783   if (k != chksum) status = -1;
1784 
1785   return status;
1786 }
1787 
1788 /*
1789 ** Perform IOCTL call functions here. Some are privileged operations and the
1790 ** effective uid is checked in those cases.
1791 */
1792 static int de4x5_ioctl(struct device *dev, struct ifreq *rq, int cmd)
     /*  */
1793 {
1794   struct de4x5_private *lp = (struct de4x5_private *)dev->priv;
1795   struct de4x5_ioctl *ioc = (struct de4x5_ioctl *) &rq->ifr_data;
1796   int i, j, iobase = dev->base_addr, status = 0;
1797   u_long omr;
1798   union {
1799     unsigned char  addr[(HASH_TABLE_LEN * ETH_ALEN)];
1800     unsigned short sval[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1801     unsigned long  lval[(HASH_TABLE_LEN * ETH_ALEN) >> 2];
1802   } tmp;
1803 
1804   switch(ioc->cmd) {
1805   case DE4X5_GET_HWADDR:             /* Get the hardware address */
1806     for (i=0; i<ETH_ALEN; i++) {
1807       tmp.addr[i] = dev->dev_addr[i];
1808     }
1809     ioc->len = ETH_ALEN;
1810     memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1811 
1812     break;
1813   case DE4X5_SET_HWADDR:             /* Set the hardware address */
1814     if (suser()) {
1815       int offset;
1816       char *pa;
1817       u_long omr;
1818 
1819       memcpy_fromfs(tmp.addr,ioc->data,ETH_ALEN);
1820       for (i=0; i<ETH_ALEN; i++) {
1821         dev->dev_addr[i] = tmp.addr[i];
1822       }
1823       omr = inl(DE4X5_OMR);
1824       if (omr & OMR_HP) {
1825         offset = IMPERF_PA_OFFSET;
1826       } else {
1827         offset = PERF_PA_OFFSET;
1828       }
1829       /* Insert the physical address */
1830       for (pa=lp->setup_frame+offset, i=0; i<ETH_ALEN; i++) {
1831         *(pa + i) = dev->dev_addr[i];
1832         if (i & 0x01) pa += 2;
1833       }
1834       /* Set up the descriptor and give ownership to the card */
1835       while (set_bit(0, (void *)&dev->tbusy) != 0); /* Wait for lock to free */
1836       load_packet(dev, lp->setup_frame, TD_IC | HASH_F | TD_SET | 
1837                                                         SETUP_FRAME_LEN, NULL);
1838       lp->tx_new = (++lp->tx_new) % lp->txRingSize;
1839       outl(POLL_DEMAND, DE4X5_TPD);                /* Start the TX */
1840       dev->tbusy = 0;                              /* Unlock the TX ring */
1841 
1842     } else {
1843       status = -EPERM;
1844     }
1845 
1846     break;
1847   case DE4X5_SET_PROM:               /* Set Promiscuous Mode */
1848     if (suser()) {
1849       omr = inl(DE4X5_OMR);
1850       omr |= OMR_PR;
1851       omr &= ~OMR_PM;
1852       outl(omr, DE4X5_OMR);
1853     } else {
1854       status = -EPERM;
1855     }
1856 
1857     break;
1858   case DE4X5_CLR_PROM:               /* Clear Promiscuous Mode */
1859     if (suser()) {
1860       omr = inl(DE4X5_OMR);
1861       omr &= ~OMR_PR;
1862       outb(omr, DE4X5_OMR);
1863     } else {
1864       status = -EPERM;
1865     }
1866 
1867     break;
1868   case DE4X5_SAY_BOO:                /* Say "Boo!" to the kernel log file */
1869     printk("%s: Boo!\n", dev->name);
1870 
1871     break;
1872   case DE4X5_GET_MCA:                /* Get the multicast address table */
1873     ioc->len = (HASH_TABLE_LEN >> 3);
1874     memcpy_tofs(ioc->data, lp->setup_frame, 192); 
1875 
1876     break;
1877   case DE4X5_SET_MCA:                /* Set a multicast address */
1878     if (suser()) {
1879       if (ioc->len != HASH_TABLE_LEN) {         /* MCA changes */
1880         memcpy_fromfs(tmp.addr, ioc->data, ETH_ALEN * ioc->len);
1881       }
1882       set_multicast_list(dev, ioc->len, tmp.addr);
1883     } else {
1884       status = -EPERM;
1885     }
1886 
1887     break;
1888   case DE4X5_CLR_MCA:                /* Clear all multicast addresses */
1889     if (suser()) {
1890       set_multicast_list(dev, 0, NULL);
1891     } else {
1892       status = -EPERM;
1893     }
1894 
1895     break;
1896   case DE4X5_MCA_EN:                 /* Enable multicast addressing */
1897     if (suser()) {
1898       omr = inl(DE4X5_OMR);
1899       omr |= OMR_PM;
1900       omr &= ~OMR_PR;
1901       outl(omr, DE4X5_OMR);
1902     } else {
1903       status = -EPERM;
1904     }
1905 
1906     break;
1907   case DE4X5_GET_STATS:              /* Get the driver statistics */
1908     cli();
1909     memcpy_tofs(ioc->data, &lp->pktStats, sizeof(lp->pktStats)); 
1910     ioc->len = DE4X5_PKT_STAT_SZ;
1911     sti();
1912 
1913     break;
1914   case DE4X5_CLR_STATS:              /* Zero out the driver statistics */
1915     if (suser()) {
1916       cli();
1917       memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1918       sti();
1919     } else {
1920       status = -EPERM;
1921     }
1922 
1923     break;
1924   case DE4X5_GET_OMR:                /* Get the OMR Register contents */
1925     tmp.addr[0] = inl(DE4X5_OMR);
1926     memcpy_tofs(ioc->data, tmp.addr, 1);
1927 
1928     break;
1929   case DE4X5_SET_OMR:                /* Set the OMR Register contents */
1930     if (suser()) {
1931       memcpy_fromfs(tmp.addr, ioc->data, 1);
1932       outl(tmp.addr[0], DE4X5_OMR);
1933     } else {
1934       status = -EPERM;
1935     }
1936 
1937     break;
1938   case DE4X5_GET_REG:                /* Get the DE4X5 Registers */
1939     tmp.lval[0] = inl(DE4X5_STS);
1940     tmp.lval[1] = inl(DE4X5_BMR);
1941     tmp.lval[2] = inl(DE4X5_IMR);
1942     tmp.lval[3] = inl(DE4X5_OMR);
1943     tmp.lval[4] = inl(DE4X5_SISR);
1944     tmp.lval[5] = inl(DE4X5_SICR);
1945     tmp.lval[6] = inl(DE4X5_STRR);
1946     tmp.lval[7] = inl(DE4X5_SIGR);
1947     memcpy_tofs(ioc->data, tmp.addr, 32);
1948 
1949     break;
1950 
1951 #define DE4X5_DUMP              0x0f /* Dump the DE4X5 Status */
1952 
1953   case DE4X5_DUMP:
1954     j = 0;
1955     tmp.addr[j++] = dev->irq;
1956     for (i=0; i<ETH_ALEN; i++) {
1957       tmp.addr[j++] = dev->dev_addr[i];
1958     }
1959     tmp.addr[j++] = lp->rxRingSize;
1960     tmp.lval[j>>2] = (long)lp->rx_ring; j+=4;
1961     tmp.lval[j>>2] = (long)lp->tx_ring; j+=4;
1962 
1963     for (i=0;i<lp->rxRingSize-1;i++){
1964       if (i < 3) {
1965         tmp.lval[j>>2] = (long)&lp->rx_ring[i].status; j+=4;
1966       }
1967     }
1968     tmp.lval[j>>2] = (long)&lp->rx_ring[i].status; j+=4;
1969     for (i=0;i<lp->txRingSize-1;i++){
1970       if (i < 3) {
1971         tmp.lval[j>>2] = (long)&lp->tx_ring[i].status; j+=4;
1972       }
1973     }
1974     tmp.lval[j>>2] = (long)&lp->tx_ring[i].status; j+=4;
1975 
1976     for (i=0;i<lp->rxRingSize-1;i++){
1977       if (i < 3) {
1978         tmp.lval[j>>2] = (long)lp->rx_ring[i].buf; j+=4;
1979       }
1980     }
1981     tmp.lval[j>>2] = (long)lp->rx_ring[i].buf; j+=4;
1982     for (i=0;i<lp->txRingSize-1;i++){
1983       if (i < 3) {
1984         tmp.lval[j>>2] = (long)lp->tx_ring[i].buf; j+=4;
1985       }
1986     }
1987     tmp.lval[j>>2] = (long)lp->tx_ring[i].buf; j+=4;
1988 
1989     for (i=0;i<lp->rxRingSize;i++){
1990       tmp.lval[j>>2] = lp->rx_ring[i].status; j+=4;
1991     }
1992     for (i=0;i<lp->txRingSize;i++){
1993       tmp.lval[j>>2] = lp->tx_ring[i].status; j+=4;
1994     }
1995 
1996     tmp.lval[j>>2] = inl(DE4X5_STS); j+=4;
1997     tmp.lval[j>>2] = inl(DE4X5_BMR); j+=4;
1998     tmp.lval[j>>2] = inl(DE4X5_IMR); j+=4;
1999     tmp.lval[j>>2] = inl(DE4X5_OMR); j+=4;
2000     tmp.lval[j>>2] = inl(DE4X5_SISR); j+=4;
2001     tmp.lval[j>>2] = inl(DE4X5_SICR); j+=4;
2002     tmp.lval[j>>2] = inl(DE4X5_STRR); j+=4;
2003     tmp.lval[j>>2] = inl(DE4X5_SIGR); j+=4; 
2004 
2005     tmp.addr[j++] = lp->txRingSize;
2006     tmp.addr[j++] = dev->tbusy;
2007 
2008     ioc->len = j;
2009     memcpy_tofs(ioc->data, tmp.addr, ioc->len);
2010 
2011     break;
2012   default:
2013     status = -EOPNOTSUPP;
2014   }
2015 
2016   return status;
2017 }
2018 
2019 #ifdef MODULE
2020 char kernel_version[] = UTS_RELEASE;
2021 static struct device thisDE4X5 = {
2022   "        ", /* device name inserted by /linux/drivers/net/net_init.c */
2023   0, 0, 0, 0,
2024   0x2000, 10, /* I/O address, IRQ */
2025   0, 0, 0, NULL, de4x5_probe };
2026         
2027 int io=0x000b;  /* <--- EDIT THESE LINES FOR YOUR CONFIGURATION */
2028 int irq=10;     /* or use the insmod io= irq= options           */
2029 
2030 int
2031 init_module(void)
     /*  */
2032 {
2033   thisDE4X5.base_addr=io;
2034   thisDE4X5.irq=irq;
2035   if (register_netdev(&thisDE4X5) != 0)
2036     return -EIO;
2037   return 0;
2038 }
2039 
2040 void
2041 cleanup_module(void)
     /*  */
2042 {
2043   struct de4x5_private *lp = (struct de4x5_private *) thisDE4X5.priv;
2044 
2045   if (MOD_IN_USE) {
2046     printk("%s: device busy, remove delayed\n",thisDE4X5.name);
2047   } else {
2048     release_region(thisDE4X5.base_addr, (lp->bus == PCI ? 
2049                                                      DE4X5_PCI_TOTAL_SIZE :
2050                                                      DE4X5_EISA_TOTAL_SIZE));
2051     if (lp) {
2052       kfree_s(lp->rx_ring[0].buf, RX_BUFF_SZ * NUM_RX_DESC + LWPAD);
2053     }
2054     kfree_s(thisDE4X5.priv, sizeof(struct de4x5_private) + LWPAD);
2055     thisDE4X5.priv = NULL;
2056 
2057     unregister_netdev(&thisDE4X5);
2058   }
2059 }
2060 #endif /* MODULE */
2061 
2062 
2063 /*
2064  * Local variables:
2065  *  kernel-compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c de4x5.c"
2066  *
2067  *  module-compile-command: "gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c de4x5.c"
2068  * End:
2069  */
2070 
2071
/* */
root/drivers/net/de4x5.c

DEFINITIONS
