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*/
1 /* lance.c: An AMD LANCE ethernet driver for linux. */
2 /*
3 Written 1993,1994,1995 by Donald Becker.
4
5 Copyright 1993 United States Government as represented by the
6 Director, National Security Agency.
7 This software may be used and distributed according to the terms
8 of the GNU Public License, incorporated herein by reference.
9
10 This driver is for the Allied Telesis AT1500 and HP J2405A, and should work
11 with most other LANCE-based bus-master (NE2100 clone) ethercards.
12
13 The author may be reached as becker@CESDIS.gsfc.nasa.gov, or C/O
14 Center of Excellence in Space Data and Information Sciences
15 Code 930.5, Goddard Space Flight Center, Greenbelt MD 20771
16 */
17
18 static char *version = "lance.c:v1.08 4/10/95 dplatt@3do.com\n";
19
20 #include <linux/config.h>
21 #include <linux/kernel.h>
22 #include <linux/sched.h>
23 #include <linux/string.h>
24 #include <linux/ptrace.h>
25 #include <linux/errno.h>
26 #include <linux/ioport.h>
27 #include <linux/malloc.h>
28 #include <linux/interrupt.h>
29 #include <linux/pci.h>
30 #include <linux/bios32.h>
31 #include <asm/bitops.h>
32 #include <asm/io.h>
33 #include <asm/dma.h>
34
35 #include <linux/netdevice.h>
36 #include <linux/etherdevice.h>
37 #include <linux/skbuff.h>
38
39 struct device *init_etherdev(struct device *dev, int sizeof_private,
40 unsigned long *mem_startp);
41 static unsigned int lance_portlist[] = {0x300, 0x320, 0x340, 0x360, 0};
42 unsigned long lance_probe1(int ioaddr, unsigned long mem_start);
43
44 #ifdef HAVE_DEVLIST
45 struct netdev_entry lance_drv =
46 {"lance", lance_probe1, LANCE_TOTAL_SIZE, lance_portlist};
47 #endif
48
49 #ifdef LANCE_DEBUG
50 int lance_debug = LANCE_DEBUG;
51 #else
52 int lance_debug = 1;
53 #endif
54
55 /*
56 Theory of Operation
57
58 I. Board Compatibility
59
60 This device driver is designed for the AMD 79C960, the "PCnet-ISA
61 single-chip ethernet controller for ISA". This chip is used in a wide
62 variety of boards from vendors such as Allied Telesis, HP, Kingston,
63 and Boca. This driver is also intended to work with older AMD 7990
64 designs, such as the NE1500 and NE2100, and newer 79C961. For convenience,
65 I use the name LANCE to refer to all of the AMD chips, even though it properly
66 refers only to the original 7990.
67
68 II. Board-specific settings
69
70 The driver is designed to work the boards that use the faster
71 bus-master mode, rather than in shared memory mode. (Only older designs
72 have on-board buffer memory needed to support the slower shared memory mode.)
73
74 Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA
75 channel. This driver probes the likely base addresses:
76 {0x300, 0x320, 0x340, 0x360}.
77 After the board is found it generates a DMA-timeout interrupt and uses
78 autoIRQ to find the IRQ line. The DMA channel can be set with the low bits
79 of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is
80 probed for by enabling each free DMA channel in turn and checking if
81 initialization succeeds.
82
83 The HP-J2405A board is an exception: with this board it's easy to read the
84 EEPROM-set values for the base, IRQ, and DMA. (Of course you must already
85 _know_ the base address -- that field is for writing the EEPROM.)
86
87 III. Driver operation
88
89 IIIa. Ring buffers
90 The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes
91 the base and length of the data buffer, along with status bits. The length
92 of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of
93 the buffer length (rather than being directly the buffer length) for
94 implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to
95 ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries
96 needlessly uses extra space and reduces the chance that an upper layer will
97 be able to reorder queued Tx packets based on priority. Decreasing the number
98 of entries makes it more difficult to achieve back-to-back packet transmission
99 and increases the chance that Rx ring will overflow. (Consider the worst case
100 of receiving back-to-back minimum-sized packets.)
101
102 The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver
103 statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to
104 avoid the administrative overhead. For the Rx side this avoids dynamically
105 allocating full-sized buffers "just in case", at the expense of a
106 memory-to-memory data copy for each packet received. For most systems this
107 is a good tradeoff: the Rx buffer will always be in low memory, the copy
108 is inexpensive, and it primes the cache for later packet processing. For Tx
109 the buffers are only used when needed as low-memory bounce buffers.
110
111 IIIB. 16M memory limitations.
112 For the ISA bus master mode all structures used directly by the LANCE,
113 the initialization block, Rx and Tx rings, and data buffers, must be
114 accessible from the ISA bus, i.e. in the lower 16M of real memory.
115 This is a problem for current Linux kernels on >16M machines. The network
116 devices are initialized after memory initialization, and the kernel doles out
117 memory from the top of memory downward. The current solution is to have a
118 special network initialization routine that's called before memory
119 initialization; this will eventually be generalized for all network devices.
120 As mentioned before, low-memory "bounce-buffers" are used when needed.
121
122 IIIC. Synchronization
123 The driver runs as two independent, single-threaded flows of control. One
124 is the send-packet routine, which enforces single-threaded use by the
125 dev->tbusy flag. The other thread is the interrupt handler, which is single
126 threaded by the hardware and other software.
127
128 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
129 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
130 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
131 the 'lp->tx_full' flag.
132
133 The interrupt handler has exclusive control over the Rx ring and records stats
134 from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
135 we can't avoid the interrupt overhead by having the Tx routine reap the Tx
136 stats.) After reaping the stats, it marks the queue entry as empty by setting
137 the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the
138 tx_full and tbusy flags.
139
140 */
141
142 /* Set the number of Tx and Rx buffers, using Log_2(# buffers).
143 Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
144 That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4). */
145 #ifndef LANCE_LOG_TX_BUFFERS
146 #define LANCE_LOG_TX_BUFFERS 4
147 #define LANCE_LOG_RX_BUFFERS 4
148 #endif
149
150 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
151 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
152 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
153
154 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
155 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
156 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
157
158 #define PKT_BUF_SZ 1544
159
160 /* Offsets from base I/O address. */
161 #define LANCE_DATA 0x10
162 #define LANCE_ADDR 0x12
163 #define LANCE_RESET 0x14
164 #define LANCE_BUS_IF 0x16
165 #define LANCE_TOTAL_SIZE 0x18
166
167 /* The LANCE Rx and Tx ring descriptors. */
168 struct lance_rx_head {
169 int base;
170 short buf_length; /* This length is 2s complement (negative)! */
171 short msg_length; /* This length is "normal". */
172 };
173
174 struct lance_tx_head {
175 int base;
176 short length; /* Length is 2s complement (negative)! */
177 short misc;
178 };
179
180 /* The LANCE initialization block, described in databook. */
181 struct lance_init_block {
182 unsigned short mode; /* Pre-set mode (reg. 15) */
183 unsigned char phys_addr[6]; /* Physical ethernet address */
184 unsigned filter[2]; /* Multicast filter (unused). */
185 /* Receive and transmit ring base, along with extra bits. */
186 unsigned rx_ring; /* Tx and Rx ring base pointers */
187 unsigned tx_ring;
188 };
189
190 struct lance_private {
191 char *name;
192 void *pad;
193 /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
194 struct lance_rx_head rx_ring[RX_RING_SIZE];
195 struct lance_tx_head tx_ring[TX_RING_SIZE];
196 struct lance_init_block init_block;
197 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
198 struct sk_buff* tx_skbuff[TX_RING_SIZE];
199 long rx_buffs; /* Address of Rx and Tx buffers. */
200 /* Tx low-memory "bounce buffer" address. */
201 char (*tx_bounce_buffs)[PKT_BUF_SZ];
202 int cur_rx, cur_tx; /* The next free ring entry */
203 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
204 int dma;
205 struct enet_statistics stats;
206 unsigned char chip_version; /* See lance_chip_type. */
207 char tx_full;
208 char lock;
209 int pad0, pad1; /* Used for 8-byte alignment */
210 };
211
212 #define LANCE_MUST_PAD 0x00000001
213 #define LANCE_ENABLE_AUTOSELECT 0x00000002
214 #define LANCE_MUST_REINIT_RING 0x00000004
215 #define LANCE_MUST_UNRESET 0x00000008
216 #define LANCE_HAS_MISSED_FRAME 0x00000010
217
218 /* A mapping from the chip ID number to the part number and features.
219 These are from the datasheets -- in real life the '970 version
220 reportedly has the same ID as the '965. */
221 static struct lance_chip_type {
222 int id_number;
223 char *name;
224 int flags;
225 } chip_table[] = {
226 {0x0000, "LANCE 7990", /* Ancient lance chip. */
227 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
228 {0x0003, "PCnet/ISA 79C960", /* 79C960 PCnet/ISA. */
229 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
230 LANCE_HAS_MISSED_FRAME},
231 {0x2260, "PCnet/ISA+ 79C961", /* 79C961 PCnet/ISA+, Plug-n-Play. */
232 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
233 LANCE_HAS_MISSED_FRAME},
234 {0x2420, "PCnet/PCI 79C970", /* 79C970 or 79C974 PCnet-SCSI, PCI. */
235 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
236 LANCE_HAS_MISSED_FRAME},
237 /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call
238 it the PCnet32. */
239 {0x2430, "PCnet32", /* 79C965 PCnet for VL bus. */
240 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
241 LANCE_HAS_MISSED_FRAME},
242 {0x0, "PCnet (unknown)",
243 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
244 LANCE_HAS_MISSED_FRAME},
245 };
246
247 enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, LANCE_UNKNOWN=5};
248
249 /* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
250 static unsigned char pci_irq_line = 0;
251
252 static int lance_open(struct device *dev);
253 static void lance_init_ring(struct device *dev);
254 static int lance_start_xmit(struct sk_buff *skb, struct device *dev);
255 static int lance_rx(struct device *dev);
256 static void lance_interrupt(int irq, struct pt_regs *regs);
257 static int lance_close(struct device *dev);
258 static struct enet_statistics *lance_get_stats(struct device *dev);
259 #ifdef HAVE_MULTICAST
260 static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
261 #endif
262
263
264
265 /* This lance probe is unlike the other board probes in 1.0.*. The LANCE may
266 have to allocate a contiguous low-memory region for bounce buffers.
267 This requirement is satisfied by having the lance initialization occur
268 before the memory management system is started, and thus well before the
269 other probes. */
270
271 unsigned long lance_init(unsigned long mem_start, unsigned long mem_end)
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*/
272 {
273 int *port;
274
275 #if defined(CONFIG_PCI)
276 if (pcibios_present()) {
277 int pci_index;
278 printk("lance.c: PCI bios is present, checking for devices...\n");
279 for (pci_index = 0; pci_index < 8; pci_index++) {
280 unsigned char pci_bus, pci_device_fn;
281 unsigned long pci_ioaddr;
282 unsigned short pci_command;
283
284 if (pcibios_find_device (PCI_VENDOR_ID_AMD,
285 PCI_DEVICE_ID_AMD_LANCE, pci_index,
286 &pci_bus, &pci_device_fn) != 0)
287 break;
288 pcibios_read_config_byte(pci_bus, pci_device_fn,
289 PCI_INTERRUPT_LINE, &pci_irq_line);
290 pcibios_read_config_dword(pci_bus, pci_device_fn,
291 PCI_BASE_ADDRESS_0, &pci_ioaddr);
292 /* Remove I/O space marker in bit 0. */
293 pci_ioaddr &= ~3;
294 /* PCI Spec 2.1 states that it is either the driver or PCI card's
295 * responsibility to set the PCI Master Enable Bit if needed.
296 * (From Mark Stockton <marks@schooner.sys.hou.compaq.com>)
297 */
298 pcibios_read_config_word(pci_bus, pci_device_fn,
299 PCI_COMMAND, &pci_command);
300 if ( ! (pci_command & PCI_COMMAND_MASTER)) {
301 printk("PCI Master Bit has not been set. Setting...\n");
302 pci_command |= PCI_COMMAND_MASTER;
303 pcibios_write_config_word(pci_bus, pci_device_fn,
304 PCI_COMMAND, pci_command);
305 }
306 printk("Found PCnet/PCI at %#lx, irq %d (mem_start is %#lx).\n",
307 pci_ioaddr, pci_irq_line, mem_start);
308 mem_start = lance_probe1(pci_ioaddr, mem_start);
309 pci_irq_line = 0;
310 }
311 }
312 #endif /* defined(CONFIG_PCI) */
313
314 for (port = lance_portlist; *port; port++) {
315 int ioaddr = *port;
316
317 if ( check_region(ioaddr, LANCE_TOTAL_SIZE) == 0
318 && inb(ioaddr + 14) == 0x57
319 && inb(ioaddr + 15) == 0x57) {
320 mem_start = lance_probe1(ioaddr, mem_start);
321 }
322 }
323
324 return mem_start;
325 }
326
327 unsigned long lance_probe1(int ioaddr, unsigned long mem_start)
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328 {
329 struct device *dev;
330 struct lance_private *lp;
331 short dma_channels; /* Mark spuriously-busy DMA channels */
332 int i, reset_val, lance_version;
333 char *chipname;
334 /* Flags for specific chips or boards. */
335 unsigned char hpJ2405A = 0; /* HP ISA adaptor */
336 int hp_builtin = 0; /* HP on-board ethernet. */
337 static int did_version = 0; /* Already printed version info. */
338
339 /* First we look for special cases.
340 Check for HP's on-board ethernet by looking for 'HP' in the BIOS.
341 There are two HP versions, check the BIOS for the configuration port.
342 This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com.
343 */
344 if ( *((unsigned short *) 0x000f0102) == 0x5048) {
345 short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
346 int hp_port = ( *((unsigned char *) 0x000f00f1) & 1) ? 0x499 : 0x99;
347 /* We can have boards other than the built-in! Verify this is on-board. */
348 if ((inb(hp_port) & 0xc0) == 0x80
349 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
350 hp_builtin = hp_port;
351 }
352 /* We also recognize the HP Vectra on-board here, but check below. */
353 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
354 && inb(ioaddr+2) == 0x09);
355
356 /* Reset the LANCE. */
357 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */
358
359 /* The Un-Reset needed is only needed for the real NE2100, and will
360 confuse the HP board. */
361 if (!hpJ2405A)
362 outw(reset_val, ioaddr+LANCE_RESET);
363
364 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */
365 if (inw(ioaddr+LANCE_DATA) != 0x0004)
366 return mem_start;
367
368 /* Get the version of the chip. */
369 outw(88, ioaddr+LANCE_ADDR);
370 if (inw(ioaddr+LANCE_ADDR) != 88) {
371 lance_version = 0;
372 } else { /* Good, it's a newer chip. */
373 int chip_version = inw(ioaddr+LANCE_DATA);
374 outw(89, ioaddr+LANCE_ADDR);
375 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
376 if (lance_debug > 2)
377 printk(" LANCE chip version is %#x.\n", chip_version);
378 if ((chip_version & 0xfff) != 0x003)
379 return mem_start;
380 chip_version = (chip_version >> 12) & 0xffff;
381 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
382 if (chip_table[lance_version].id_number == chip_version)
383 break;
384 }
385 }
386
387 dev = init_etherdev(0, sizeof(struct lance_private)
388 + PKT_BUF_SZ*(RX_RING_SIZE + TX_RING_SIZE),
389 &mem_start);
390
391 chipname = chip_table[lance_version].name;
392 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
393
394 /* There is a 16 byte station address PROM at the base address.
395 The first six bytes are the station address. */
396 for (i = 0; i < 6; i++)
397 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
398
399 dev->base_addr = ioaddr;
400 request_region(ioaddr, LANCE_TOTAL_SIZE, chip_table[lance_version].name);
401
402 /* Make certain the data structures used by the LANCE are aligned. */
403 dev->priv = (void *)(((int)dev->priv + 7) & ~7);
404 lp = (struct lance_private *)dev->priv;
405 lp->name = chipname;
406 lp->rx_buffs = (long)dev->priv + sizeof(struct lance_private);
407 lp->tx_bounce_buffs = (char (*)[PKT_BUF_SZ])
408 (lp->rx_buffs + PKT_BUF_SZ*RX_RING_SIZE);
409
410 #ifndef final_version
411 /* This should never happen. */
412 if ((int)(lp->rx_ring) & 0x07) {
413 printk(" **ERROR** LANCE Rx and Tx rings not on even boundary.\n");
414 return mem_start;
415 }
416 #endif
417
418 lp->chip_version = lance_version;
419
420 lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */
421 for (i = 0; i < 6; i++)
422 lp->init_block.phys_addr[i] = dev->dev_addr[i];
423 lp->init_block.filter[0] = 0x00000000;
424 lp->init_block.filter[1] = 0x00000000;
425 lp->init_block.rx_ring = (int)lp->rx_ring | RX_RING_LEN_BITS;
426 lp->init_block.tx_ring = (int)lp->tx_ring | TX_RING_LEN_BITS;
427
428 outw(0x0001, ioaddr+LANCE_ADDR);
429 inw(ioaddr+LANCE_ADDR);
430 outw((short) (int) &lp->init_block, ioaddr+LANCE_DATA);
431 outw(0x0002, ioaddr+LANCE_ADDR);
432 inw(ioaddr+LANCE_ADDR);
433 outw(((int)&lp->init_block) >> 16, ioaddr+LANCE_DATA);
434 outw(0x0000, ioaddr+LANCE_ADDR);
435 inw(ioaddr+LANCE_ADDR);
436
437 if (pci_irq_line) {
438 dev->dma = 4; /* Native bus-master, no DMA channel needed. */
439 dev->irq = pci_irq_line;
440 } else if (hp_builtin) {
441 char dma_tbl[4] = {3, 5, 6, 0};
442 char irq_tbl[8] = {3, 4, 5, 9};
443 unsigned char port_val = inb(hp_builtin);
444 dev->dma = dma_tbl[(port_val >> 4) & 3];
445 dev->irq = irq_tbl[(port_val >> 2) & 3];
446 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
447 } else if (hpJ2405A) {
448 char dma_tbl[4] = {3, 5, 6, 7};
449 char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
450 short reset_val = inw(ioaddr+LANCE_RESET);
451 dev->dma = dma_tbl[(reset_val >> 2) & 3];
452 dev->irq = irq_tbl[(reset_val >> 4) & 7];
453 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
454 } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */
455 short bus_info;
456 outw(8, ioaddr+LANCE_ADDR);
457 bus_info = inw(ioaddr+LANCE_BUS_IF);
458 dev->dma = bus_info & 0x07;
459 dev->irq = (bus_info >> 4) & 0x0F;
460 } else {
461 /* The DMA channel may be passed in PARAM1. */
462 if (dev->mem_start & 0x07)
463 dev->dma = dev->mem_start & 0x07;
464 }
465
466 if (dev->dma == 0) {
467 /* Read the DMA channel status register, so that we can avoid
468 stuck DMA channels in the DMA detection below. */
469 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
470 (inb(DMA2_STAT_REG) & 0xf0);
471 }
472 if (dev->irq >= 2)
473 printk(" assigned IRQ %d", dev->irq);
474 else {
475 /* To auto-IRQ we enable the initialization-done and DMA error
476 interrupts. For ISA boards we get a DMA error, but VLB and PCI
477 boards will work. */
478 autoirq_setup(0);
479
480 /* Trigger an initialization just for the interrupt. */
481 outw(0x0041, ioaddr+LANCE_DATA);
482
483 dev->irq = autoirq_report(1);
484 if (dev->irq)
485 printk(", probed IRQ %d", dev->irq);
486 else {
487 printk(", failed to detect IRQ line.\n");
488 return mem_start;
489 }
490
491 /* Check for the initialization done bit, 0x0100, which means
492 that we don't need a DMA channel. */
493 if (inw(ioaddr+LANCE_DATA) & 0x0100)
494 dev->dma = 4;
495 }
496
497 if (dev->dma == 4) {
498 printk(", no DMA needed.\n");
499 } else if (dev->dma) {
500 if (request_dma(dev->dma, chipname)) {
501 printk("DMA %d allocation failed.\n", dev->dma);
502 return mem_start;
503 } else
504 printk(", assigned DMA %d.\n", dev->dma);
505 } else { /* OK, we have to auto-DMA. */
506 int dmas[] = { 5, 6, 7, 3 }, boguscnt;
507
508 for (i = 0; i < 4; i++) {
509 int dma = dmas[i];
510
511 /* Don't enable a permanently busy DMA channel, or the machine
512 will hang. */
513 if (test_bit(dma, &dma_channels))
514 continue;
515 outw(0x7f04, ioaddr+LANCE_DATA); /* Clear the memory error bits. */
516 if (request_dma(dma, chipname))
517 continue;
518 set_dma_mode(dma, DMA_MODE_CASCADE);
519 enable_dma(dma);
520
521 /* Trigger an initialization. */
522 outw(0x0001, ioaddr+LANCE_DATA);
523 for (boguscnt = 100; boguscnt > 0; --boguscnt)
524 if (inw(ioaddr+LANCE_DATA) & 0x0900)
525 break;
526 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
527 dev->dma = dma;
528 printk(", DMA %d.\n", dev->dma);
529 break;
530 } else {
531 disable_dma(dma);
532 free_dma(dma);
533 }
534 }
535 if (i == 4) { /* Failure: bail. */
536 printk("DMA detection failed.\n");
537 return mem_start;
538 }
539 }
540
541 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
542 /* Turn on auto-select of media (10baseT or BNC) so that the user
543 can watch the LEDs even if the board isn't opened. */
544 outw(0x0002, ioaddr+LANCE_ADDR);
545 outw(0x0002, ioaddr+LANCE_BUS_IF);
546 }
547
548 if (lance_debug > 0 && did_version++ == 0)
549 printk(version);
550
551 /* The LANCE-specific entries in the device structure. */
552 dev->open = &lance_open;
553 dev->hard_start_xmit = &lance_start_xmit;
554 dev->stop = &lance_close;
555 dev->get_stats = &lance_get_stats;
556 dev->set_multicast_list = &set_multicast_list;
557
558 return mem_start;
559 }
560
561
562 static int
563 lance_open(struct device *dev)
/* */
564 {
565 struct lance_private *lp = (struct lance_private *)dev->priv;
566 int ioaddr = dev->base_addr;
567 int i;
568
569 if (dev->irq == 0 ||
570 request_irq(dev->irq, &lance_interrupt, 0, lp->name)) {
571 return -EAGAIN;
572 }
573
574 /* We used to allocate DMA here, but that was silly.
575 DMA lines can't be shared! We now permanently snarf them. */
576
577 irq2dev_map[dev->irq] = dev;
578
579 /* Reset the LANCE */
580 inw(ioaddr+LANCE_RESET);
581
582 /* The DMA controller is used as a no-operation slave, "cascade mode". */
583 if (dev->dma != 4) {
584 enable_dma(dev->dma);
585 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
586 }
587
588 /* Un-Reset the LANCE, needed only for the NE2100. */
589 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
590 outw(0, ioaddr+LANCE_RESET);
591
592 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
593 /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */
594 outw(0x0002, ioaddr+LANCE_ADDR);
595 outw(0x0002, ioaddr+LANCE_BUS_IF);
596 }
597
598 if (lance_debug > 1)
599 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
600 dev->name, dev->irq, dev->dma, (int) lp->tx_ring, (int) lp->rx_ring,
601 (int) &lp->init_block);
602
603 lance_init_ring(dev);
604 /* Re-initialize the LANCE, and start it when done. */
605 outw(0x0001, ioaddr+LANCE_ADDR);
606 outw((short) (int) &lp->init_block, ioaddr+LANCE_DATA);
607 outw(0x0002, ioaddr+LANCE_ADDR);
608 outw(((int)&lp->init_block) >> 16, ioaddr+LANCE_DATA);
609
610 outw(0x0004, ioaddr+LANCE_ADDR);
611 outw(0x0915, ioaddr+LANCE_DATA);
612
613 outw(0x0000, ioaddr+LANCE_ADDR);
614 outw(0x0001, ioaddr+LANCE_DATA);
615
616 dev->tbusy = 0;
617 dev->interrupt = 0;
618 dev->start = 1;
619 i = 0;
620 while (i++ < 100)
621 if (inw(ioaddr+LANCE_DATA) & 0x0100)
622 break;
623 /*
624 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
625 * reports that doing so triggers a bug in the '974.
626 */
627 outw(0x0042, ioaddr+LANCE_DATA);
628
629 if (lance_debug > 2)
630 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
631 dev->name, i, (int) &lp->init_block, inw(ioaddr+LANCE_DATA));
632
633 return 0; /* Always succeed */
634 }
635
636 /* The LANCE has been halted for one reason or another (busmaster memory
637 arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
638 etc.). Modern LANCE variants always reload their ring-buffer
639 configuration when restarted, so we must reinitialize our ring
640 context before restarting. As part of this reinitialization,
641 find all packets still on the Tx ring and pretend that they had been
642 sent (in effect, drop the packets on the floor) - the higher-level
643 protocols will time out and retransmit. It'd be better to shuffle
644 these skbs to a temp list and then actually re-Tx them after
645 restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
646 */
647
648 static void
649 lance_purge_tx_ring(struct device *dev)
/* */
650 {
651 struct lance_private *lp = (struct lance_private *)dev->priv;
652 int i;
653
654 for (i = 0; i < TX_RING_SIZE; i++) {
655 if (lp->tx_skbuff[i]) {
656 dev_kfree_skb(lp->tx_skbuff[i],FREE_WRITE);
657 lp->tx_skbuff[i] = NULL;
658 }
659 }
660 }
661
662
663 /* Initialize the LANCE Rx and Tx rings. */
664 static void
665 lance_init_ring(struct device *dev)
/* */
666 {
667 struct lance_private *lp = (struct lance_private *)dev->priv;
668 int i;
669
670 lp->lock = 0, lp->tx_full = 0;
671 lp->cur_rx = lp->cur_tx = 0;
672 lp->dirty_rx = lp->dirty_tx = 0;
673
674 for (i = 0; i < RX_RING_SIZE; i++) {
675 lp->rx_ring[i].base = (lp->rx_buffs + i*PKT_BUF_SZ) | 0x80000000;
676 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
677 }
678 /* The Tx buffer address is filled in as needed, but we do need to clear
679 the upper ownership bit. */
680 for (i = 0; i < TX_RING_SIZE; i++) {
681 lp->tx_ring[i].base = 0;
682 }
683
684 lp->init_block.mode = 0x0000;
685 for (i = 0; i < 6; i++)
686 lp->init_block.phys_addr[i] = dev->dev_addr[i];
687 lp->init_block.filter[0] = 0x00000000;
688 lp->init_block.filter[1] = 0x00000000;
689 lp->init_block.rx_ring = (int)lp->rx_ring | RX_RING_LEN_BITS;
690 lp->init_block.tx_ring = (int)lp->tx_ring | TX_RING_LEN_BITS;
691 }
692
693 static void
694 lance_restart(struct device *dev, unsigned int csr0_bits, int must_reinit)
/* */
695 {
696 struct lance_private *lp = (struct lance_private *)dev->priv;
697
698 if (must_reinit ||
699 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
700 lance_purge_tx_ring(dev);
701 lance_init_ring(dev);
702 }
703 outw(0x0000, dev->base_addr + LANCE_ADDR);
704 outw(csr0_bits, dev->base_addr + LANCE_DATA);
705 }
706
707 static int
708 lance_start_xmit(struct sk_buff *skb, struct device *dev)
/* */
709 {
710 struct lance_private *lp = (struct lance_private *)dev->priv;
711 int ioaddr = dev->base_addr;
712 int entry;
713 unsigned long flags;
714
715 /* Transmitter timeout, serious problems. */
716 if (dev->tbusy) {
717 int tickssofar = jiffies - dev->trans_start;
718 if (tickssofar < 20)
719 return 1;
720 outw(0, ioaddr+LANCE_ADDR);
721 printk("%s: transmit timed out, status %4.4x, resetting.\n",
722 dev->name, inw(ioaddr+LANCE_DATA));
723 outw(0x0004, ioaddr+LANCE_DATA);
724 lp->stats.tx_errors++;
725 #ifndef final_version
726 {
727 int i;
728 printk(" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
729 lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
730 lp->cur_rx);
731 for (i = 0 ; i < RX_RING_SIZE; i++)
732 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
733 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
734 lp->rx_ring[i].msg_length);
735 for (i = 0 ; i < TX_RING_SIZE; i++)
736 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
737 lp->tx_ring[i].base, -lp->tx_ring[i].length,
738 lp->tx_ring[i].misc);
739 printk("\n");
740 }
741 #endif
742 lance_restart(dev, 0x0043, 1);
743
744 dev->tbusy=0;
745 dev->trans_start = jiffies;
746
747 return 0;
748 }
749
750 if (skb == NULL) {
751 dev_tint(dev);
752 return 0;
753 }
754
755 if (skb->len <= 0)
756 return 0;
757
758 if (lance_debug > 3) {
759 outw(0x0000, ioaddr+LANCE_ADDR);
760 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
761 inw(ioaddr+LANCE_DATA));
762 outw(0x0000, ioaddr+LANCE_DATA);
763 }
764
765 /* Block a timer-based transmit from overlapping. This could better be
766 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
767 if (set_bit(0, (void*)&dev->tbusy) != 0) {
768 printk("%s: Transmitter access conflict.\n", dev->name);
769 return 1;
770 }
771
772 if (set_bit(0, (void*)&lp->lock) != 0) {
773 if (lance_debug > 0)
774 printk("%s: tx queue lock!.\n", dev->name);
775 /* don't clear dev->tbusy flag. */
776 return 1;
777 }
778
779 /* Fill in a Tx ring entry */
780
781 /* Mask to ring buffer boundary. */
782 entry = lp->cur_tx & TX_RING_MOD_MASK;
783
784 /* Caution: the write order is important here, set the base address
785 with the "ownership" bits last. */
786
787 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
788 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
789 lp->tx_ring[entry].length =
790 -(ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN);
791 } else
792 lp->tx_ring[entry].length = -skb->len;
793
794 lp->tx_ring[entry].misc = 0x0000;
795
796 /* If any part of this buffer is >16M we must copy it to a low-memory
797 buffer. */
798 if ((int)(skb->data) + skb->len > 0x01000000) {
799 if (lance_debug > 5)
800 printk("%s: bouncing a high-memory packet (%#x).\n",
801 dev->name, (int)(skb->data));
802 memcpy(&lp->tx_bounce_buffs[entry], skb->data, skb->len);
803 lp->tx_ring[entry].base =
804 (int)(lp->tx_bounce_buffs + entry) | 0x83000000;
805 dev_kfree_skb (skb, FREE_WRITE);
806 } else {
807 lp->tx_skbuff[entry] = skb;
808 lp->tx_ring[entry].base = (int)(skb->data) | 0x83000000;
809 }
810 lp->cur_tx++;
811
812 /* Trigger an immediate send poll. */
813 outw(0x0000, ioaddr+LANCE_ADDR);
814 outw(0x0048, ioaddr+LANCE_DATA);
815
816 dev->trans_start = jiffies;
817
818 save_flags(flags);
819 cli();
820 lp->lock = 0;
821 if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base == 0)
822 dev->tbusy=0;
823 else
824 lp->tx_full = 1;
825 restore_flags(flags);
826
827 return 0;
828 }
829
830 /* The LANCE interrupt handler. */
831 static void
832 lance_interrupt(int irq, struct pt_regs * regs)
/* */
833 {
834 struct device *dev = (struct device *)(irq2dev_map[irq]);
835 struct lance_private *lp;
836 int csr0, ioaddr, boguscnt=10;
837 int must_restart;
838
839 if (dev == NULL) {
840 printk ("lance_interrupt(): irq %d for unknown device.\n", irq);
841 return;
842 }
843
844 ioaddr = dev->base_addr;
845 lp = (struct lance_private *)dev->priv;
846 if (dev->interrupt)
847 printk("%s: Re-entering the interrupt handler.\n", dev->name);
848
849 dev->interrupt = 1;
850
851 outw(0x00, dev->base_addr + LANCE_ADDR);
852 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
853 && --boguscnt >= 0) {
854 /* Acknowledge all of the current interrupt sources ASAP. */
855 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
856
857 must_restart = 0;
858
859 if (lance_debug > 5)
860 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
861 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
862
863 if (csr0 & 0x0400) /* Rx interrupt */
864 lance_rx(dev);
865
866 if (csr0 & 0x0200) { /* Tx-done interrupt */
867 int dirty_tx = lp->dirty_tx;
868
869 while (dirty_tx < lp->cur_tx) {
870 int entry = dirty_tx & TX_RING_MOD_MASK;
871 int status = lp->tx_ring[entry].base;
872
873 if (status < 0)
874 break; /* It still hasn't been Txed */
875
876 lp->tx_ring[entry].base = 0;
877
878 if (status & 0x40000000) {
879 /* There was an major error, log it. */
880 int err_status = lp->tx_ring[entry].misc;
881 lp->stats.tx_errors++;
882 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
883 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
884 if (err_status & 0x1000) lp->stats.tx_window_errors++;
885 if (err_status & 0x4000) {
886 /* Ackk! On FIFO errors the Tx unit is turned off! */
887 lp->stats.tx_fifo_errors++;
888 /* Remove this verbosity later! */
889 printk("%s: Tx FIFO error! Status %4.4x.\n",
890 dev->name, csr0);
891 /* Restart the chip. */
892 must_restart = 1;
893 }
894 } else {
895 if (status & 0x18000000)
896 lp->stats.collisions++;
897 lp->stats.tx_packets++;
898 }
899
900 /* We must free the original skb if it's not a data-only copy
901 in the bounce buffer. */
902 if (lp->tx_skbuff[entry]) {
903 dev_kfree_skb(lp->tx_skbuff[entry],FREE_WRITE);
904 lp->tx_skbuff[entry] = 0;
905 }
906 dirty_tx++;
907 }
908
909 #ifndef final_version
910 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
911 printk("out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
912 dirty_tx, lp->cur_tx, lp->tx_full);
913 dirty_tx += TX_RING_SIZE;
914 }
915 #endif
916
917 if (lp->tx_full && dev->tbusy
918 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
919 /* The ring is no longer full, clear tbusy. */
920 lp->tx_full = 0;
921 dev->tbusy = 0;
922 mark_bh(NET_BH);
923 }
924
925 lp->dirty_tx = dirty_tx;
926 }
927
928 /* Log misc errors. */
929 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
930 if (csr0 & 0x1000) lp->stats.rx_errors++; /* Missed a Rx frame. */
931 if (csr0 & 0x0800) {
932 printk("%s: Bus master arbitration failure, status %4.4x.\n",
933 dev->name, csr0);
934 /* Restart the chip. */
935 must_restart = 1;
936 }
937
938 if (must_restart) {
939 /* stop the chip to clear the error condition, then restart */
940 outw(0x0000, dev->base_addr + LANCE_ADDR);
941 outw(0x0004, dev->base_addr + LANCE_DATA);
942 lance_restart(dev, 0x0002, 0);
943 }
944 }
945
946 /* Clear any other interrupt, and set interrupt enable. */
947 outw(0x0000, dev->base_addr + LANCE_ADDR);
948 outw(0x7940, dev->base_addr + LANCE_DATA);
949
950 if (lance_debug > 4)
951 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
952 dev->name, inw(ioaddr + LANCE_ADDR),
953 inw(dev->base_addr + LANCE_DATA));
954
955 dev->interrupt = 0;
956 return;
957 }
958
959 static int
960 lance_rx(struct device *dev)
/* */
961 {
962 struct lance_private *lp = (struct lance_private *)dev->priv;
963 int entry = lp->cur_rx & RX_RING_MOD_MASK;
964 int i;
965
966 /* If we own the next entry, it's a new packet. Send it up. */
967 while (lp->rx_ring[entry].base >= 0) {
968 int status = lp->rx_ring[entry].base >> 24;
969
970 if (status != 0x03) { /* There was an error. */
971 /* There is a tricky error noted by John Murphy,
972 <murf@perftech.com> to Russ Nelson: Even with full-sized
973 buffers it's possible for a jabber packet to use two
974 buffers, with only the last correctly noting the error. */
975 if (status & 0x01) /* Only count a general error at the */
976 lp->stats.rx_errors++; /* end of a packet.*/
977 if (status & 0x20) lp->stats.rx_frame_errors++;
978 if (status & 0x10) lp->stats.rx_over_errors++;
979 if (status & 0x08) lp->stats.rx_crc_errors++;
980 if (status & 0x04) lp->stats.rx_fifo_errors++;
981 lp->rx_ring[entry].base &= 0x03ffffff;
982 } else {
983 /* Malloc up new buffer, compatible with net-2e. */
984 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
985 struct sk_buff *skb;
986
987 skb = alloc_skb(pkt_len, GFP_ATOMIC);
988 if (skb == NULL) {
989 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
990 for (i=0; i < RX_RING_SIZE; i++)
991 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
992 break;
993
994 if (i > RX_RING_SIZE -2) {
995 lp->stats.rx_dropped++;
996 lp->rx_ring[entry].base |= 0x80000000;
997 lp->cur_rx++;
998 }
999 break;
1000 }
1001 skb->len = pkt_len;
1002 skb->dev = dev;
1003 memcpy(skb->data,
1004 (unsigned char *)(lp->rx_ring[entry].base & 0x00ffffff),
1005 pkt_len);
1006 netif_rx(skb);
1007 lp->stats.rx_packets++;
1008 }
1009
1010 /* The docs say that the buffer length isn't touched, but Andrew Boyd
1011 of QNX reports that some revs of the 79C965 clear it. */
1012 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1013 lp->rx_ring[entry].base |= 0x80000000;
1014 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1015 }
1016
1017 /* We should check that at least two ring entries are free. If not,
1018 we should free one and mark stats->rx_dropped++. */
1019
1020 return 0;
1021 }
1022
1023 static int
1024 lance_close(struct device *dev)
/* */
1025 {
1026 int ioaddr = dev->base_addr;
1027 struct lance_private *lp = (struct lance_private *)dev->priv;
1028
1029 dev->start = 0;
1030 dev->tbusy = 1;
1031
1032 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1033 outw(112, ioaddr+LANCE_ADDR);
1034 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1035 }
1036 outw(0, ioaddr+LANCE_ADDR);
1037
1038 if (lance_debug > 1)
1039 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1040 dev->name, inw(ioaddr+LANCE_DATA));
1041
1042 /* We stop the LANCE here -- it occasionally polls
1043 memory if we don't. */
1044 outw(0x0004, ioaddr+LANCE_DATA);
1045
1046 if (dev->dma != 4)
1047 disable_dma(dev->dma);
1048
1049 free_irq(dev->irq);
1050
1051 irq2dev_map[dev->irq] = 0;
1052
1053 return 0;
1054 }
1055
1056 static struct enet_statistics *
1057 lance_get_stats(struct device *dev)
/* */
1058 {
1059 struct lance_private *lp = (struct lance_private *)dev->priv;
1060 short ioaddr = dev->base_addr;
1061 short saved_addr;
1062 unsigned long flags;
1063
1064 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1065 save_flags(flags);
1066 cli();
1067 saved_addr = inw(ioaddr+LANCE_ADDR);
1068 outw(112, ioaddr+LANCE_ADDR);
1069 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1070 outw(saved_addr, ioaddr+LANCE_ADDR);
1071 restore_flags(flags);
1072 }
1073
1074 return &lp->stats;
1075 }
1076
1077 /* Set or clear the multicast filter for this adaptor.
1078 num_addrs == -1 Promiscuous mode, receive all packets
1079 num_addrs == 0 Normal mode, clear multicast list
1080 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1081 best-effort filtering.
1082 */
1083 static void
1084 set_multicast_list(struct device *dev, int num_addrs, void *addrs)
/* ![[last]](../icons/n_last.png)
*/
1085 {
1086 short ioaddr = dev->base_addr;
1087
1088 outw(0, ioaddr+LANCE_ADDR);
1089 outw(0x0004, ioaddr+LANCE_DATA); /* Temporarily stop the lance. */
1090
1091 if (num_addrs >= 0) {
1092 short multicast_table[4];
1093 int i;
1094 /* We don't use the multicast table, but rely on upper-layer filtering. */
1095 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1096 for (i = 0; i < 4; i++) {
1097 outw(8 + i, ioaddr+LANCE_ADDR);
1098 outw(multicast_table[i], ioaddr+LANCE_DATA);
1099 }
1100 outw(15, ioaddr+LANCE_ADDR);
1101 outw(0x0000, ioaddr+LANCE_DATA); /* Unset promiscuous mode */
1102 } else {
1103 /* Log any net taps. */
1104 printk("%s: Promiscuous mode enabled.\n", dev->name);
1105 outw(15, ioaddr+LANCE_ADDR);
1106 outw(0x8000, ioaddr+LANCE_DATA); /* Set promiscuous mode */
1107 }
1108
1109 lance_restart(dev, 0x0142, 0); /* Resume normal operation */
1110
1111 }
1112
1113
1114 /*
1115 * Local variables:
1116 * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c lance.c"
1117 * c-indent-level: 4
1118 * tab-width: 4
1119 * End:
1120 */
![[bottom]](../icons/n_bottom.png){kind=icon}
*/