root/drivers/scsi/eata_dma.h

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   1 /********************************************************
   2 * Header file for eata_dma.c Linux EATA-DMA SCSI driver *
   3 * (c) 1993,94,95 Michael Neuffer                        *
   4 *********************************************************
   5 * last change: 95/04/10                                 *
   6 ********************************************************/
   7 
   8 
   9 #ifndef _EATA_DMA_H
  10 #define _EATA_DMA_H
  11 
  12 #define VER_MAJOR 2
  13 #define VER_MINOR 3
  14 #define VER_SUB   "5r"
  15 
  16 /************************************************************************
  17  * Here you can configure your drives that are using a non-standard     *
  18  * geometry.                                                            *
  19  * To enable this set HARDCODED to 1                                    *
  20  * If you have only one drive that need reconfiguration, set ID1 to -1  *
  21  ************************************************************************/
  22 #define HARDCODED     0          /* Here are drives running in emu. mode   */
  23 
  24 #define ID0           0          /* SCSI ID of "IDE" drive mapped to C:    
  25                                   * If you're not sure check your config
  26                                   * utility that came with your controller
  27                                   */
  28 #define HEADS0       13          /* Number of emulated heads of this drive */  
  29 #define SECTORS0     38          /* Number of emulated sectors             */ 
  30 #define CYLINDER0   719          /* Number of emulated cylinders           */
  31    
  32 #define ID1           1          /* SCSI ID of "IDE" drive mapped to D:    */
  33 #define HEADS1       16          /* Number of emulated heads of this drive */ 
  34 #define SECTORS1     62          /* Number of emulated sectors             */
  35 #define CYLINDER1  1024          /* Number of emulated cylinders           */
  36 
  37 /************************************************************************
  38  * Here you can switch parts of the code on and of                      *
  39  ************************************************************************/
  40 
  41 #define CHECKPAL        0        /* EISA pal checking on/off            */
  42 #define EATA_DMA_PROC   0        /* proc-fs support                     */
  43 
  44 /************************************************************************
  45  * Debug options.                                                       * 
  46  * Enable DEBUG and whichever options you require.                      *
  47  ************************************************************************/
  48 #define DEBUG_EATA      1       /* Enable debug code.                   */
  49 #define DPT_DEBUG       0       /* Bobs special                         */
  50 #define DBG_DELAY       0       /* Build in delays so debug messages can be
  51                                  * be read before they vanish of the top of
  52                                  * the screen!
  53                                  */
  54 #define DBG_PROBE       0       /* Debug probe routines.                */
  55 #define DBG_PCI         0       /* Trace PCI routines                   */
  56 #define DBG_EISA        0       /* Trace EISA routines                  */
  57 #define DBG_ISA         0       /* Trace ISA routines                   */ 
  58 #define DBG_BLINK       0       /* Trace Blink check                    */
  59 #define DBG_PIO         0       /* Trace get_config_PIO                 */
  60 #define DBG_COM         0       /* Trace command call                   */
  61 #define DBG_QUEUE       0       /* Trace command queueing.              */
  62 #define DBG_INTR        0       /* Trace interrupt service routine.     */
  63 #define DBG_INTR2       0       /* Trace interrupt service routine.     */
  64 #define DBG_INTR3       0       /* Trace interrupt service routine.     */
  65 #define DBG_PROC        0       /* Debug proc-fs related statistics     */
  66 #define DBG_REGISTER    0       /* */
  67 #define DBG_ABNORM      1       /* Debug abnormal actions (reset, abort)*/
  68 
  69 #if DEBUG_EATA 
  70 #define DBG(x, y)       if ((x)) {y;} 
  71 #else
  72 #define DBG(x, y)
  73 #endif
  74 
  75 
  76 #define EATA_DMA {                   \
  77         NULL, NULL,                  \
  78         "EATA (Extended Attachment) driver", \
  79         eata_detect,                 \
  80         eata_release,                \
  81         eata_info,                   \
  82         eata_command,                \
  83         eata_queue,                  \
  84         eata_abort,                  \
  85         eata_reset,                  \
  86         NULL, /* Slave attach */     \
  87         scsicam_bios_param,          \
  88         0,      /* Canqueue     */   \
  89         0,      /* this_id      */   \
  90         0,      /* sg_tablesize */   \
  91         0,      /* cmd_per_lun  */   \
  92         0,      /* present      */   \
  93         1,      /* True if ISA  */   \
  94         ENABLE_CLUSTERING }
  95 
  96 int eata_detect(Scsi_Host_Template *);
  97 const char *eata_info(struct Scsi_Host *);
  98 int eata_command(Scsi_Cmnd *);
  99 int eata_queue(Scsi_Cmnd *, void *(done)(Scsi_Cmnd *));
 100 int eata_abort(Scsi_Cmnd *);
 101 int eata_reset(Scsi_Cmnd *);
 102 int eata_release(struct Scsi_Host *);
 103 
 104 /*********************************************
 105  * Misc. definitions                         *
 106  *********************************************/
 107 
 108 #ifndef TRUE
 109 # define TRUE 1
 110 #endif
 111 #ifndef FALSE
 112 # define FALSE 0
 113 #endif
 114 
 115 #define R_LIMIT 0x20000
 116 
 117 #define MAXISA     4
 118 #define MAXEISA   16  
 119 #define MAXPCI    16
 120 #define MAXIRQ    16 
 121 #define MAXTARGET  8
 122 
 123 #define MAX_PCI_DEVICES   32             /* Maximum # Of Devices Per Bus   */
 124 #define MAX_METHOD_2      16             /* Max Devices For Method 2       */
 125 #define MAX_PCI_BUS       16             /* Maximum # Of Busses Allowed    */
 126 
 127 #define SG_SIZE           64 
 128 
 129 #define C_P_L_CURRENT_MAX 16  /* Until this limit in the mm is removed    
 130                                * Kernels < 1.1.86 died horrible deaths
 131                                * if you used values >2. The memory management
 132                                * since pl1.1.86 seems to cope with up to 10
 133                                * queued commands per device. 
 134                                * Since 1.2.0 the memory management seems to 
 135                                * have no more problems......
 136                                */
 137 #define C_P_L_DIV          3  /* 1 <= C_P_L_DIV <= 8            
 138                                * You can use this parameter to fine-tune
 139                                * the driver. Depending on the number of 
 140                                * devices and their speed and ability to queue 
 141                                * commands, you will get the best results with a
 142                                * value
 143                                * ~= numdevices-(devices_unable_to_queue_commands/2)
 144                                * The reason for this is that the disk driver 
 145                                * tends to flood the queue, so that other 
 146                                * drivers have problems to queue commands 
 147                                * themselves. This can for example result in 
 148                                * the effect that the tape stops during disk 
 149                                * accesses. 
 150                                */
 151 
 152 #define FREE       0
 153 #define USED       1
 154 #define TIMEOUT    2
 155 #define RESET      4
 156 #define LOCKED     8
 157 
 158 #define HD(cmd)  ((hostdata *)&(cmd->host->hostdata))
 159 #define CD(cmd)  ((struct eata_ccb *)(cmd->host_scribble))
 160 #define SD(host) ((hostdata *)&(host->hostdata))
 161 
 162 #define DELAY(x) { int i; i = jiffies + x; while (jiffies < i); }
 163 #define DEL2(x)  { ulong i; for (i = 0; i < 0xffff*x; i++); }
 164 
 165 /***********************************************
 166  *    EATA Command & Register definitions      *
 167  ***********************************************/
 168 #define PCI_REG_DPTconfig        0x40    
 169 #define PCI_REG_PumpModeAddress  0x44    
 170 #define PCI_REG_PumpModeData     0x48    
 171 #define PCI_REG_ConfigParam1     0x50    
 172 #define PCI_REG_ConfigParam2     0x54    
 173 
 174 
 175 #define EATA_CMD_PIO_READ_CONFIG 0xf0
 176 #define EATA_CMD_PIO_SET_CONFIG  0xf1
 177 #define EATA_CMD_PIO_SEND_CP     0xf2
 178 #define EATA_CMD_PIO_RECEIVE_SP  0xf3
 179 #define EATA_CMD_PIO_TRUNC       0xf4
 180 
 181 #define EATA_CMD_RESET           0xf9
 182 
 183 #define EATA_CMD_DMA_READ_CONFIG 0xfd
 184 #define EATA_CMD_DMA_SET_CONFIG  0xfe
 185 #define EATA_CMD_DMA_SEND_CP     0xff
 186 
 187 #define ECS_EMULATE_SENSE        0xd4
 188 
 189 #define HA_WCOMMAND 0x07        /* command register offset   */
 190 #define HA_WDMAADDR 0x02        /* DMA address LSB offset    */  
 191 #define HA_RAUXSTAT 0x08        /* aux status register offset*/
 192 #define HA_RSTATUS  0x07        /* status register offset    */
 193 #define HA_RDATA    0x00        /* data register (16bit)     */
 194 
 195 #define HA_ABUSY    0x01        /* aux busy bit              */
 196 #define HA_AIRQ     0x02        /* aux IRQ pending bit       */
 197 #define HA_SERROR   0x01        /* pr. command ended in error*/
 198 #define HA_SMORE    0x02        /* more data soon to come    */
 199 #define HA_SCORR    0x04        /* data corrected            */
 200 #define HA_SDRQ     0x08        /* data request active       */
 201 #define HA_SSC      0x10        /* seek complete             */
 202 #define HA_SFAULT   0x20        /* write fault               */
 203 #define HA_SREADY   0x40        /* drive ready               */
 204 #define HA_SBUSY    0x80        /* drive busy                */
 205 #define HA_SDRDY    HA_SSC+HA_SREADY+HA_SDRQ 
 206 
 207 #define HA_NO_ERROR      0x00
 208 #define HA_ERR_SEL_TO    0x01
 209 #define HA_ERR_CMD_TO    0x02
 210 #define HA_ERR_RESET     0x03
 211 #define HA_INIT_POWERUP  0x04
 212 #define HA_UNX_BUSPHASE  0x05
 213 #define HA_UNX_BUS_FREE  0x06
 214 #define HA_BUS_PARITY    0x07
 215 #define HA_SCSI_HUNG     0x08
 216 #define HA_UNX_MSGRJCT   0x09
 217 #define HA_RESET_STUCK   0x0a
 218 #define HA_RSENSE_FAIL   0x0b
 219 #define HA_PARITY_ERR    0x0c
 220 #define HA_CP_ABORT_NA   0x0d
 221 #define HA_CP_ABORTED    0x0e
 222 #define HA_CP_RESET_NA   0x0f
 223 #define HA_CP_RESET      0x10
 224 
 225 /**********************************************
 226  * Message definitions                        *
 227  **********************************************/
 228 
 229 struct reg_bit {        /* reading this one will clear the interrupt    */
 230   unchar error:1;     /* previous command ended in an error           */
 231   unchar more:1;      /* more DATA coming soon, poll BSY & DRQ (PIO) */
 232   unchar corr:1;      /* data read was successfully corrected with ECC*/
 233   unchar drq:1;       /* data request active  */     
 234   unchar sc:1;        /* seek complete        */
 235   unchar fault:1;     /* write fault          */
 236   unchar ready:1;     /* drive ready          */
 237   unchar busy:1;      /* controller busy      */
 238 };
 239 
 240 struct reg_abit {       /* reading this won't clear the interrupt */
 241   unchar abusy:1;     /* auxiliary busy                         */
 242   unchar irq:1;       /* set when drive interrupt is asserted   */
 243   unchar dummy:6;
 244 };
 245 
 246 struct eata_register {              /* EATA register set */
 247   unchar data_reg[2];           /* R, couldn't figure this one out          */
 248   unchar cp_addr[4];            /* W, CP address register                   */
 249   union { 
 250     unchar command;             /* W, command code: [read|set] conf, send CP*/
 251     struct reg_bit status;      /* R, see register_bit1                     */
 252     unchar statusunchar;
 253   } ovr;   
 254   struct reg_abit aux_stat;     /* R, see register_bit2                     */
 255 };
 256 
 257 /**********************************************
 258  *  Other  definitions                        *
 259  **********************************************/
 260 
 261 struct eata_sg_list
 262 {
 263   ulong data;
 264   ulong len;
 265 };
 266 
 267 struct get_conf {          /* Read Configuration Array  */
 268   ulong  len;                 /* Should return 0x22                     */
 269   unchar sig[4];              /* Signature MUST be "EATA"               */
 270   unchar    version2:4,
 271              version:4;       /* EATA Version level                     */
 272   unchar OCS_enabled:1,       /* Overlap Command Support enabled        */
 273          TAR_support:1,       /* SCSI Target Mode supported             */
 274               TRNXFR:1,       /* Truncate Transfer Cmd not necessary    */
 275                               /* Only used in PIO Mode                  */
 276         MORE_support:1,       /* MORE supported (only PIO Mode)         */
 277          DMA_support:1,       /* DMA supported Driver uses only         */
 278                               /* this mode                              */
 279            DMA_valid:1,       /* DRQ value in Byte 30 is valid          */
 280                  ATA:1,       /* ATA device connected (not supported)   */
 281            HAA_valid:1;       /* Hostadapter Address is valid           */
 282 
 283   ushort cppadlen;            /* Number of pad unchars send after CD data */
 284                               /* set to zero for DMA commands           */
 285   unchar scsi_id[4];          /* SCSI ID of controller 2-0 Byte 0 res.  */
 286                               /* if not, zero is returned               */
 287   ulong  cplen;               /* CP length: number of valid cp unchars  */
 288   ulong  splen;               /* Number of unchars returned after       */ 
 289                               /* Receive SP command                     */
 290   ushort queuesiz;            /* max number of queueable CPs            */
 291   ushort dummy;
 292   ushort SGsiz;               /* max number of SG table entries         */
 293   unchar    IRQ:4,            /* IRQ used this HA                       */
 294          IRQ_TR:1,            /* IRQ Trigger: 0=edge, 1=level           */
 295          SECOND:1,            /* This is a secondary controller         */  
 296     DMA_channel:2;            /* DRQ index, DRQ is 2comp of DRQX        */
 297   unchar sync;                /* device at ID 7 tru 0 is running in     */
 298                               /* synchronous mode, this will disappear  */
 299   unchar   DSBLE:1,           /* ISA i/o addressing is disabled         */
 300          FORCADR:1,           /* i/o address has been forced            */
 301                 :6;
 302   unchar  MAX_ID:5,           /* Max number of SCSI target IDs          */
 303         MAX_CHAN:3;           /* Number of SCSI busses on HBA           */
 304   unchar MAX_LUN;             /* Max number of LUNs                     */
 305   unchar        :5,          
 306          ID_qest:1,           /* Raidnum ID is questionable             */
 307           is_PCI:1,           /* HBA is PCI                             */
 308          is_EISA:1;           /* HBA is EISA                            */
 309   unchar unused[478]; 
 310 };
 311 
 312 struct eata_ccb {             /* Send Command Packet structure      */
 313  
 314   unchar SCSI_Reset:1,        /* Cause a SCSI Bus reset on the cmd  */
 315            HBA_Init:1,        /* Cause Controller to reinitialize   */
 316        Auto_Req_Sen:1,        /* Do Auto Request Sense on errors    */
 317             scatter:1,        /* Data Ptr points to a SG Packet     */
 318              Resrvd:1,        /* RFU                                */
 319           Interpret:1,        /* Interpret the SCSI cdb of own use  */
 320             DataOut:1,        /* Data Out phase with command        */
 321              DataIn:1;        /* Data In phase with command         */
 322   unchar reqlen;              /* Request Sense Length               */ 
 323                               /* Valid if Auto_Req_Sen=1            */
 324   unchar unused[3];
 325   unchar  FWNEST:1,           /* send cmd to phys RAID component*/
 326          unused2:7;
 327   unchar Phsunit:1,           /* physical unit on mirrored pair */
 328             I_AT:1,           /* inhibit address translation    */
 329          I_HBA_C:1,           /* HBA Inhibit caching            */
 330          unused3:5;
 331 
 332   unchar cp_id;               /* SCSI Device ID of target       */ 
 333   unchar    cp_lun:3,
 334                   :2,
 335          cp_luntar:1,         /* CP is for target ROUTINE       */
 336          cp_dispri:1,         /* Grant disconnect privilege     */
 337        cp_identify:1;         /* Always TRUE                    */         
 338   unchar cp_msg1;             /* Message bytes 0-3              */
 339   unchar cp_msg2;
 340   unchar cp_msg3;
 341   unchar cp_cdb[12];          /* Command Descriptor Block       */
 342   ulong  cp_datalen;          /* Data Transfer Length           */
 343                               /* If scatter=1 len of sg package */
 344   void *cp_viraddr;           /* address of this ccb            */
 345   ulong cp_dataDMA;           /* Data Address, if scatter=1     */
 346                               /* address of scatter packet      */  
 347   ulong cp_statDMA;           /* address for Status Packet      */ 
 348   ulong cp_reqDMA;            /* Request Sense Address, used if */
 349                               /* CP command ends with error     */
 350  
 351   ulong timeout;
 352   unchar retries;
 353   unchar status;              /* status of this queueslot       */
 354   struct eata_sg_list sg_list[SG_SIZE];
 355   Scsi_Cmnd *cmd;             /* address of cmd                 */
 356 };
 357 
 358 
 359 struct eata_sp {
 360   unchar hba_stat:7,          /* HBA status                     */
 361               EOC:1;          /* True if command finished       */
 362   unchar scsi_stat;           /* Target SCSI status             */       
 363   unchar reserved[2];
 364   ulong  residue_len;         /* Number of unchars not transferred */
 365   struct eata_ccb *ccb;       /* Address set in COMMAND PACKET  */
 366   unchar msg[12];
 367 };
 368 
 369 typedef struct hstd {
 370   char   vendor[9];
 371   char   name[18];
 372   char   revision[6];
 373   char   EATA_revision;
 374   unchar bustype;              /* bustype of HBA             */
 375   unchar channel;              /* no. of scsi channel        */
 376   unchar state;                /* state of HBA               */
 377   unchar primary;              /* true if primary            */
 378   ulong  reads[13];
 379   ulong  writes[13];
 380   unchar t_state[MAXTARGET];   /* state of Target (RESET,..) */
 381   uint   t_timeout[MAXTARGET]; /* timeouts on target         */
 382   uint   last_ccb;             /* Last used ccb              */
 383   struct Scsi_Host *next;         
 384   struct Scsi_Host *prev;
 385   struct eata_sp sp;           /* status packet              */ 
 386   struct eata_ccb ccb[0];      /* ccb array begins here      */
 387 }hostdata;
 388 
 389 
 390 
 391 /* structure for max. 2 emulated drives */
 392 struct drive_geom_emul {
 393   unchar trans;                 /* translation flag 1=transl */
 394   unchar channel;               /* SCSI channel number       */
 395   unchar HBA;                   /* HBA number (prim/sec)     */
 396   unchar id;                    /* drive id                  */
 397   unchar lun;                   /* drive lun                 */
 398   uint   heads;                 /* number of heads           */
 399   uint   sectors;               /* number of sectors         */
 400   uint   cylinder;              /* number of cylinders       */
 401 };
 402 
 403 struct geom_emul {
 404   int bios_drives;               /* number of emulated drives */
 405   struct drive_geom_emul drv[2]; /* drive structures          */
 406 };
 407 
 408 #endif /* _EATA_H */

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