taglinefilesource code
reg_sub40arch/i386/math-emu/fpu_arith.creg_sub(&st(0), &st(FPU_rm), &st(0), control_word);
reg_sub48arch/i386/math-emu/fpu_arith.creg_sub(&st(FPU_rm), &st(0), &st(0), control_word);
reg_sub91arch/i386/math-emu/fpu_arith.creg_sub(&st(0), &st(FPU_rm), &st(FPU_rm), control_word);
reg_sub101arch/i386/math-emu/fpu_arith.creg_sub(&st(FPU_rm), &st(0), &st(FPU_rm), control_word);
reg_sub147arch/i386/math-emu/fpu_arith.cif ( !reg_sub(&st(0), &st(FPU_rm), &st(FPU_rm), control_word) )
reg_sub158arch/i386/math-emu/fpu_arith.cif ( !reg_sub(&st(FPU_rm), &st(0), &st(FPU_rm), control_word) )
reg_sub457arch/i386/math-emu/fpu_entry.creg_sub(st0_ptr, &loaded_data, st0_ptr,
reg_sub462arch/i386/math-emu/fpu_entry.creg_sub(&loaded_data, st0_ptr, st0_ptr,
reg_sub97arch/i386/math-emu/fpu_proto.hextern int reg_sub(FPU_REG const *a, FPU_REG const *b,
reg_sub82arch/i386/math-emu/fpu_trig.creg_sub(&CONST_PI2, X, X, FULL_PRECISION);
reg_sub126arch/i386/math-emu/fpu_trig.creg_sub(X, &tmp, X, FULL_PRECISION);
reg_sub137arch/i386/math-emu/fpu_trig.creg_sub(&CONST_PI, X, X, FULL_PRECISION);