tag | line | file | source code |
wr | 831 | drivers/char/scc.c | wr(scc,R12,tc & 255); /* brg rate LOW */ |
wr | 832 | drivers/char/scc.c | wr(scc,R13,tc >> 8); /* brg rate HIGH */ |
wr | 848 | drivers/char/scc.c | wr(scc, R14, BRSRC); /* BRG source = PCLK */ |
wr | 860 | drivers/char/scc.c | wr(scc,R1,0); /* no W/REQ operation */ |
wr | 861 | drivers/char/scc.c | wr(scc,R3,Rx8|RxCRC_ENAB); /* RX 8 bits/char, CRC, disabled */ |
wr | 862 | drivers/char/scc.c | wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */ |
wr | 863 | drivers/char/scc.c | wr(scc,R5,Tx8|DTR|TxCRC_ENAB); /* TX 8 bits/char, disabled, DTR */ |
wr | 864 | drivers/char/scc.c | wr(scc,R6,0); /* SDLC address zero (not used) */ |
wr | 865 | drivers/char/scc.c | wr(scc,R7,FLAG); /* SDLC flag value */ |
wr | 866 | drivers/char/scc.c | wr(scc,R9,VIS); /* vector includes status */ |
wr | 867 | drivers/char/scc.c | wr(scc,R10,(scc->modem.nrz? NRZ : NRZI)|CRCPS|ABUNDER); /* abort on underrun, preset CRC generator, NRZ(I) */ |
wr | 868 | drivers/char/scc.c | wr(scc,R14, 0); |
wr | 900 | drivers/char/scc.c | wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP); |
wr | 905 | drivers/char/scc.c | wr(scc, R11, ((Board & BAYCOM)? TRxCDP : TRxCBR) | RCDPLL|TCRTxCP|TRxCOI); |
wr | 910 | drivers/char/scc.c | wr(scc, R11, (Board & BAYCOM)? RCTRxCP|TCRTxCP : RCRTxCP|TCTRxCP); |
wr | 917 | drivers/char/scc.c | wr(scc,R15,((Board & BAYCOM) ? 0 : CTSIE)|BRKIE|DCDIE|TxUIE); |
wr | 922 | drivers/char/scc.c | wr(scc,R7,AUTOEOM); |
wr | 979 | drivers/char/scc.c | wr(scc, R11, RCDPLL|TCBR|TRxCOI|TRxCBR); |
wr | 988 | drivers/char/scc.c | wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP); |
wr | 1556 | drivers/char/scc.c | wr(scc,R1, 0); |
wr | 1557 | drivers/char/scc.c | wr(scc,R2, chip*16); /* No of chip is vector */ |
wr | 1558 | drivers/char/scc.c | wr(scc,R9,VIS); /* vector includes status */ |
wr | 1673 | drivers/char/scc.c | wr(scc,R1,0); /* disable interrupts */ |
wr | 1674 | drivers/char/scc.c | wr(scc,R3,0); |