tag | line | file | source code |
iobase | 200 | drivers/net/3c509.c | unsigned short iobase = id_read_eeprom(8); |
iobase | 201 | drivers/net/3c509.c | if_port = iobase >> 14; |
iobase | 202 | drivers/net/3c509.c | ioaddr = 0x200 + ((iobase & 0x1f) << 4); |
iobase | 415 | drivers/net/de4x5.c | static int de4x5_hw_init(struct device *dev, u_long iobase); |
iobase | 436 | drivers/net/de4x5.c | static int DevicePresent(u_long iobase); |
iobase | 448 | drivers/net/de4x5.c | static void eisa_probe(struct device *dev, u_long iobase); |
iobase | 449 | drivers/net/de4x5.c | static void pci_probe(struct device *dev, u_long iobase); |
iobase | 450 | drivers/net/de4x5.c | static struct device *alloc_device(struct device *dev, u_long iobase); |
iobase | 502 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 504 | drivers/net/de4x5.c | if ((iobase == 0) && loading_module){ |
iobase | 508 | drivers/net/de4x5.c | eisa_probe(dev, iobase); |
iobase | 509 | drivers/net/de4x5.c | pci_probe(dev, iobase); |
iobase | 511 | drivers/net/de4x5.c | if ((tmp == num_de4x5s) && (iobase != 0) && loading_module) { |
iobase | 513 | drivers/net/de4x5.c | iobase); |
iobase | 523 | drivers/net/de4x5.c | if (iobase == 0) autoprobed = 1; |
iobase | 530 | drivers/net/de4x5.c | de4x5_hw_init(struct device *dev, u_long iobase) |
iobase | 563 | drivers/net/de4x5.c | dev->base_addr = iobase; |
iobase | 566 | drivers/net/de4x5.c | dev->name, name, iobase, ((iobase>>12)&0x0f)); |
iobase | 569 | drivers/net/de4x5.c | iobase, lp->bus_num, lp->device); |
iobase | 620 | drivers/net/de4x5.c | request_region(iobase, (lp->bus == PCI ? DE4X5_PCI_TOTAL_SIZE : |
iobase | 700 | drivers/net/de4x5.c | if (status) release_region(iobase, (lp->bus == PCI ? |
iobase | 759 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 872 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 948 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 1080 | drivers/net/de4x5.c | u_long iobase; |
iobase | 1086 | drivers/net/de4x5.c | iobase = dev->base_addr; |
iobase | 1228 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 1275 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 1321 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 1360 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 1395 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 1426 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 1489 | drivers/net/de4x5.c | u_long iobase; |
iobase | 1499 | drivers/net/de4x5.c | iobase = EISA_SLOT_INC; /* Get the first slot address */ |
iobase | 1503 | drivers/net/de4x5.c | iobase = ioaddr; |
iobase | 1508 | drivers/net/de4x5.c | for (status = -ENODEV; (i<maxSlots) && (dev!=NULL); i++, iobase+=EISA_SLOT_INC) { |
iobase | 1520 | drivers/net/de4x5.c | outl(iobase, PCI_CBIO); |
iobase | 1522 | drivers/net/de4x5.c | if (check_region(iobase, DE4X5_EISA_TOTAL_SIZE) == 0) { |
iobase | 1523 | drivers/net/de4x5.c | if ((dev = alloc_device(dev, iobase)) != NULL) { |
iobase | 1524 | drivers/net/de4x5.c | if ((status = de4x5_hw_init(dev, iobase)) == 0) { |
iobase | 1530 | drivers/net/de4x5.c | printk("%s: region already allocated at 0x%04lx.\n", dev->name, iobase); |
iobase | 1560 | drivers/net/de4x5.c | u_int iobase; |
iobase | 1593 | drivers/net/de4x5.c | pcibios_read_config_dword(pb, PCI_DEVICE, PCI_BASE_ADDRESS_0, &iobase); |
iobase | 1594 | drivers/net/de4x5.c | iobase &= CBIO_MASK; |
iobase | 1609 | drivers/net/de4x5.c | if (check_region(iobase, DE4X5_PCI_TOTAL_SIZE) == 0) { |
iobase | 1610 | drivers/net/de4x5.c | if ((dev = alloc_device(dev, iobase)) != NULL) { |
iobase | 1612 | drivers/net/de4x5.c | if ((status = de4x5_hw_init(dev, iobase)) == 0) { |
iobase | 1618 | drivers/net/de4x5.c | printk("%s: region already allocated at 0x%04x.\n", dev->name, (u_short)iobase); |
iobase | 1635 | drivers/net/de4x5.c | static struct device *alloc_device(struct device *dev, u_long iobase) |
iobase | 1686 | drivers/net/de4x5.c | dev->base_addr = iobase; /* assign the io address */ |
iobase | 1750 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 1806 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 1857 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 1942 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 1968 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 2020 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 2054 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 2081 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 2097 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 2259 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 2447 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 2459 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 2490 | drivers/net/de4x5.c | u_long iobase = dev->base_addr; |
iobase | 16 | drivers/net/de4x5.h | #define DE4X5_BMR iobase+(0x000 << lp->bus) /* Bus Mode Register */ |
iobase | 17 | drivers/net/de4x5.h | #define DE4X5_TPD iobase+(0x008 << lp->bus) /* Transmit Poll Demand Reg */ |
iobase | 18 | drivers/net/de4x5.h | #define DE4X5_RPD iobase+(0x010 << lp->bus) /* Receive Poll Demand Reg */ |
iobase | 19 | drivers/net/de4x5.h | #define DE4X5_RRBA iobase+(0x018 << lp->bus) /* RX Ring Base Address Reg */ |
iobase | 20 | drivers/net/de4x5.h | #define DE4X5_TRBA iobase+(0x020 << lp->bus) /* TX Ring Base Address Reg */ |
iobase | 21 | drivers/net/de4x5.h | #define DE4X5_STS iobase+(0x028 << lp->bus) /* Status Register */ |
iobase | 22 | drivers/net/de4x5.h | #define DE4X5_OMR iobase+(0x030 << lp->bus) /* Operation Mode Register */ |
iobase | 23 | drivers/net/de4x5.h | #define DE4X5_IMR iobase+(0x038 << lp->bus) /* Interrupt Mask Register */ |
iobase | 24 | drivers/net/de4x5.h | #define DE4X5_MFC iobase+(0x040 << lp->bus) /* Missed Frame Counter */ |
iobase | 25 | drivers/net/de4x5.h | #define DE4X5_APROM iobase+(0x048 << lp->bus) /* Ethernet Address PROM */ |
iobase | 26 | drivers/net/de4x5.h | #define DE4X5_BROM iobase+(0x048 << lp->bus) /* Boot ROM Register */ |
iobase | 27 | drivers/net/de4x5.h | #define DE4X5_SROM iobase+(0x048 << lp->bus) /* Serial ROM Register */ |
iobase | 28 | drivers/net/de4x5.h | #define DE4X5_DDR iobase+(0x050 << lp->bus) /* Data Diagnostic Register */ |
iobase | 29 | drivers/net/de4x5.h | #define DE4X5_FDR iobase+(0x058 << lp->bus) /* Full Duplex Register */ |
iobase | 30 | drivers/net/de4x5.h | #define DE4X5_GPT iobase+(0x058 << lp->bus) /* General Purpose Timer Reg.*/ |
iobase | 31 | drivers/net/de4x5.h | #define DE4X5_GEP iobase+(0x060 << lp->bus) /* General Purpose Register */ |
iobase | 32 | drivers/net/de4x5.h | #define DE4X5_SISR iobase+(0x060 << lp->bus) /* SIA Status Register */ |
iobase | 33 | drivers/net/de4x5.h | #define DE4X5_SICR iobase+(0x068 << lp->bus) /* SIA Connectivity Register */ |
iobase | 34 | drivers/net/de4x5.h | #define DE4X5_STRR iobase+(0x070 << lp->bus) /* SIA TX/RX Register */ |
iobase | 35 | drivers/net/de4x5.h | #define DE4X5_SIGR iobase+(0x078 << lp->bus) /* SIA General Register */ |
iobase | 40 | drivers/net/de4x5.h | #define EISA_ID iobase+0x0c80 /* EISA ID Registers */ |
iobase | 41 | drivers/net/de4x5.h | #define EISA_ID0 iobase+0x0c80 /* EISA ID Register 0 */ |
iobase | 42 | drivers/net/de4x5.h | #define EISA_ID1 iobase+0x0c81 /* EISA ID Register 1 */ |
iobase | 43 | drivers/net/de4x5.h | #define EISA_ID2 iobase+0x0c82 /* EISA ID Register 2 */ |
iobase | 44 | drivers/net/de4x5.h | #define EISA_ID3 iobase+0x0c83 /* EISA ID Register 3 */ |
iobase | 45 | drivers/net/de4x5.h | #define EISA_CR iobase+0x0c84 /* EISA Control Register */ |
iobase | 46 | drivers/net/de4x5.h | #define EISA_REG0 iobase+0x0c88 /* EISA Configuration Register 0 */ |
iobase | 47 | drivers/net/de4x5.h | #define EISA_REG1 iobase+0x0c89 /* EISA Configuration Register 1 */ |
iobase | 48 | drivers/net/de4x5.h | #define EISA_REG2 iobase+0x0c8a /* EISA Configuration Register 2 */ |
iobase | 49 | drivers/net/de4x5.h | #define EISA_REG3 iobase+0x0c8f /* EISA Configuration Register 3 */ |
iobase | 50 | drivers/net/de4x5.h | #define EISA_APROM iobase+0x0c90 /* Ethernet Address PROM */ |
iobase | 55 | drivers/net/de4x5.h | #define PCI_CFID iobase+0x0008 /* PCI Configuration ID Register */ |
iobase | 56 | drivers/net/de4x5.h | #define PCI_CFCS iobase+0x000c /* PCI Command/Status Register */ |
iobase | 57 | drivers/net/de4x5.h | #define PCI_CFRV iobase+0x0018 /* PCI Revision Register */ |
iobase | 58 | drivers/net/de4x5.h | #define PCI_CFLT iobase+0x001c /* PCI Latency Timer Register */ |
iobase | 59 | drivers/net/de4x5.h | #define PCI_CBIO iobase+0x0028 /* PCI Base I/O Register */ |
iobase | 60 | drivers/net/de4x5.h | #define PCI_CBMA iobase+0x002c /* PCI Base Memory Address Register */ |
iobase | 61 | drivers/net/de4x5.h | #define PCI_CBER iobase+0x0030 /* PCI Expansion ROM Base Address Reg. */ |
iobase | 62 | drivers/net/de4x5.h | #define PCI_CFIT iobase+0x003c /* PCI Configuration Interrupt Register */ |
iobase | 63 | drivers/net/de4x5.h | #define PCI_CFDA iobase+0x0040 /* PCI Driver Area Register */ |
iobase | 390 | drivers/net/depca.c | static void isa_probe(struct device *dev, u_long iobase); |
iobase | 391 | drivers/net/depca.c | static void eisa_probe(struct device *dev, u_long iobase); |
iobase | 392 | drivers/net/depca.c | static struct device *alloc_device(struct device *dev, u_long iobase); |
iobase | 422 | drivers/net/depca.c | u_long iobase = dev->base_addr; |
iobase | 424 | drivers/net/depca.c | if ((iobase == 0) && loading_module){ |
iobase | 428 | drivers/net/depca.c | isa_probe(dev, iobase); |
iobase | 429 | drivers/net/depca.c | eisa_probe(dev, iobase); |
iobase | 431 | drivers/net/depca.c | if ((tmp == num_depcas) && (iobase != 0) && loading_module) { |
iobase | 433 | drivers/net/depca.c | iobase); |
iobase | 443 | drivers/net/depca.c | if (iobase == 0) autoprobed = 1; |
iobase | 1286 | drivers/net/depca.c | u_long iobase; |
iobase | 1293 | drivers/net/depca.c | iobase = EISA_SLOT_INC; /* Get the first slot address */ |
iobase | 1297 | drivers/net/depca.c | iobase = ioaddr; |
iobase | 1301 | drivers/net/depca.c | if ((iobase & 0x0fff) == 0) iobase += DEPCA_EISA_IO_PORTS; |
iobase | 1303 | drivers/net/depca.c | for (; (i<maxSlots) && (dev!=NULL); i++, iobase+=EISA_SLOT_INC) { |
iobase | 1305 | drivers/net/depca.c | if (DevicePresent(iobase) == 0) { |
iobase | 1306 | drivers/net/depca.c | if (check_region(iobase, DEPCA_TOTAL_SIZE) == 0) { |
iobase | 1307 | drivers/net/depca.c | if ((dev = alloc_device(dev, iobase)) != NULL) { |
iobase | 1308 | drivers/net/depca.c | if (depca_hw_init(dev, iobase) == 0) { |
iobase | 1314 | drivers/net/depca.c | printk("%s: region already allocated at 0x%04lx.\n",dev->name,iobase); |
iobase | 1327 | drivers/net/depca.c | static struct device *alloc_device(struct device *dev, u_long iobase) |
iobase | 1378 | drivers/net/depca.c | dev->base_addr = iobase; /* assign the io address */ |
iobase | 152 | drivers/net/depca.h | #define EISA_ID iobase+0x0080 /* ID long word for EISA card */ |
iobase | 153 | drivers/net/depca.h | #define EISA_CTRL iobase+0x0084 /* Control word for EISA card */ |
iobase | 302 | drivers/net/ewrk3.c | static int ewrk3_hw_init(struct device *dev, short iobase); |
iobase | 308 | drivers/net/ewrk3.c | static int DevicePresent(short iobase); |
iobase | 311 | drivers/net/ewrk3.c | static int Read_EEPROM(short iobase, unsigned char eaddr); |
iobase | 312 | drivers/net/ewrk3.c | static int Write_EEPROM(short data, short iobase, unsigned char eaddr); |
iobase | 318 | drivers/net/ewrk3.c | static struct device *alloc_device(struct device *dev, int iobase); |
iobase | 397 | drivers/net/ewrk3.c | ewrk3_hw_init(struct device *dev, short iobase) |
iobase | 410 | drivers/net/ewrk3.c | if (iobase > 0x400) eisa_cr = inb(EISA_CR); |
iobase | 431 | drivers/net/ewrk3.c | tmp.val = (short)Read_EEPROM(iobase, (i>>1)); |
iobase | 448 | drivers/net/ewrk3.c | dev->base_addr = iobase; |
iobase | 450 | drivers/net/ewrk3.c | if (iobase > 0x400) { |
iobase | 459 | drivers/net/ewrk3.c | printk("%s: %s at %#3x", dev->name, name, iobase); |
iobase | 461 | drivers/net/ewrk3.c | } else if ((iobase&0x0fff)==EWRK3_EISA_IO_PORTS) { |
iobase | 464 | drivers/net/ewrk3.c | dev->name, name, iobase, ((iobase>>12)&0x0f)); |
iobase | 466 | drivers/net/ewrk3.c | printk("%s: %s at %#3x", dev->name, name, iobase); |
iobase | 480 | drivers/net/ewrk3.c | DevicePresent(iobase); /* needed after the EWRK3_INIT */ |
iobase | 651 | drivers/net/ewrk3.c | int i, iobase = dev->base_addr; |
iobase | 729 | drivers/net/ewrk3.c | short iobase = dev->base_addr; |
iobase | 763 | drivers/net/ewrk3.c | int iobase = dev->base_addr; |
iobase | 913 | drivers/net/ewrk3.c | int iobase; |
iobase | 920 | drivers/net/ewrk3.c | iobase = dev->base_addr; |
iobase | 977 | drivers/net/ewrk3.c | int i, iobase = dev->base_addr; |
iobase | 1122 | drivers/net/ewrk3.c | int iobase = dev->base_addr; |
iobase | 1157 | drivers/net/ewrk3.c | int iobase = dev->base_addr; |
iobase | 1219 | drivers/net/ewrk3.c | int iobase = dev->base_addr; |
iobase | 1254 | drivers/net/ewrk3.c | int i, iobase = dev->base_addr; |
iobase | 1336 | drivers/net/ewrk3.c | int i, iobase, status; |
iobase | 1339 | drivers/net/ewrk3.c | for (status = -ENODEV, iobase = EWRK3_IO_BASE,i = 0; |
iobase | 1341 | drivers/net/ewrk3.c | iobase += EWRK3_IOP_INC, i++) { |
iobase | 1344 | drivers/net/ewrk3.c | if (!check_region(iobase, EWRK3_TOTAL_SIZE)) { |
iobase | 1345 | drivers/net/ewrk3.c | if (DevicePresent(iobase) == 0) { |
iobase | 1350 | drivers/net/ewrk3.c | request_region(iobase, EWRK3_IOP_INC, "ewrk3"); |
iobase | 1352 | drivers/net/ewrk3.c | dev = alloc_device(dev, iobase); |
iobase | 1354 | drivers/net/ewrk3.c | if ((status = ewrk3_hw_init(dev, iobase)) == 0) { |
iobase | 1360 | drivers/net/ewrk3.c | mem_chkd &= ~(0x01 << ((iobase - EWRK3_IO_BASE)/EWRK3_IOP_INC)); |
iobase | 1363 | drivers/net/ewrk3.c | printk("%s: ewrk3_probe(): Detected a device already registered at 0x%02x\n", dev->name, iobase); |
iobase | 1364 | drivers/net/ewrk3.c | mem_chkd &= ~(0x01 << ((iobase - EWRK3_IO_BASE)/EWRK3_IOP_INC)); |
iobase | 1379 | drivers/net/ewrk3.c | int i, iobase = EWRK3_EISA_IO_PORTS; |
iobase | 1382 | drivers/net/ewrk3.c | iobase+=EISA_SLOT_INC; /* get the first slot address */ |
iobase | 1383 | drivers/net/ewrk3.c | for (status = -ENODEV, i=1; i<MAX_EISA_SLOTS; i++, iobase+=EISA_SLOT_INC) { |
iobase | 1386 | drivers/net/ewrk3.c | if (!check_region(iobase, EWRK3_TOTAL_SIZE)) { |
iobase | 1387 | drivers/net/ewrk3.c | if (DevicePresent(iobase) == 0) { |
iobase | 1393 | drivers/net/ewrk3.c | request_region(iobase, EWRK3_IOP_INC, "ewrk3"); |
iobase | 1395 | drivers/net/ewrk3.c | dev = alloc_device(dev, iobase); |
iobase | 1397 | drivers/net/ewrk3.c | if ((status = ewrk3_hw_init(dev, iobase)) == 0) { |
iobase | 1412 | drivers/net/ewrk3.c | static struct device *alloc_device(struct device *dev, int iobase) |
iobase | 1446 | drivers/net/ewrk3.c | dev->base_addr = iobase; /* assign the io address */ |
iobase | 1459 | drivers/net/ewrk3.c | static int Read_EEPROM(short iobase, unsigned char eaddr) |
iobase | 1473 | drivers/net/ewrk3.c | static int Write_EEPROM(short data, short iobase, unsigned char eaddr) |
iobase | 1522 | drivers/net/ewrk3.c | static int DevicePresent(short iobase) |
iobase | 1581 | drivers/net/ewrk3.c | int iobase = dev->base_addr; |
iobase | 1615 | drivers/net/ewrk3.c | int i, j, iobase = dev->base_addr, status = 0; |
iobase | 1780 | drivers/net/ewrk3.c | tmp.val[i] = (short)Read_EEPROM(iobase, i); |
iobase | 1801 | drivers/net/ewrk3.c | Write_EEPROM(tmp.val[i], iobase, i); |
iobase | 18 | drivers/net/ewrk3.h | #define EWRK3_CSR iobase+0x00 /* Control and Status Register */ |
iobase | 19 | drivers/net/ewrk3.h | #define EWRK3_CR iobase+0x01 /* Control Register */ |
iobase | 20 | drivers/net/ewrk3.h | #define EWRK3_ICR iobase+0x02 /* Interrupt Control Register */ |
iobase | 21 | drivers/net/ewrk3.h | #define EWRK3_TSR iobase+0x03 /* Transmit Status Register */ |
iobase | 22 | drivers/net/ewrk3.h | #define EWRK3_RSVD1 iobase+0x04 /* RESERVED */ |
iobase | 23 | drivers/net/ewrk3.h | #define EWRK3_RSVD2 iobase+0x05 /* RESERVED */ |
iobase | 24 | drivers/net/ewrk3.h | #define EWRK3_FMQ iobase+0x06 /* Free Memory Queue */ |
iobase | 25 | drivers/net/ewrk3.h | #define EWRK3_FMQC iobase+0x07 /* Free Memory Queue Counter */ |
iobase | 26 | drivers/net/ewrk3.h | #define EWRK3_RQ iobase+0x08 /* Receive Queue */ |
iobase | 27 | drivers/net/ewrk3.h | #define EWRK3_RQC iobase+0x09 /* Receive Queue Counter */ |
iobase | 28 | drivers/net/ewrk3.h | #define EWRK3_TQ iobase+0x0a /* Transmit Queue */ |
iobase | 29 | drivers/net/ewrk3.h | #define EWRK3_TQC iobase+0x0b /* Transmit Queue Counter */ |
iobase | 30 | drivers/net/ewrk3.h | #define EWRK3_TDQ iobase+0x0c /* Transmit Done Queue */ |
iobase | 31 | drivers/net/ewrk3.h | #define EWRK3_TDQC iobase+0x0d /* Transmit Done Queue Counter */ |
iobase | 32 | drivers/net/ewrk3.h | #define EWRK3_PIR1 iobase+0x0e /* Page Index Register 1 */ |
iobase | 33 | drivers/net/ewrk3.h | #define EWRK3_PIR2 iobase+0x0f /* Page Index Register 2 */ |
iobase | 34 | drivers/net/ewrk3.h | #define EWRK3_DATA iobase+0x10 /* Data Register */ |
iobase | 35 | drivers/net/ewrk3.h | #define EWRK3_IOPR iobase+0x11 /* I/O Page Register */ |
iobase | 36 | drivers/net/ewrk3.h | #define EWRK3_IOBR iobase+0x12 /* I/O Base Register */ |
iobase | 37 | drivers/net/ewrk3.h | #define EWRK3_MPR iobase+0x13 /* Memory Page Register */ |
iobase | 38 | drivers/net/ewrk3.h | #define EWRK3_MBR iobase+0x14 /* Memory Base Register */ |
iobase | 39 | drivers/net/ewrk3.h | #define EWRK3_APROM iobase+0x15 /* Address PROM */ |
iobase | 40 | drivers/net/ewrk3.h | #define EWRK3_EPROM1 iobase+0x16 /* EEPROM Data Register 1 */ |
iobase | 41 | drivers/net/ewrk3.h | #define EWRK3_EPROM2 iobase+0x17 /* EEPROM Data Register 2 */ |
iobase | 42 | drivers/net/ewrk3.h | #define EWRK3_PAR0 iobase+0x18 /* Physical Address Register 0 */ |
iobase | 43 | drivers/net/ewrk3.h | #define EWRK3_PAR1 iobase+0x19 /* Physical Address Register 1 */ |
iobase | 44 | drivers/net/ewrk3.h | #define EWRK3_PAR2 iobase+0x1a /* Physical Address Register 2 */ |
iobase | 45 | drivers/net/ewrk3.h | #define EWRK3_PAR3 iobase+0x1b /* Physical Address Register 3 */ |
iobase | 46 | drivers/net/ewrk3.h | #define EWRK3_PAR4 iobase+0x1c /* Physical Address Register 4 */ |
iobase | 47 | drivers/net/ewrk3.h | #define EWRK3_PAR5 iobase+0x1d /* Physical Address Register 5 */ |
iobase | 48 | drivers/net/ewrk3.h | #define EWRK3_CMR iobase+0x1e /* Configuration/Management Register */ |
iobase | 175 | drivers/net/ewrk3.h | #define EISA_ID0 iobase + 0x0c80 /* EISA ID Register 0 */ |
iobase | 176 | drivers/net/ewrk3.h | #define EISA_ID1 iobase + 0x0c81 /* EISA ID Register 1 */ |
iobase | 177 | drivers/net/ewrk3.h | #define EISA_ID2 iobase + 0x0c82 /* EISA ID Register 2 */ |
iobase | 178 | drivers/net/ewrk3.h | #define EISA_ID3 iobase + 0x0c83 /* EISA ID Register 3 */ |
iobase | 179 | drivers/net/ewrk3.h | #define EISA_CR iobase + 0x0c84 /* EISA Control Register */ |
iobase | 780 | drivers/net/wavelan.c | static unsigned short iobase[] = |
iobase | 830 | drivers/net/wavelan.c | for (i = 0; i < nels(iobase); i++) |
iobase | 832 | drivers/net/wavelan.c | if (check_region(iobase[i], sizeof(ha_t))) |
iobase | 835 | drivers/net/wavelan.c | if (wavelan_probe1(dev, iobase[i]) == 0) |
iobase | 322 | drivers/scsi/eata.c | static inline unchar wait_on_busy(ushort iobase) { |
iobase | 325 | drivers/scsi/eata.c | while (inb(iobase + REG_AUX_STATUS) & ABSY_ASSERTED) |
iobase | 331 | drivers/scsi/eata.c | static inline unchar do_dma (ushort iobase, unsigned int addr, unchar cmd) { |
iobase | 333 | drivers/scsi/eata.c | if (wait_on_busy(iobase)) return TRUE; |
iobase | 336 | drivers/scsi/eata.c | outb((char) addr, iobase + REG_LOW); |
iobase | 337 | drivers/scsi/eata.c | outb((char) (addr >> 8), iobase + REG_LM); |
iobase | 338 | drivers/scsi/eata.c | outb((char) (addr >> 16), iobase + REG_MID); |
iobase | 339 | drivers/scsi/eata.c | outb((char) (addr >> 24), iobase + REG_MSB); |
iobase | 342 | drivers/scsi/eata.c | outb(cmd, iobase + REG_CMD); |
iobase | 346 | drivers/scsi/eata.c | static inline unchar read_pio (ushort iobase, ushort *start, ushort *end) { |
iobase | 352 | drivers/scsi/eata.c | while (!(inb(iobase + REG_STATUS) & DRQ_ASSERTED)) |
iobase | 356 | drivers/scsi/eata.c | *p = inw(iobase); |
iobase | 563 | drivers/scsi/fdomain.c | static int fdomain_isa_detect( int *irq, int *iobase ) |
iobase | 605 | drivers/scsi/fdomain.c | *iobase = base; |
iobase | 644 | drivers/scsi/fdomain.c | *iobase = base; |
iobase | 649 | drivers/scsi/fdomain.c | static int fdomain_pci_nobios_detect( int *irq, int *iobase ) |
iobase | 677 | drivers/scsi/fdomain.c | *iobase = i; |
iobase | 700 | drivers/scsi/fdomain.c | static int fdomain_pci_bios_detect( int *irq, int *iobase ) |
iobase | 712 | drivers/scsi/fdomain.c | if (!pcibios_present()) return fdomain_pci_nobios_detect( irq, iobase ); |
iobase | 800 | drivers/scsi/fdomain.c | *iobase = (pci_base & 0xfff8); |
iobase | 804 | drivers/scsi/fdomain.c | printk( "TMC-3260: IRQ = %d, I/O base = 0x%x\n", *irq, *iobase ); |
iobase | 807 | drivers/scsi/fdomain.c | if (!fdomain_is_valid_port( *iobase )) return 0; |
iobase | 287 | drivers/scsi/u14-34f.c | static inline unchar wait_on_busy(ushort iobase) { |
iobase | 290 | drivers/scsi/u14-34f.c | while (inb(iobase + REG_LCL_INTR) & BSY_ASSERTED) |
iobase | 164 | drivers/scsi/wd7000.c | int iobase; /* This adapter's I/O base address */ |
iobase | 189 | drivers/scsi/wd7000.c | int iobase; /* I/O ports base address */ |
iobase | 536 | drivers/scsi/wd7000.c | outb(host->control, host->iobase+ASC_CONTROL); |
iobase | 543 | drivers/scsi/wd7000.c | outb(host->control,host->iobase+ASC_CONTROL); |
iobase | 573 | drivers/scsi/wd7000.c | WAIT(host->iobase+ASC_STAT,ASC_STATMASK,CMD_RDY,0); |
iobase | 576 | drivers/scsi/wd7000.c | outb(*cmd, host->iobase+ASC_COMMAND); |
iobase | 577 | drivers/scsi/wd7000.c | WAIT(host->iobase+ASC_STAT, ASC_STATMASK, CMD_RDY, 0); |
iobase | 578 | drivers/scsi/wd7000.c | } while (inb(host->iobase+ASC_STAT) & CMD_REJ); |
iobase | 802 | drivers/scsi/wd7000.c | #define wd7000_intr_ack(host) outb(0,host->iobase+ASC_INTR_ACK) |
iobase | 818 | drivers/scsi/wd7000.c | flag = inb(host->iobase+ASC_INTR_STAT); |
iobase | 823 | drivers/scsi/wd7000.c | if (!(inb(host->iobase+ASC_STAT) & INT_IM)) { |
iobase | 999 | drivers/scsi/wd7000.c | outb(ASC_RES, host->iobase+ASC_CONTROL); |
iobase | 1001 | drivers/scsi/wd7000.c | outb(0,host->iobase+ASC_CONTROL); |
iobase | 1003 | drivers/scsi/wd7000.c | WAIT(host->iobase+ASC_STAT, ASC_STATMASK, CMD_RDY, 0); |
iobase | 1005 | drivers/scsi/wd7000.c | if ((diag = inb(host->iobase+ASC_INTR_STAT)) != 1) { |
iobase | 1042 | drivers/scsi/wd7000.c | WAIT(host->iobase+ASC_STAT, ASC_STATMASK, ASC_INIT, 0); |
iobase | 1125 | drivers/scsi/wd7000.c | if (check_region(cfg->iobase, 4)) { /* ports in use */ |
iobase | 1126 | drivers/scsi/wd7000.c | printk("IO %xh already in use.\n", host->iobase); |
iobase | 1145 | drivers/scsi/wd7000.c | host->iobase = cfg->iobase; |
iobase | 1162 | drivers/scsi/wd7000.c | host->iobase, host->irq, host->dma); |
iobase | 1164 | drivers/scsi/wd7000.c | request_region(host->iobase, 4,"wd7000"); /* Register our ports */ |
iobase | 1189 | drivers/scsi/wd7000.c | if (inb(host->iobase+ASC_STAT) & INT_IM) { |