This source file includes following definitions.
- wavelan_splhi
- wavelan_splx
- hasr_read
- hacr_write
- hacr_write_slow
- set_chan_attn
- wavelan_reset
- wavelan_16_off
- wavelan_16_on
- wavelan_ints_off
- wavelan_ints_on
- psa_read
- psa_write
- obram_read
- obram_write
- mmc_read
- mmc_write
- wavelan_unmap_irq
- wavelan_map_irq
- wavelan_mmc_init
- wavelan_ack
- wavelan_synchronous_cmd
- wavelan_hardware_reset
- wavelan_struct_check
- wavelan_probe
- wavelan_probe1
- wavelan_ru_start
- wavelan_cu_start
- wavelan_open
- hardware_send_packet
- wavelan_send_packet
- addrcmp
- wavelan_receive
- wavelan_complete
- wavelan_watchdog
- wavelan_interrupt
- wavelan_close
- wavelan_get_stats
- wavelan_set_multicast_list
- sprintf_stats
- wavelan_get_info
- init_module
- cleanup_module
- wavelan_cu_show_one
- wavelan_psa_show
- wavelan_mmc_show
- wavelan_scb_show
- wavelan_ru_show
- wavelan_cu_show
- wavelan_dev_show
- wavelan_local_show
1
2
3
4
5
6
7 #include <linux/config.h>
8
9 #if defined(MODULE)
10 #include <linux/module.h>
11 #include <linux/version.h>
12 #endif
13
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/types.h>
17 #include <linux/fcntl.h>
18 #include <linux/interrupt.h>
19 #include <linux/ptrace.h>
20 #include <linux/ioport.h>
21 #include <linux/in.h>
22 #include <linux/string.h>
23 #include <linux/delay.h>
24 #include <asm/system.h>
25 #include <asm/bitops.h>
26 #include <asm/io.h>
27 #include <asm/dma.h>
28 #include <linux/errno.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/skbuff.h>
32 #include <linux/malloc.h>
33 #include <linux/timer.h>
34 #define STRUCT_CHECK 1
35 #include "i82586.h"
36 #include "wavelan.h"
37
38 #ifndef WAVELAN_DEBUG
39 #define WAVELAN_DEBUG 0
40 #endif
41
42 #define WATCHDOG_JIFFIES 512
43 #define ENABLE_FULL_PROMISCUOUS 0x10000
44
45 #define nels(a) (sizeof(a) / sizeof(a[0]))
46
47 typedef struct device device;
48 typedef struct enet_statistics en_stats;
49 typedef struct net_local net_local;
50 typedef struct timer_list timer_list;
51
52 struct net_local
53 {
54 en_stats stats;
55 unsigned int tx_n_in_use;
56 unsigned char nwid[2];
57 unsigned short hacr;
58 unsigned short rx_head;
59 unsigned short rx_last;
60 unsigned short tx_first_free;
61 unsigned short tx_first_in_use;
62 unsigned int nresets;
63 unsigned int correct_nwid;
64 unsigned int wrong_nwid;
65 unsigned int promiscuous;
66 unsigned int full_promiscuous;
67 timer_list watchdog;
68 device *dev;
69 net_local *prev;
70 net_local *next;
71 };
72
73 extern int wavelan_probe(device *);
74
75 static char *version = "wavelan.c:v7 95/4/8\n";
76
77
78
79
80 static int wavelan_probe1(device *, unsigned short);
81 static int wavelan_open(device *);
82 static int wavelan_send_packet(struct sk_buff *, device *);
83 static void wavelan_interrupt(int, struct pt_regs *);
84 static int wavelan_close(device *);
85 static en_stats *wavelan_get_stats(device *);
86 static void wavelan_set_multicast_list(device *, int, void *);
87
88
89
90
91 static void wavelan_cu_show_one(device *, net_local *, int, unsigned short);
92 static void wavelan_cu_start(device *);
93 static void wavelan_ru_start(device *);
94 static void wavelan_watchdog(unsigned long);
95 #if 0
96 static void wavelan_psa_show(psa_t *);
97 static void wavelan_mmc_show(unsigned short);
98 #endif
99 static void wavelan_scb_show(unsigned short);
100 static void wavelan_ru_show(device *);
101 static void wavelan_cu_show(device *);
102 static void wavelan_dev_show(device *);
103 static void wavelan_local_show(device *);
104
105 static unsigned int wavelan_debug = WAVELAN_DEBUG;
106 static net_local *first_wavelan = (net_local *)0;
107
108 static
109 unsigned long
110 wavelan_splhi(void)
111 {
112 unsigned long flags;
113
114 save_flags(flags);
115 cli();
116
117 return flags;
118 }
119
120 static
121 void
122 wavelan_splx(unsigned long flags)
123 {
124 restore_flags(flags);
125 }
126
127 static
128 unsigned short
129 hasr_read(unsigned short ioaddr)
130 {
131 return inw(HASR(ioaddr));
132 }
133
134 static
135 void
136 hacr_write(unsigned short ioaddr, int hacr)
137 {
138 outw(hacr, HACR(ioaddr));
139 }
140
141 static
142 void
143 hacr_write_slow(unsigned short ioaddr, int hacr)
144 {
145 hacr_write(ioaddr, hacr);
146
147 udelay(1000);
148 }
149
150
151
152
153 static
154 void
155 set_chan_attn(unsigned short ioaddr, unsigned short current_hacr)
156 {
157 hacr_write(ioaddr, current_hacr | HACR_CA);
158 }
159
160
161
162
163 static
164 void
165 wavelan_reset(unsigned short ioaddr)
166 {
167 hacr_write_slow(ioaddr, HACR_RESET);
168 hacr_write(ioaddr, HACR_DEFAULT);
169 }
170
171 static
172 void
173 wavelan_16_off(unsigned short ioaddr, unsigned short hacr)
174 {
175 hacr &= ~HACR_16BITS;
176
177 hacr_write(ioaddr, hacr);
178 }
179
180 static
181 void
182 wavelan_16_on(unsigned short ioaddr, unsigned short hacr)
183 {
184 hacr |= HACR_16BITS;
185
186 hacr_write(ioaddr, hacr);
187 }
188
189 static
190 void
191 wavelan_ints_off(device *dev)
192 {
193 unsigned short ioaddr;
194 net_local *lp;
195 unsigned long x;
196
197 ioaddr = dev->base_addr;
198 lp = (net_local *)dev->priv;
199
200 x = wavelan_splhi();
201
202 lp->hacr &= ~HACR_INTRON;
203 hacr_write(ioaddr, lp->hacr);
204
205 wavelan_splx(x);
206 }
207
208 static
209 void
210 wavelan_ints_on(device *dev)
211 {
212 unsigned short ioaddr;
213 net_local *lp;
214 unsigned long x;
215
216 ioaddr = dev->base_addr;
217 lp = (net_local *)dev->priv;
218
219 x = wavelan_splhi();
220
221 lp->hacr |= HACR_INTRON;
222 hacr_write(ioaddr, lp->hacr);
223
224 wavelan_splx(x);
225 }
226
227
228
229
230 static
231 void
232 psa_read(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
233 {
234 wavelan_16_off(ioaddr, hacr);
235
236 while (n-- > 0)
237 {
238 outw(o, PIOR2(ioaddr));
239 o++;
240 *b++ = inb(PIOP2(ioaddr));
241 }
242
243 wavelan_16_on(ioaddr, hacr);
244 }
245
246 #if defined(IRQ_SET_WORKS)
247
248
249
250 static
251 void
252 psa_write(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
253 {
254 wavelan_16_off(ioaddr, hacr);
255
256 while (n-- > 0)
257 {
258 outw(o, PIOR2(ioaddr));
259 o++;
260 outb(*b, PIOP2(ioaddr));
261 b++;
262 }
263
264 wavelan_16_on(ioaddr, hacr);
265 }
266 #endif
267
268
269
270
271 static
272 void
273 obram_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
274 {
275 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
276
277 outw(o, PIOR1(ioaddr));
278
279 insw(PIOP1(ioaddr), (unsigned short *)b, n);
280 }
281
282
283
284
285 static
286 void
287 obram_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
288 {
289 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
290
291 outw(o, PIOR1(ioaddr));
292
293 outsw(PIOP1(ioaddr), (unsigned short *)b, n);
294 }
295
296
297
298
299 static
300 void
301 mmc_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
302 {
303 while (n-- > 0)
304 {
305 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
306 ;
307
308 outw(o << 1, MMCR(ioaddr));
309 o++;
310
311 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
312 ;
313
314 *b++ = (unsigned char)(inw(MMCR(ioaddr)) >> 8);
315 }
316 }
317
318
319
320
321 static
322 void
323 mmc_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
324 {
325 while (n-- > 0)
326 {
327 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
328 ;
329
330 outw((unsigned short)(((unsigned short)*b << 8) | (o << 1) | 1), MMCR(ioaddr));
331 b++;
332 o++;
333 }
334 }
335
336 static int irqvals[] =
337 {
338 0, 0, 0, 0x01,
339 0x02, 0x04, 0, 0x08,
340 0, 0, 0x10, 0x20,
341 0x40, 0, 0, 0x80,
342 };
343
344 #if defined(IRQ_SET_WORKS)
345 static
346 int
347 wavelan_unmap_irq(int irq, unsigned char *irqval)
348 {
349 if (irq < 0 || irq >= nels(irqvals) || irqvals[irq] == 0)
350 return -1;
351
352 *irqval = (unsigned char)irqvals[irq];
353
354 return 0;
355 }
356 #endif
357
358
359
360
361 static
362 int
363 wavelan_map_irq(unsigned char irqval)
364 {
365 int irq;
366
367 for (irq = 0; irq < nels(irqvals); irq++)
368 {
369 if (irqvals[irq] == (int)irqval)
370 return irq;
371 }
372
373 return -1;
374 }
375
376
377
378
379 static
380 void
381 wavelan_mmc_init(device *dev, psa_t *psa)
382 {
383 unsigned short ioaddr;
384 net_local *lp;
385 mmw_t m;
386 int configured;
387
388 ioaddr = dev->base_addr;
389 lp = (net_local *)dev->priv;
390 memset(&m, 0x00, sizeof(m));
391
392
393
394
395
396
397
398
399
400 configured = 0;
401
402
403
404
405
406 m.mmw_jabber_enable = 0x01;
407 m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
408 m.mmw_ifs = 0x20;
409 m.mmw_mod_delay = 0x04;
410 m.mmw_jam_time = 0x38;
411
412 m.mmw_encr_enable = 0;
413 m.mmw_des_io_invert = 0;
414 m.mmw_freeze = 0;
415 m.mmw_decay_prm = 0;
416 m.mmw_decay_updat_prm = 0;
417
418 if (configured)
419 {
420
421
422
423 if (psa->psa_undefined & 1)
424 m.mmw_loopt_sel = 0x00;
425 else
426 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
427
428 m.mmw_thr_pre_set = psa->psa_thr_pre_set & 0x3F;
429 m.mmw_quality_thr = psa->psa_quality_thr & 0x0F;
430 }
431 else
432 {
433 if (lp->promiscuous && lp->full_promiscuous)
434 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
435 else
436 m.mmw_loopt_sel = 0x00;
437
438
439
440
441
442 if (psa->psa_comp_number & 1)
443 m.mmw_thr_pre_set = 0x01;
444 else
445 m.mmw_thr_pre_set = 0x04;
446
447 m.mmw_quality_thr = 0x03;
448 }
449
450 m.mmw_netw_id_l = lp->nwid[1];
451 m.mmw_netw_id_h = lp->nwid[0];
452
453 mmc_write(ioaddr, 0, (unsigned char *)&m, sizeof(m));
454 }
455
456 static
457 void
458 wavelan_ack(device *dev)
459 {
460 unsigned short ioaddr;
461 net_local *lp;
462 unsigned short scb_cs;
463 int i;
464
465 ioaddr = dev->base_addr;
466 lp = (net_local *)dev->priv;
467
468 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
469 scb_cs &= SCB_ST_INT;
470
471 if (scb_cs == 0)
472 return;
473
474 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
475
476 set_chan_attn(ioaddr, lp->hacr);
477
478 for (i = 1000; i > 0; i--)
479 {
480 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
481 if (scb_cs == 0)
482 break;
483
484 udelay(1000);
485 }
486
487 if (i <= 0)
488 printk("%s: wavelan_ack(): board not accepting command.\n", dev->name);
489 }
490
491
492
493
494
495 static
496 int
497 wavelan_synchronous_cmd(device *dev, char *str)
498 {
499 unsigned short ioaddr;
500 net_local *lp;
501 unsigned short scb_cmd;
502 ach_t cb;
503 int i;
504
505 ioaddr = dev->base_addr;
506 lp = (net_local *)dev->priv;
507
508 scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO;
509 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
510
511 set_chan_attn(ioaddr, lp->hacr);
512
513 for (i = 64; i > 0; i--)
514 {
515 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
516 if (cb.ac_status & AC_SFLD_C)
517 break;
518
519 udelay(1000);
520 }
521
522 if (i <= 0 || !(cb.ac_status & AC_SFLD_OK))
523 {
524 printk("%s: %s failed; status = 0x%x\n", dev->name, str, cb.ac_status);
525 wavelan_scb_show(ioaddr);
526 return -1;
527 }
528
529 wavelan_ack(dev);
530
531 return 0;
532 }
533
534 static
535 int
536 wavelan_hardware_reset(device *dev)
537 {
538 unsigned short ioaddr;
539 psa_t psa;
540 net_local *lp;
541 scp_t scp;
542 iscp_t iscp;
543 scb_t scb;
544 ach_t cb;
545 int i;
546 ac_cfg_t cfg;
547 ac_ias_t ias;
548
549 if (wavelan_debug > 0)
550 printk("%s: ->wavelan_hardware_reset(dev=0x%x)\n", dev->name, (unsigned int)dev);
551
552 ioaddr = dev->base_addr;
553 lp = (net_local *)dev->priv;
554
555 lp->nresets++;
556
557 wavelan_reset(ioaddr);
558 lp->hacr = HACR_DEFAULT;
559
560
561
562
563 {
564 unsigned char zeroes[512];
565
566 memset(&zeroes[0], 0x00, sizeof(zeroes));
567
568 for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes))
569 obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes));
570 }
571
572 psa_read(ioaddr, lp->hacr, 0, (unsigned char *)&psa, sizeof(psa));
573
574 wavelan_mmc_init(dev, &psa);
575
576
577
578
579
580 memset(&scp, 0x00, sizeof(scp));
581 scp.scp_sysbus = SCP_SY_16BBUS;
582 scp.scp_iscpl = OFFSET_ISCP;
583 obram_write(ioaddr, OFFSET_SCP, (unsigned char *)&scp, sizeof(scp));
584
585 memset(&iscp, 0x00, sizeof(iscp));
586 iscp.iscp_busy = 1;
587 iscp.iscp_offset = OFFSET_SCB;
588 obram_write(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
589
590 memset(&scb, 0x00, sizeof(scb));
591 scb.scb_command = SCB_CMD_RESET;
592 scb.scb_cbl_offset = OFFSET_CU;
593 scb.scb_rfa_offset = OFFSET_RU;
594 obram_write(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
595
596 set_chan_attn(ioaddr, lp->hacr);
597
598 for (i = 1000; i > 0; i--)
599 {
600 obram_read(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
601
602 if (iscp.iscp_busy == (unsigned short)0)
603 break;
604
605 udelay(1000);
606 }
607
608 if (i <= 0)
609 {
610 printk("%s: wavelan_hardware_reset(): iscp_busy timeout.\n", dev->name);
611 if (wavelan_debug > 0)
612 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
613 return -1;
614 }
615
616 for (i = 15; i > 0; i--)
617 {
618 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
619
620 if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA))
621 break;
622
623 udelay(1000);
624 }
625
626 if (i <= 0)
627 {
628 printk("%s: wavelan_hardware_reset(): status: expected 0x%02x, got 0x%02x.\n", dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status);
629 if (wavelan_debug > 0)
630 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
631 return -1;
632 }
633
634 wavelan_ack(dev);
635
636 memset(&cb, 0x00, sizeof(cb));
637 cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose);
638 cb.ac_link = OFFSET_CU;
639 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
640
641 if (wavelan_synchronous_cmd(dev, "diag()") == -1)
642 {
643 if (wavelan_debug > 0)
644 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
645 return -1;
646 }
647
648 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
649 if (cb.ac_status & AC_SFLD_FAIL)
650 {
651 printk("%s: wavelan_hardware_reset(): i82586 Self Test failed.\n", dev->name);
652 if (wavelan_debug > 0)
653 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
654 return -1;
655 }
656
657 memset(&cfg, 0x00, sizeof(cfg));
658
659 #if 0
660
661
662
663 cfg.fifolim_bytecnt = 0x080c;
664 cfg.addrlen_mode = 0x2600;
665 cfg.linprio_interframe = 0x7820;
666 cfg.slot_time = 0xf00c;
667 cfg.hardware = 0x0008;
668 cfg.min_frame_len = 0x0040;
669 #endif
670
671
672
673
674
675
676 cfg.cfg_byte_cnt = AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t));
677 cfg.cfg_fifolim = AC_CFG_FIFOLIM(8);
678 cfg.cfg_byte8 = AC_CFG_SAV_BF(0) |
679 AC_CFG_SRDY(0);
680 cfg.cfg_byte9 = AC_CFG_ELPBCK(0) |
681 AC_CFG_ILPBCK(0) |
682 AC_CFG_PRELEN(AC_CFG_PLEN_2) |
683 AC_CFG_ALOC(1) |
684 AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE);
685 cfg.cfg_byte10 = AC_CFG_BOFMET(0) |
686 AC_CFG_ACR(0) |
687 AC_CFG_LINPRIO(0);
688 cfg.cfg_ifs = 32;
689 cfg.cfg_slotl = 0;
690 cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) |
691 AC_CFG_SLTTMHI(2);
692 cfg.cfg_byte14 = AC_CFG_FLGPAD(0) |
693 AC_CFG_BTSTF(0) |
694 AC_CFG_CRC16(0) |
695 AC_CFG_NCRC(0) |
696 AC_CFG_TNCRS(1) |
697 AC_CFG_MANCH(0) |
698 AC_CFG_BCDIS(0) |
699 AC_CFG_PRM(lp->promiscuous);
700 cfg.cfg_byte15 = AC_CFG_ICDS(0) |
701 AC_CFG_CDTF(0) |
702 AC_CFG_ICSS(0) |
703 AC_CFG_CSTF(0);
704
705
706
707 cfg.cfg_min_frm_len = AC_CFG_MNFRM(8);
708
709 cfg.cfg_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_configure);
710 cfg.cfg_h.ac_link = OFFSET_CU;
711 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cfg, sizeof(cfg));
712
713 if (wavelan_synchronous_cmd(dev, "reset()-configure") == -1)
714 {
715 if (wavelan_debug > 0)
716 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
717
718 return -1;
719 }
720
721 memset(&ias, 0x00, sizeof(ias));
722 ias.ias_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_ia_setup);
723 ias.ias_h.ac_link = OFFSET_CU;
724 memcpy(&ias.ias_addr[0], (unsigned char *)&dev->dev_addr[0], sizeof(ias.ias_addr));
725 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&ias, sizeof(ias));
726
727 if (wavelan_synchronous_cmd(dev, "reset()-address") == -1)
728 {
729 if (wavelan_debug > 0)
730 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
731
732 return -1;
733 }
734
735 wavelan_ints_on(dev);
736
737 if (wavelan_debug > 4)
738 wavelan_scb_show(ioaddr);
739
740 wavelan_ru_start(dev);
741 wavelan_cu_start(dev);
742
743 if (wavelan_debug > 0)
744 printk("%s: <-wavelan_hardware_reset(): 0\n", dev->name);
745
746 return 0;
747 }
748
749 #if STRUCT_CHECK == 1
750
751 static
752 char *
753 wavelan_struct_check(void)
754 {
755 #define SC(t,s,n) if (sizeof(t) != s) return n
756 SC(psa_t, PSA_SIZE, "psa_t");
757 SC(mmw_t, MMW_SIZE, "mmw_t");
758 SC(mmr_t, MMR_SIZE, "mmr_t");
759 SC(ha_t, HA_SIZE, "ha_t");
760 #undef SC
761
762 return (char *)0;
763 }
764
765 #endif
766
767
768
769
770
771
772
773
774 int
775 wavelan_probe(device *dev)
776 {
777 int i;
778 int r;
779 short base_addr;
780 static unsigned short iobase[] =
781 {
782 #if 0
783 Leave out 0x3C0 for now -- seems to clash
784 with some video controllers.
785 Leave out the others too -- we will always
786 use 0x390 and leave 0x300 for the Ethernet device.
787 0x300, 0x390, 0x3E0, 0x3C0,
788 #endif
789 0x390,
790 };
791
792 if (wavelan_debug > 0)
793 printk("%s: ->wavelan_probe(dev=0x%x (base_addr=0x%x))\n", dev->name, (unsigned int)dev, (unsigned int)dev->base_addr);
794
795 #if STRUCT_CHECK == 1
796 if (wavelan_struct_check() != (char *)0)
797 {
798 printk("%s: structure/compiler botch: \"%s\"\n", dev->name, wavelan_struct_check());
799
800 if (wavelan_debug > 0)
801 printk("%s: <-wavelan_probe(): ENODEV\n", dev->name);
802
803 return ENODEV;
804 }
805 #endif
806
807 base_addr = dev->base_addr;
808
809 if (base_addr < 0)
810 {
811
812
813
814 if (wavelan_debug > 0)
815 printk("%s: <-wavelan_probe(): ENXIO\n", dev->name);
816 return ENXIO;
817 }
818
819 if (base_addr > 0x100)
820 {
821
822
823
824 r = wavelan_probe1(dev, base_addr);
825 if (wavelan_debug > 0)
826 printk("%s: <-wavelan_probe(): %d\n", dev->name, r);
827 return r;
828 }
829
830 for (i = 0; i < nels(iobase); i++)
831 {
832 if (check_region(iobase[i], sizeof(ha_t)))
833 continue;
834
835 if (wavelan_probe1(dev, iobase[i]) == 0)
836 {
837 if (wavelan_debug > 0)
838 printk("%s: <-wavelan_probe(): 0\n", dev->name);
839 return 0;
840 }
841 }
842
843 if (wavelan_debug > 0)
844 printk("%s: <-wavelan_probe(): ENODEV\n", dev->name);
845
846 return ENODEV;
847 }
848
849 static
850 int
851 wavelan_probe1(device *dev, unsigned short ioaddr)
852 {
853 psa_t psa;
854 int irq;
855 int i;
856 net_local *lp;
857 int enable_full_promiscuous;
858
859 if (wavelan_debug > 0)
860 printk("%s: ->wavelan_probe1(dev=0x%x, ioaddr=0x%x)\n", dev->name, (unsigned int)dev, ioaddr);
861
862 wavelan_reset(ioaddr);
863
864 psa_read(ioaddr, HACR_DEFAULT, 0, (unsigned char *)&psa, sizeof(psa));
865
866
867
868
869
870 if
871 (
872 psa.psa_univ_mac_addr[0] != SA_ADDR0
873 ||
874 psa.psa_univ_mac_addr[1] != SA_ADDR1
875 ||
876 psa.psa_univ_mac_addr[2] != SA_ADDR2
877 )
878 {
879 if (wavelan_debug > 0)
880 printk("%s: <-wavelan_probe1(): ENODEV\n", dev->name);
881 return ENODEV;
882 }
883
884 printk("%s: WaveLAN at %#x,", dev->name, ioaddr);
885
886 if (dev->irq != 0)
887 {
888 printk("[WARNING: explicit IRQ value %d ignored: using PSA value instead]", dev->irq);
889 #if defined(IRQ_SET_WORKS)
890 Leave this out until I can get it to work -- BJ.
891 if (wavelan_unmap_irq(dev->irq, &psa.psa_int_req_no) == -1)
892 {
893 printk(" could not wavelan_unmap_irq(%d, ..) -- ignored.\n", dev->irq);
894 dev->irq = 0;
895 }
896 else
897 {
898 psa_write(ioaddr, HACR_DEFAULT, (char *)&psa.psa_int_req_no - (char *)&psa, (unsigned char *)&psa.psa_int_req_no, sizeof(psa.psa_int_req_no));
899 wavelan_reset(ioaddr);
900 }
901 #endif
902 }
903
904 if ((irq = wavelan_map_irq(psa.psa_int_req_no)) == -1)
905 {
906 printk(" could not wavelan_map_irq(%d).\n", psa.psa_int_req_no);
907 if (wavelan_debug > 0)
908 printk("%s: <-wavelan_probe1(): EAGAIN\n", dev->name);
909 return EAGAIN;
910 }
911
912 dev->irq = irq;
913
914 request_region(ioaddr, sizeof(ha_t), "wavelan");
915 dev->base_addr = ioaddr;
916
917
918
919
920
921
922
923
924
925
926
927
928 enable_full_promiscuous = (dev->mem_start & ENABLE_FULL_PROMISCUOUS) == ENABLE_FULL_PROMISCUOUS;
929 dev->mem_start &= ~ENABLE_FULL_PROMISCUOUS;
930
931 if (dev->mem_start != 0)
932 {
933 psa.psa_nwid[0] = (dev->mem_start >> 8) & 0xFF;
934 psa.psa_nwid[1] = (dev->mem_start >> 0) & 0xFF;
935 }
936
937 dev->mem_start = 0x0000;
938 dev->mem_end = 0x0000;
939 dev->if_port = 0;
940
941 memcpy(&dev->dev_addr[0], &psa.psa_univ_mac_addr[0], WAVELAN_ADDR_SIZE);
942
943 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
944 printk("%s%02x", (i == 0) ? " " : ":", dev->dev_addr[i]);
945
946 printk(", IRQ %d", dev->irq);
947 if (enable_full_promiscuous)
948 printk(", promisc");
949 printk(", nwid 0x%02x%02x", psa.psa_nwid[0], psa.psa_nwid[1]);
950
951 printk(", PC");
952 switch (psa.psa_comp_number)
953 {
954 case PSA_COMP_PC_AT_915:
955 case PSA_COMP_PC_AT_2400:
956 printk("-AT");
957 break;
958
959 case PSA_COMP_PC_MC_915:
960 case PSA_COMP_PC_MC_2400:
961 printk("-MC");
962 break;
963
964 case PSA_COMP_PCMCIA_915:
965 printk("MCIA");
966 break;
967
968 default:
969 printk("???");
970 break;
971 }
972
973 printk(", ");
974 switch (psa.psa_subband)
975 {
976 case PSA_SUBBAND_915:
977 printk("915");
978 break;
979
980 case PSA_SUBBAND_2425:
981 printk("2425");
982 break;
983
984 case PSA_SUBBAND_2460:
985 printk("2460");
986 break;
987
988 case PSA_SUBBAND_2484:
989 printk("2484");
990 break;
991
992 case PSA_SUBBAND_2430_5:
993 printk("2430.5");
994 break;
995
996 default:
997 printk("???");
998 break;
999 }
1000 printk(" MHz");
1001
1002 printk("\n");
1003
1004 if (wavelan_debug > 0)
1005 printk(version);
1006
1007 dev->priv = kmalloc(sizeof(net_local), GFP_KERNEL);
1008 memset(dev->priv, 0x00, sizeof(net_local));
1009 lp = (net_local *)dev->priv;
1010
1011 if (first_wavelan == (net_local *)0)
1012 {
1013 first_wavelan = lp;
1014 lp->prev = lp;
1015 lp->next = lp;
1016 }
1017 else
1018 {
1019 lp->prev = first_wavelan->prev;
1020 lp->next = first_wavelan;
1021 first_wavelan->prev->next = lp;
1022 first_wavelan->prev = lp;
1023 }
1024 lp->dev = dev;
1025
1026 lp->hacr = HACR_DEFAULT;
1027
1028 lp->full_promiscuous = enable_full_promiscuous;
1029 lp->nwid[0] = psa.psa_nwid[0];
1030 lp->nwid[1] = psa.psa_nwid[1];
1031
1032 lp->watchdog.function = wavelan_watchdog;
1033 lp->watchdog.data = (unsigned long)dev;
1034
1035 dev->open = wavelan_open;
1036 dev->stop = wavelan_close;
1037 dev->hard_start_xmit = wavelan_send_packet;
1038 dev->get_stats = wavelan_get_stats;
1039 dev->set_multicast_list = &wavelan_set_multicast_list;
1040
1041
1042
1043
1044
1045 ether_setup(dev);
1046
1047 dev->mtu = WAVELAN_MTU;
1048
1049 if (wavelan_debug > 0)
1050 printk("%s: <-wavelan_probe1(): 0\n", dev->name);
1051
1052 return 0;
1053 }
1054
1055
1056
1057
1058
1059 static
1060 void
1061 wavelan_ru_start(device *dev)
1062 {
1063 unsigned short ioaddr;
1064 net_local *lp;
1065 unsigned short scb_cs;
1066 fd_t fd;
1067 rbd_t rbd;
1068 unsigned short rx;
1069 unsigned short rx_next;
1070 int i;
1071
1072 ioaddr = dev->base_addr;
1073 lp = (net_local *)dev->priv;
1074
1075 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
1076 if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY)
1077 return;
1078
1079 lp->rx_head = OFFSET_RU;
1080
1081 for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next)
1082 {
1083 rx_next = (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ;
1084
1085 fd.fd_status = 0;
1086 fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0;
1087 fd.fd_link_offset = rx_next;
1088 fd.fd_rbd_offset = rx + sizeof(fd);
1089 obram_write(ioaddr, rx, (unsigned char *)&fd, sizeof(fd));
1090
1091 rbd.rbd_status = 0;
1092 rbd.rbd_next_rbd_offset = I82586NULL;
1093 rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd);
1094 rbd.rbd_bufh = 0;
1095 rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ);
1096 obram_write(ioaddr, rx + sizeof(fd), (unsigned char *)&rbd, sizeof(rbd));
1097
1098 lp->rx_last = rx;
1099 }
1100
1101 obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset), (unsigned char *)&lp->rx_head, sizeof(lp->rx_head));
1102
1103 scb_cs = SCB_CMD_RUC_GO;
1104 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1105
1106 set_chan_attn(ioaddr, lp->hacr);
1107
1108 for (i = 1000; i > 0; i--)
1109 {
1110 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1111 if (scb_cs == 0)
1112 break;
1113
1114 udelay(1000);
1115 }
1116
1117 if (i <= 0)
1118 printk("%s: wavelan_ru_start(): board not accepting command.\n", dev->name);
1119 }
1120
1121
1122
1123
1124
1125
1126 static
1127 void
1128 wavelan_cu_start(device *dev)
1129 {
1130 unsigned short ioaddr;
1131 net_local *lp;
1132 int i;
1133 unsigned short txblock;
1134 unsigned short first_nop;
1135 unsigned short scb_cs;
1136
1137 ioaddr = dev->base_addr;
1138 lp = (net_local *)dev->priv;
1139
1140 lp->tx_first_free = OFFSET_CU;
1141 lp->tx_first_in_use = I82586NULL;
1142
1143 for
1144 (
1145 i = 0, txblock = OFFSET_CU;
1146 i < NTXBLOCKS;
1147 i++, txblock += TXBLOCKZ
1148 )
1149 {
1150 ac_tx_t tx;
1151 ac_nop_t nop;
1152 tbd_t tbd;
1153 unsigned short tx_addr;
1154 unsigned short nop_addr;
1155 unsigned short tbd_addr;
1156 unsigned short buf_addr;
1157
1158 tx_addr = txblock;
1159 nop_addr = tx_addr + sizeof(tx);
1160 tbd_addr = nop_addr + sizeof(nop);
1161 buf_addr = tbd_addr + sizeof(tbd);
1162
1163 tx.tx_h.ac_status = 0;
1164 tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I;
1165 tx.tx_h.ac_link = nop_addr;
1166 tx.tx_tbd_offset = tbd_addr;
1167 obram_write(ioaddr, tx_addr, (unsigned char *)&tx, sizeof(tx));
1168
1169 nop.nop_h.ac_status = 0;
1170 nop.nop_h.ac_command = acmd_nop;
1171 nop.nop_h.ac_link = nop_addr;
1172 obram_write(ioaddr, nop_addr, (unsigned char *)&nop, sizeof(nop));
1173
1174 tbd.tbd_status = TBD_STATUS_EOF;
1175 tbd.tbd_next_bd_offset = I82586NULL;
1176 tbd.tbd_bufl = buf_addr;
1177 tbd.tbd_bufh = 0;
1178 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1179 }
1180
1181 first_nop = OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t);
1182 obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset), (unsigned char *)&first_nop, sizeof(first_nop));
1183
1184 scb_cs = SCB_CMD_CUC_GO;
1185 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1186
1187 set_chan_attn(ioaddr, lp->hacr);
1188
1189 for (i = 1000; i > 0; i--)
1190 {
1191 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1192 if (scb_cs == 0)
1193 break;
1194
1195 udelay(1000);
1196 }
1197
1198 if (i <= 0)
1199 printk("%s: wavelan_cu_start(): board not accepting command.\n", dev->name);
1200
1201 lp->tx_n_in_use = 0;
1202 dev->tbusy = 0;
1203 }
1204
1205 static
1206 int
1207 wavelan_open(device *dev)
1208 {
1209 unsigned short ioaddr;
1210 net_local *lp;
1211 unsigned long x;
1212 int r;
1213
1214 if (wavelan_debug > 0)
1215 printk("%s: ->wavelan_open(dev=0x%x)\n", dev->name, (unsigned int)dev);
1216
1217 ioaddr = dev->base_addr;
1218 lp = (net_local *)dev->priv;
1219
1220 if (dev->irq == 0)
1221 {
1222 if (wavelan_debug > 0)
1223 printk("%s: <-wavelan_open(): -ENXIO\n", dev->name);
1224 return -ENXIO;
1225 }
1226
1227 if
1228 (
1229 irq2dev_map[dev->irq] != (device *)0
1230
1231 ||
1232 (irq2dev_map[dev->irq] = dev) == (device *)0
1233 ||
1234 request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN") != 0
1235 )
1236 {
1237 irq2dev_map[dev->irq] = (device *)0;
1238 if (wavelan_debug > 0)
1239 printk("%s: <-wavelan_open(): -EAGAIN\n", dev->name);
1240 return -EAGAIN;
1241 }
1242
1243 x = wavelan_splhi();
1244 if ((r = wavelan_hardware_reset(dev)) != -1)
1245 {
1246 dev->interrupt = 0;
1247 dev->start = 1;
1248 }
1249 wavelan_splx(x);
1250
1251 if (r == -1)
1252 {
1253 free_irq(dev->irq);
1254 irq2dev_map[dev->irq] = (device *)0;
1255 if (wavelan_debug > 0)
1256 printk("%s: <-wavelan_open(): -EAGAIN(2)\n", dev->name);
1257 return -EAGAIN;
1258 }
1259
1260 #if defined(MODULE)
1261 MOD_INC_USE_COUNT;
1262 #endif
1263
1264 if (wavelan_debug > 0)
1265 printk("%s: <-wavelan_open(): 0\n", dev->name);
1266
1267 return 0;
1268 }
1269
1270 static
1271 void
1272 hardware_send_packet(device *dev, void *buf, short length)
1273 {
1274 unsigned short ioaddr;
1275 net_local *lp;
1276 unsigned short txblock;
1277 unsigned short txpred;
1278 unsigned short tx_addr;
1279 unsigned short nop_addr;
1280 unsigned short tbd_addr;
1281 unsigned short buf_addr;
1282 ac_tx_t tx;
1283 ac_nop_t nop;
1284 tbd_t tbd;
1285 unsigned long x;
1286
1287 ioaddr = dev->base_addr;
1288 lp = (net_local *)dev->priv;
1289
1290 x = wavelan_splhi();
1291
1292 txblock = lp->tx_first_free;
1293 txpred = txblock - TXBLOCKZ;
1294 if (txpred < OFFSET_CU)
1295 txpred += NTXBLOCKS * TXBLOCKZ;
1296 lp->tx_first_free += TXBLOCKZ;
1297 if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1298 lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
1299
1300
1301
1302
1303
1304
1305 lp->tx_n_in_use++;
1306
1307 tx_addr = txblock;
1308 nop_addr = tx_addr + sizeof(tx);
1309 tbd_addr = nop_addr + sizeof(nop);
1310 buf_addr = tbd_addr + sizeof(tbd);
1311
1312
1313
1314
1315 tx.tx_h.ac_status = 0;
1316 obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status), (unsigned char *)&tx.tx_h.ac_status, sizeof(tx.tx_h.ac_status));
1317
1318
1319
1320
1321 nop.nop_h.ac_status = 0;
1322 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1323 nop.nop_h.ac_link = nop_addr;
1324 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1325
1326
1327
1328
1329 tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & length);
1330 tbd.tbd_next_bd_offset = I82586NULL;
1331 tbd.tbd_bufl = buf_addr;
1332 tbd.tbd_bufh = 0;
1333 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1334
1335
1336
1337
1338 obram_write(ioaddr, buf_addr, buf, length);
1339
1340
1341
1342
1343
1344 nop_addr = txpred + sizeof(tx);
1345 nop.nop_h.ac_status = 0;
1346 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1347 nop.nop_h.ac_link = txblock;
1348 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1349
1350 if (lp->tx_first_in_use == I82586NULL)
1351 lp->tx_first_in_use = txblock;
1352
1353 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1354 dev->tbusy = 0;
1355
1356 dev->trans_start = jiffies;
1357
1358 if (lp->watchdog.next == (timer_list *)0)
1359 wavelan_watchdog((unsigned long)dev);
1360
1361 wavelan_splx(x);
1362
1363 if (wavelan_debug > 4)
1364 {
1365 unsigned char *a;
1366
1367 a = (unsigned char *)buf;
1368
1369 printk
1370 (
1371 "%s: tx: dest %02x:%02x:%02x:%02x:%02x:%02x, length %d, tbd.tbd_bufl 0x%x.\n",
1372 dev->name,
1373 a[0], a[1], a[2], a[3], a[4], a[5],
1374 length,
1375 buf_addr
1376 );
1377 }
1378 }
1379
1380 static
1381 int
1382 wavelan_send_packet(struct sk_buff *skb, device *dev)
1383 {
1384 unsigned short ioaddr;
1385
1386 ioaddr = dev->base_addr;
1387
1388 if (dev->tbusy)
1389 {
1390
1391
1392
1393
1394 int tickssofar;
1395
1396 tickssofar = jiffies - dev->trans_start;
1397
1398
1399
1400
1401
1402
1403
1404
1405 return 1;
1406
1407 wavelan_scb_show(ioaddr);
1408 wavelan_ru_show(dev);
1409 wavelan_cu_show(dev);
1410 wavelan_dev_show(dev);
1411 wavelan_local_show(dev);
1412
1413 printk("%s: transmit timed out -- resetting board.\n", dev->name);
1414
1415 (void)wavelan_hardware_reset(dev);
1416 }
1417
1418
1419
1420
1421
1422
1423 if (skb == (struct sk_buff *)0)
1424 {
1425 dev_tint(dev);
1426 return 0;
1427 }
1428
1429
1430
1431
1432 if (set_bit(0, (void *)&dev->tbusy) == 0)
1433 {
1434 short length;
1435 unsigned char *buf;
1436
1437 length = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
1438 buf = skb->data;
1439
1440 hardware_send_packet(dev, buf, length);
1441 }
1442 else
1443 printk("%s: Transmitter access conflict.\n", dev->name);
1444
1445 dev_kfree_skb(skb, FREE_WRITE);
1446
1447 return 0;
1448 }
1449
1450 #if 0
1451 static
1452 int
1453 addrcmp(unsigned char *a0, unsigned char *a1)
1454 {
1455 int i;
1456
1457 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1458 {
1459 if (a0[i] != a1[i])
1460 return a0[i] - a1[i];
1461 }
1462
1463 return 0;
1464 }
1465 #endif
1466
1467
1468
1469
1470
1471
1472 static
1473 void
1474 wavelan_receive(device *dev)
1475 {
1476 unsigned short ioaddr;
1477 net_local *lp;
1478 int nreaped;
1479
1480 ioaddr = dev->base_addr;
1481 lp = (net_local *)dev->priv;
1482 nreaped = 0;
1483
1484 for (;;)
1485 {
1486 fd_t fd;
1487 rbd_t rbd;
1488 ushort pkt_len;
1489 int sksize;
1490 struct sk_buff *skb;
1491
1492 obram_read(ioaddr, lp->rx_head, (unsigned char *)&fd, sizeof(fd));
1493
1494 if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C)
1495 break;
1496
1497 nreaped++;
1498
1499 if
1500 (
1501 (fd.fd_status & (FD_STATUS_B | FD_STATUS_OK))
1502 !=
1503 (FD_STATUS_B | FD_STATUS_OK)
1504 )
1505 {
1506
1507
1508
1509
1510
1511
1512
1513 if ((fd.fd_status & FD_STATUS_OK) != FD_STATUS_OK)
1514 printk("%s: frame not received successfully.\n", dev->name);
1515 }
1516
1517 if ((fd.fd_status & (FD_STATUS_S6 | FD_STATUS_S7 | FD_STATUS_S8 | FD_STATUS_S9 | FD_STATUS_S10 | FD_STATUS_S11)) != 0)
1518 {
1519 lp->stats.rx_errors++;
1520
1521 if ((fd.fd_status & FD_STATUS_S6) != 0)
1522 printk("%s: no EOF flag.\n", dev->name);
1523
1524 if ((fd.fd_status & FD_STATUS_S7) != 0)
1525 {
1526 lp->stats.rx_length_errors++;
1527 printk("%s: frame too short.\n", dev->name);
1528 }
1529
1530 if ((fd.fd_status & FD_STATUS_S8) != 0)
1531 {
1532 lp->stats.rx_over_errors++;
1533 printk("%s: rx DMA overrun.\n", dev->name);
1534 }
1535
1536 if ((fd.fd_status & FD_STATUS_S9) != 0)
1537 {
1538 lp->stats.rx_fifo_errors++;
1539 printk("%s: ran out of resources.\n", dev->name);
1540 }
1541
1542 if ((fd.fd_status & FD_STATUS_S10) != 0)
1543 {
1544 lp->stats.rx_frame_errors++;
1545 printk("%s: alignment error.\n", dev->name);
1546 }
1547
1548 if ((fd.fd_status & FD_STATUS_S11) != 0)
1549 {
1550 lp->stats.rx_crc_errors++;
1551 printk("%s: CRC error.\n", dev->name);
1552 }
1553 }
1554
1555 if (fd.fd_rbd_offset == I82586NULL)
1556 printk("%s: frame has no data.\n", dev->name);
1557 else
1558 {
1559 obram_read(ioaddr, fd.fd_rbd_offset, (unsigned char *)&rbd, sizeof(rbd));
1560
1561 if ((rbd.rbd_status & RBD_STATUS_EOF) != RBD_STATUS_EOF)
1562 printk("%s: missing EOF flag.\n", dev->name);
1563
1564 if ((rbd.rbd_status & RBD_STATUS_F) != RBD_STATUS_F)
1565 printk("%s: missing F flag.\n", dev->name);
1566
1567 pkt_len = rbd.rbd_status & RBD_STATUS_ACNT;
1568
1569 #if 0
1570 {
1571 unsigned char addr[WAVELAN_ADDR_SIZE];
1572 int i;
1573 static unsigned char toweraddr[WAVELAN_ADDR_SIZE] =
1574 {
1575 0x08, 0x00, 0x0e, 0x20, 0x3e, 0xd3,
1576 };
1577
1578 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1579 if
1580 (
1581
1582
1583
1584
1585 addrcmp(&addr[0], toweraddr) != 0
1586 )
1587 {
1588 printk("%s: foreign MAC source addr=", dev->name);
1589 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1590 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1591 printk("\n");
1592 }
1593 }
1594 #endif
1595
1596 if (wavelan_debug > 5)
1597 {
1598 unsigned char addr[WAVELAN_ADDR_SIZE];
1599 unsigned short ltype;
1600 int i;
1601
1602 #if 0
1603 printk("%s: fd_dest=", dev->name);
1604 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1605 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_dest[i]);
1606 printk("\n");
1607
1608 printk("%s: fd_src=", dev->name);
1609 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1610 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_src[i]);
1611 printk("\n");
1612 printk("%s: fd_length=%d\n", dev->name, fd.fd_length);
1613 #endif
1614
1615 obram_read(ioaddr, rbd.rbd_bufl, &addr[0], sizeof(addr));
1616 printk("%s: dest=", dev->name);
1617 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1618 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1619 printk("\n");
1620
1621 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1622 printk("%s: src=", dev->name);
1623 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1624 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1625 printk("\n");
1626
1627 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr) * 2, (unsigned char *)<ype, sizeof(ltype));
1628 printk("%s: ntohs(length/type)=0x%04x\n", dev->name, ntohs(ltype));
1629 }
1630
1631 sksize = pkt_len;
1632
1633 if ((skb = dev_alloc_skb(sksize)) == (struct sk_buff *)0)
1634 {
1635 printk("%s: could not alloc_skb(%d, GFP_ATOMIC).\n", dev->name, sksize);
1636 lp->stats.rx_dropped++;
1637 }
1638 else
1639 {
1640 skb->dev = dev;
1641
1642 obram_read(ioaddr, rbd.rbd_bufl, skb_put(skb,pkt_len), pkt_len);
1643
1644 if (wavelan_debug > 5)
1645 {
1646 int i;
1647 int maxi;
1648
1649 printk("%s: pkt_len=%d, data=\"", dev->name, pkt_len);
1650
1651 if ((maxi = pkt_len) > 16)
1652 maxi = 16;
1653
1654 for (i = 0; i < maxi; i++)
1655 {
1656 unsigned char c;
1657
1658 c = skb->data[i];
1659 if (c >= ' ' && c <= '~')
1660 printk(" %c", skb->data[i]);
1661 else
1662 printk("%02x", skb->data[i]);
1663 }
1664
1665 if (maxi < pkt_len)
1666 printk("..");
1667
1668 printk("\"\n\n");
1669 }
1670
1671 skb->protocol=eth_type_trans(skb,dev);
1672 netif_rx(skb);
1673
1674 lp->stats.rx_packets++;
1675 }
1676 }
1677
1678 fd.fd_status = 0;
1679 obram_write(ioaddr, fdoff(lp->rx_head, fd_status), (unsigned char *)&fd.fd_status, sizeof(fd.fd_status));
1680
1681 fd.fd_command = FD_COMMAND_EL;
1682 obram_write(ioaddr, fdoff(lp->rx_head, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1683
1684 fd.fd_command = 0;
1685 obram_write(ioaddr, fdoff(lp->rx_last, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1686
1687 lp->rx_last = lp->rx_head;
1688 lp->rx_head = fd.fd_link_offset;
1689 }
1690
1691
1692
1693
1694
1695 }
1696
1697
1698
1699
1700
1701 static
1702 int
1703 wavelan_complete(device *dev, unsigned short ioaddr, net_local *lp)
1704 {
1705 int nreaped;
1706
1707 nreaped = 0;
1708
1709 for (;;)
1710 {
1711 unsigned short tx_status;
1712
1713 if (lp->tx_first_in_use == I82586NULL)
1714 break;
1715
1716 obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status), (unsigned char *)&tx_status, sizeof(tx_status));
1717
1718 if ((tx_status & AC_SFLD_C) == 0)
1719 break;
1720
1721 nreaped++;
1722
1723 --lp->tx_n_in_use;
1724
1725
1726
1727
1728
1729
1730 if (lp->tx_n_in_use <= 0)
1731 lp->tx_first_in_use = I82586NULL;
1732 else
1733 {
1734 lp->tx_first_in_use += TXBLOCKZ;
1735 if (lp->tx_first_in_use >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1736 lp->tx_first_in_use -= NTXBLOCKS * TXBLOCKZ;
1737 }
1738
1739 if (tx_status & AC_SFLD_OK)
1740 {
1741 int ncollisions;
1742
1743 lp->stats.tx_packets++;
1744 ncollisions = tx_status & AC_SFLD_MAXCOL;
1745 lp->stats.collisions += ncollisions;
1746
1747
1748
1749
1750 }
1751 else
1752 {
1753 lp->stats.tx_errors++;
1754 if (tx_status & AC_SFLD_S10)
1755 {
1756 lp->stats.tx_carrier_errors++;
1757 if (wavelan_debug > 0)
1758 printk("%s: tx error: no CS.\n", dev->name);
1759 }
1760 if (tx_status & AC_SFLD_S9)
1761 {
1762 lp->stats.tx_carrier_errors++;
1763 printk("%s: tx error: lost CTS.\n", dev->name);
1764 }
1765 if (tx_status & AC_SFLD_S8)
1766 {
1767 lp->stats.tx_fifo_errors++;
1768 printk("%s: tx error: slow DMA.\n", dev->name);
1769 }
1770 if (tx_status & AC_SFLD_S6)
1771 {
1772 lp->stats.tx_heartbeat_errors++;
1773 if (wavelan_debug > 0)
1774 printk("%s: tx error: heart beat.\n", dev->name);
1775 }
1776 if (tx_status & AC_SFLD_S5)
1777 {
1778 lp->stats.tx_aborted_errors++;
1779 if (wavelan_debug > 0)
1780 printk("%s: tx error: too many collisions.\n", dev->name);
1781 }
1782 }
1783
1784 if (wavelan_debug > 5)
1785 printk("%s: tx completed, tx_status 0x%04x.\n", dev->name, tx_status);
1786 }
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1797 {
1798 dev->tbusy = 0;
1799 mark_bh(NET_BH);
1800 }
1801
1802 return nreaped;
1803 }
1804
1805 static
1806 void
1807 wavelan_watchdog(unsigned long a)
1808 {
1809 device *dev;
1810 net_local *lp;
1811 unsigned short ioaddr;
1812 unsigned long x;
1813 unsigned int nreaped;
1814
1815 x = wavelan_splhi();
1816
1817 dev = (device *)a;
1818 ioaddr = dev->base_addr;
1819 lp = (net_local *)dev->priv;
1820
1821 if (lp->tx_n_in_use <= 0)
1822 {
1823 wavelan_splx(x);
1824 return;
1825 }
1826
1827 lp->watchdog.expires = WATCHDOG_JIFFIES;
1828 add_timer(&lp->watchdog);
1829
1830 if (jiffies - dev->trans_start < WATCHDOG_JIFFIES)
1831 {
1832 wavelan_splx(x);
1833 return;
1834 }
1835
1836 nreaped = wavelan_complete(dev, ioaddr, lp);
1837
1838 printk("%s: warning: wavelan_watchdog(): %d reaped, %d remain.\n", dev->name, nreaped, lp->tx_n_in_use);
1839
1840
1841
1842
1843
1844
1845
1846
1847 wavelan_splx(x);
1848 }
1849
1850 static
1851 void
1852 wavelan_interrupt(int irq, struct pt_regs *regs)
1853 {
1854 device *dev;
1855 unsigned short ioaddr;
1856 net_local *lp;
1857 unsigned short hasr;
1858 unsigned short status;
1859 unsigned short ack_cmd;
1860
1861 if ((dev = (device *)(irq2dev_map[irq])) == (device *)0)
1862 {
1863 printk("wavelan_interrupt(): irq %d for unknown device.\n", irq);
1864 return;
1865 }
1866
1867 ioaddr = dev->base_addr;
1868 lp = (net_local *)dev->priv;
1869
1870 dev->interrupt = 1;
1871
1872 if ((hasr = hasr_read(ioaddr)) & HASR_MMC_INTR)
1873 {
1874 unsigned char dce_status;
1875
1876
1877
1878
1879
1880 mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status, sizeof(dce_status));
1881 if (wavelan_debug > 0)
1882 printk("%s: warning: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n", dev->name, dce_status);
1883 }
1884
1885 if ((hasr & HASR_82586_INTR) == 0)
1886 {
1887 dev->interrupt = 0;
1888 if (wavelan_debug > 0)
1889 printk("%s: warning: wavelan_interrupt() but (hasr & HASR_82586_INTR) == 0.\n", dev->name);
1890 return;
1891 }
1892
1893 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&status, sizeof(status));
1894
1895
1896
1897
1898 ack_cmd = status & SCB_ST_INT;
1899
1900 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&ack_cmd, sizeof(ack_cmd));
1901
1902 set_chan_attn(ioaddr, lp->hacr);
1903
1904 if (wavelan_debug > 5)
1905 printk("%s: interrupt, status 0x%04x.\n", dev->name, status);
1906
1907 if ((status & SCB_ST_CX) == SCB_ST_CX)
1908 {
1909
1910
1911
1912 if (wavelan_debug > 5)
1913 printk("%s: command completed.\n", dev->name);
1914 (void)wavelan_complete(dev, ioaddr, lp);
1915 }
1916
1917 if ((status & SCB_ST_FR) == SCB_ST_FR)
1918 {
1919
1920
1921
1922 if (wavelan_debug > 5)
1923 printk("%s: received packet.\n", dev->name);
1924 wavelan_receive(dev);
1925 }
1926
1927 if
1928 (
1929 (status & SCB_ST_CNA) == SCB_ST_CNA
1930 ||
1931 (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) && dev->start)
1932 )
1933 {
1934 printk("%s: warning: CU inactive -- restarting.\n", dev->name);
1935
1936 (void)wavelan_hardware_reset(dev);
1937 }
1938
1939 if
1940 (
1941 (status & SCB_ST_RNR) == SCB_ST_RNR
1942 ||
1943 (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) && dev->start)
1944 )
1945 {
1946 printk("%s: warning: RU not ready -- restarting.\n", dev->name);
1947
1948 (void)wavelan_hardware_reset(dev);
1949 }
1950
1951 dev->interrupt = 0;
1952 }
1953
1954 static
1955 int
1956 wavelan_close(device *dev)
1957 {
1958 unsigned short ioaddr;
1959 net_local *lp;
1960 unsigned short scb_cmd;
1961
1962 if (wavelan_debug > 0)
1963 printk("%s: ->wavelan_close(dev=0x%x)\n", dev->name, (unsigned int)dev);
1964
1965 ioaddr = dev->base_addr;
1966 lp = (net_local *)dev->priv;
1967
1968 dev->tbusy = 1;
1969 dev->start = 0;
1970
1971
1972
1973
1974 scb_cmd = (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC & SCB_CMD_RUC_SUS);
1975 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
1976 set_chan_attn(ioaddr, lp->hacr);
1977
1978 wavelan_ints_off(dev);
1979
1980 free_irq(dev->irq);
1981 irq2dev_map[dev->irq] = (device *)0;
1982
1983
1984
1985
1986 release_region(ioaddr, sizeof(ha_t));
1987
1988 #if defined(MODULE)
1989 MOD_DEC_USE_COUNT;
1990 #endif
1991
1992 if (wavelan_debug > 0)
1993 printk("%s: <-wavelan_close(): 0\n", dev->name);
1994
1995 return 0;
1996 }
1997
1998
1999
2000
2001
2002 static
2003 en_stats *
2004 wavelan_get_stats(device *dev)
2005 {
2006 net_local *lp;
2007
2008 lp = (net_local *)dev->priv;
2009
2010 return &lp->stats;
2011 }
2012
2013 static
2014 void
2015 wavelan_set_multicast_list(device *dev, int num_addrs, void *addrs)
2016 {
2017 net_local *lp;
2018 unsigned long x;
2019
2020 if (wavelan_debug > 0)
2021 printk("%s: ->wavelan_set_multicast_list(dev=0x%x, num_addrs=%d, addrs=0x%x)\n", dev->name, (unsigned int)dev, num_addrs, (unsigned int)addrs);
2022
2023 lp = (net_local *)dev->priv;
2024
2025 switch (num_addrs)
2026 {
2027 case -1:
2028
2029
2030
2031 lp->promiscuous = 1;
2032 x = wavelan_splhi();
2033 (void)wavelan_hardware_reset(dev);
2034 wavelan_splx(x);
2035 break;
2036
2037 case 0:
2038
2039
2040
2041
2042 lp->promiscuous = 0;
2043 x = wavelan_splhi();
2044 (void)wavelan_hardware_reset(dev);
2045 wavelan_splx(x);
2046 break;
2047
2048 default:
2049
2050
2051
2052
2053 break;
2054 }
2055
2056 if (wavelan_debug > 0)
2057 printk("%s: <-wavelan_set_multicast_list()\n", dev->name);
2058 }
2059
2060
2061
2062
2063
2064 static
2065 int
2066 sprintf_stats(char *buffer, device *dev)
2067 {
2068 net_local *lp;
2069 unsigned char v;
2070 mmr_t m;
2071
2072 lp = (net_local *)dev->priv;
2073
2074 if (lp == (net_local *)0)
2075 return sprintf(buffer, "%6s: No statistics available.\n", dev->name);
2076
2077 v = (unsigned char)1;
2078 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
2079
2080 mmc_read(dev->base_addr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, sizeof(m.mmr_dce_status));
2081 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_h), &m.mmr_correct_nwid_h, sizeof(m.mmr_correct_nwid_h));
2082 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_l), &m.mmr_correct_nwid_l, sizeof(m.mmr_correct_nwid_l));
2083 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_h), &m.mmr_wrong_nwid_h, sizeof(m.mmr_wrong_nwid_h));
2084 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, sizeof(m.mmr_wrong_nwid_l));
2085 mmc_read(dev->base_addr, mmroff(0, mmr_signal_lvl), &m.mmr_signal_lvl, sizeof(m.mmr_signal_lvl));
2086 mmc_read(dev->base_addr, mmroff(0, mmr_silence_lvl), &m.mmr_silence_lvl, sizeof(m.mmr_silence_lvl));
2087 mmc_read(dev->base_addr, mmroff(0, mmr_sgnl_qual), &m.mmr_sgnl_qual, sizeof(m.mmr_sgnl_qual));
2088
2089 v = (unsigned char)0;
2090 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
2091
2092 lp->correct_nwid += (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l;
2093 lp->wrong_nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
2094
2095 return sprintf
2096 (
2097 buffer,
2098 "%6s: %02x %08x %08x %02x %02x %02x %02x %u\n",
2099 dev->name,
2100 m.mmr_dce_status,
2101 lp->correct_nwid,
2102 lp->wrong_nwid,
2103 m.mmr_signal_lvl,
2104 m.mmr_silence_lvl,
2105 m.mmr_sgnl_qual,
2106 lp->tx_n_in_use,
2107 lp->nresets
2108 );
2109 }
2110
2111 int
2112 wavelan_get_info(char *buffer, char **start, off_t offset, int length)
2113 {
2114 int len;
2115 off_t begin;
2116 off_t pos;
2117 int size;
2118 unsigned long x;
2119
2120 len = 0;
2121 begin = 0;
2122 pos = 0;
2123
2124 size = sprintf(buffer, "%s", "Iface | dce +nwid -nwid lvl slnc qual ntxq nrst\n");
2125
2126 pos += size;
2127 len += size;
2128
2129 x = wavelan_splhi();
2130
2131 if (first_wavelan != (net_local *)0)
2132 {
2133 net_local *lp;
2134
2135 lp = first_wavelan;
2136 do
2137 {
2138 size = sprintf_stats(buffer + len, lp->dev);
2139
2140 len += size;
2141 pos = begin + len;
2142
2143 if (pos < offset)
2144 {
2145 len = 0;
2146 begin = pos;
2147 }
2148
2149 if (pos > offset + length)
2150 break;
2151 }
2152 while ((lp = lp->next) != first_wavelan);
2153 }
2154
2155 wavelan_splx(x);
2156
2157 *start = buffer + (offset - begin);
2158 len -= (offset - begin);
2159 if (len > length)
2160 len = length;
2161
2162 return len;
2163 }
2164
2165 #if defined(MODULE)
2166 char kernel_version[] = UTS_RELEASE;
2167 static struct device dev_wavelan =
2168 {
2169 " " ,
2170 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, wavelan_probe
2171 };
2172
2173 int
2174 init_module(void)
2175 {
2176 if (register_netdev(&dev_wavelan) != 0)
2177 return -EIO;
2178 return 0;
2179 }
2180
2181 void
2182 cleanup_module(void)
2183 {
2184 if (MOD_IN_USE)
2185 printk("wavelan: device busy, remove delayed\n");
2186 else
2187 {
2188 unregister_netdev(&dev_wavelan);
2189 kfree_s(dev_wavelan.priv, sizeof(struct net_local));
2190 dev_wavelan.priv = NULL;
2191 }
2192 }
2193 #endif
2194
2195 static
2196 void
2197 wavelan_cu_show_one(device *dev, net_local *lp, int i, unsigned short p)
2198 {
2199 unsigned short ioaddr;
2200 ac_tx_t actx;
2201
2202 ioaddr = dev->base_addr;
2203
2204 printk("%d: 0x%x:", i, p);
2205
2206 obram_read(ioaddr, p, (unsigned char *)&actx, sizeof(actx));
2207 printk(" status=0x%x,", actx.tx_h.ac_status);
2208 printk(" command=0x%x,", actx.tx_h.ac_command);
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219 printk("|");
2220 }
2221
2222 #if 0
2223 static
2224 void
2225 wavelan_psa_show(psa_t *p)
2226 {
2227 printk("psa:");
2228
2229 printk("psa_io_base_addr_1: 0x%02x,", p->psa_io_base_addr_1);
2230 printk("psa_io_base_addr_2: 0x%02x,", p->psa_io_base_addr_2);
2231 printk("psa_io_base_addr_3: 0x%02x,", p->psa_io_base_addr_3);
2232 printk("psa_io_base_addr_4: 0x%02x,", p->psa_io_base_addr_4);
2233 printk("psa_rem_boot_addr_1: 0x%02x,", p->psa_rem_boot_addr_1);
2234 printk("psa_rem_boot_addr_2: 0x%02x,", p->psa_rem_boot_addr_2);
2235 printk("psa_rem_boot_addr_3: 0x%02x,", p->psa_rem_boot_addr_3);
2236 printk("psa_holi_params: 0x%02x,", p->psa_holi_params);
2237 printk("psa_int_req_no: %d,", p->psa_int_req_no);
2238 printk
2239 (
2240 "psa_univ_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2241 p->psa_univ_mac_addr[0],
2242 p->psa_univ_mac_addr[1],
2243 p->psa_univ_mac_addr[2],
2244 p->psa_univ_mac_addr[3],
2245 p->psa_univ_mac_addr[4],
2246 p->psa_univ_mac_addr[5]
2247 );
2248 printk
2249 (
2250 "psa_local_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2251 p->psa_local_mac_addr[0],
2252 p->psa_local_mac_addr[1],
2253 p->psa_local_mac_addr[2],
2254 p->psa_local_mac_addr[3],
2255 p->psa_local_mac_addr[4],
2256 p->psa_local_mac_addr[5]
2257 );
2258 printk("psa_univ_local_sel: %d,", p->psa_univ_local_sel);
2259 printk("psa_comp_number: %d,", p->psa_comp_number);
2260 printk("psa_thr_pre_set: 0x%02x,", p->psa_thr_pre_set);
2261 printk("psa_feature_select/decay_prm: 0x%02x,", p->psa_feature_select);
2262 printk("psa_subband/decay_update_prm: %d,", p->psa_subband);
2263 printk("psa_quality_thr: 0x%02x,", p->psa_quality_thr);
2264 printk("psa_mod_delay: 0x%02x,", p->psa_mod_delay);
2265 printk("psa_nwid: 0x%02x%02x,", p->psa_nwid[0], p->psa_nwid[1]);
2266 printk("psa_undefined: %d,", p->psa_undefined);
2267 printk("psa_encryption_select: %d,", p->psa_encryption_select);
2268 printk
2269 (
2270 "psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x,",
2271 p->psa_encryption_key[0],
2272 p->psa_encryption_key[1],
2273 p->psa_encryption_key[2],
2274 p->psa_encryption_key[3],
2275 p->psa_encryption_key[4],
2276 p->psa_encryption_key[5],
2277 p->psa_encryption_key[6],
2278 p->psa_encryption_key[7]
2279 );
2280 printk("psa_databus_width: %d,", p->psa_databus_width);
2281 printk("psa_call_code/auto_squelch: 0x%02x,", p->psa_call_code);
2282 printk("psa_no_of_retries: %d,", p->psa_no_of_retries);
2283 printk("psa_acr: %d,", p->psa_acr);
2284 printk("psa_dump_count: %d,", p->psa_dump_count);
2285 printk("psa_nwid_prefix: 0x%02x,", p->psa_nwid_prefix);
2286 printk("psa_conf_status: %d,", p->psa_conf_status);
2287 printk("psa_crc: 0x%02x%02x,", p->psa_crc[0], p->psa_crc[1]);
2288 printk("psa_crc_status: 0x%02x,", p->psa_crc_status);
2289
2290 printk("\n");
2291 }
2292
2293 static
2294 void
2295 wavelan_mmc_show(unsigned short ioaddr)
2296 {
2297 mmr_t m;
2298
2299 mmc_read(ioaddr, 0, (unsigned char *)&m, sizeof(m));
2300
2301 printk("mmr:");
2302 printk(" des_status: 0x%x", m.mmr_des_status);
2303 printk(" des_avail: 0x%x", m.mmr_des_avail);
2304 printk(" des_io_invert: 0x%x", m.mmr_des_io_invert);
2305 printk
2306 (
2307 " dce_status: 0x%x[%s%s%s%s]",
2308 m.mmr_dce_status & 0x0F,
2309 (m.mmr_dce_status & MMR_DCE_STATUS_ENERG_DET) ? "energy detected," : "",
2310 (m.mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ? "loop test indicated," : "",
2311 (m.mmr_dce_status & MMR_DCE_STATUS_XMTITR_IND) ? "transmitter on," : "",
2312 (m.mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ? "jabber timer expired," : ""
2313 );
2314 printk(" correct_nwid: %d", m.mmr_correct_nwid_h << 8 | m.mmr_correct_nwid_l);
2315 printk(" wrong_nwid: %d", (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
2316 printk(" thr_pre_set: 0x%x", m.mmr_thr_pre_set);
2317 printk(" signal_lvl: %d", m.mmr_signal_lvl);
2318 printk(" silence_lvl: %d", m.mmr_silence_lvl);
2319 printk(" sgnl_qual: 0x%x", m.mmr_sgnl_qual);
2320 printk(" netw_id_l: %x", m.mmr_netw_id_l);
2321
2322 printk("\n");
2323 }
2324 #endif
2325
2326 static
2327 void
2328 wavelan_scb_show(unsigned short ioaddr)
2329 {
2330 scb_t scb;
2331
2332 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
2333
2334 printk("scb:");
2335
2336 printk(" status:");
2337 printk
2338 (
2339 " stat 0x%x[%s%s%s%s]",
2340 (scb.scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA | SCB_ST_RNR)) >> 12,
2341 (scb.scb_status & SCB_ST_CX) ? "cmd completion interrupt," : "",
2342 (scb.scb_status & SCB_ST_FR) ? "frame received," : "",
2343 (scb.scb_status & SCB_ST_CNA) ? "cmd unit not active," : "",
2344 (scb.scb_status & SCB_ST_RNR) ? "rcv unit not ready," : ""
2345 );
2346 printk
2347 (
2348 " cus 0x%x[%s%s%s]",
2349 (scb.scb_status & SCB_ST_CUS) >> 8,
2350 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_IDLE) ? "idle" : "",
2351 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_SUSP) ? "suspended" : "",
2352 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_ACTV) ? "active" : ""
2353 );
2354 printk
2355 (
2356 " rus 0x%x[%s%s%s%s]",
2357 (scb.scb_status & SCB_ST_RUS) >> 4,
2358 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_IDLE) ? "idle" : "",
2359 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_SUSP) ? "suspended" : "",
2360 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_NRES) ? "no resources" : "",
2361 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_RDY) ? "ready" : ""
2362 );
2363
2364 printk(" command:");
2365 printk
2366 (
2367 " ack 0x%x[%s%s%s%s]",
2368 (scb.scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR | SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12,
2369 (scb.scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "",
2370 (scb.scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "",
2371 (scb.scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "",
2372 (scb.scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : ""
2373 );
2374 printk
2375 (
2376 " cuc 0x%x[%s%s%s%s%s]",
2377 (scb.scb_command & SCB_CMD_CUC) >> 8,
2378 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_NOP) ? "nop" : "",
2379 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_GO) ? "start cbl_offset" : "",
2380 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_RES) ? "resume execution" : "",
2381 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_SUS) ? "suspend execution" : "",
2382 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_ABT) ? "abort execution" : ""
2383 );
2384 printk
2385 (
2386 " ruc 0x%x[%s%s%s%s%s]",
2387 (scb.scb_command & SCB_CMD_RUC) >> 4,
2388 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_NOP) ? "nop" : "",
2389 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_GO) ? "start rfa_offset" : "",
2390 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_RES) ? "resume reception" : "",
2391 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_SUS) ? "suspend reception" : "",
2392 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_ABT) ? "abort reception" : ""
2393 );
2394
2395 printk(" cbl_offset 0x%x", scb.scb_cbl_offset);
2396 printk(" rfa_offset 0x%x", scb.scb_rfa_offset);
2397
2398 printk(" crcerrs %d", scb.scb_crcerrs);
2399 printk(" alnerrs %d", scb.scb_alnerrs);
2400 printk(" rscerrs %d", scb.scb_rscerrs);
2401 printk(" ovrnerrs %d", scb.scb_ovrnerrs);
2402
2403 printk("\n");
2404 }
2405
2406 static
2407 void
2408 wavelan_ru_show(device *dev)
2409 {
2410 net_local *lp;
2411
2412 lp = (net_local *)dev->priv;
2413
2414 printk("ru:");
2415
2416
2417
2418 printk("\n");
2419 }
2420
2421 static
2422 void
2423 wavelan_cu_show(device *dev)
2424 {
2425 net_local *lp;
2426 unsigned int i;
2427 unsigned short p;
2428
2429 lp = (net_local *)dev->priv;
2430
2431 printk("cu:");
2432 printk("\n");
2433
2434 for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++)
2435 {
2436 wavelan_cu_show_one(dev, lp, i, p);
2437
2438 p += TXBLOCKZ;
2439 if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
2440 p -= NTXBLOCKS * TXBLOCKZ;
2441 }
2442 }
2443
2444 static
2445 void
2446 wavelan_dev_show(device *dev)
2447 {
2448 printk("dev:");
2449 printk(" start=%d,", dev->start);
2450 printk(" tbusy=%d,", dev->tbusy);
2451 printk(" interrupt=%d,", dev->interrupt);
2452 printk(" trans_start=%ld,", dev->trans_start);
2453 printk(" flags=0x%x,", dev->flags);
2454 printk("\n");
2455 }
2456
2457 static
2458 void
2459 wavelan_local_show(device *dev)
2460 {
2461 net_local *lp;
2462
2463 lp = (net_local *)dev->priv;
2464
2465 printk("local:");
2466 printk(" tx_n_in_use=%d,", lp->tx_n_in_use);
2467 printk(" hacr=0x%x,", lp->hacr);
2468 printk(" rx_head=0x%x,", lp->rx_head);
2469 printk(" rx_last=0x%x,", lp->rx_last);
2470 printk(" tx_first_free=0x%x,", lp->tx_first_free);
2471 printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use);
2472 printk("\n");
2473 }
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