taglinefilesource code
dmanr148include/asm-alpha/dma.hstatic __inline__ void enable_dma(unsigned int dmanr)
dmanr150include/asm-alpha/dma.hif (dmanr<=3)
dmanr151include/asm-alpha/dma.hdma_outb(dmanr,  DMA1_MASK_REG);
dmanr153include/asm-alpha/dma.hdma_outb(dmanr & 3,  DMA2_MASK_REG);
dmanr156include/asm-alpha/dma.hstatic __inline__ void disable_dma(unsigned int dmanr)
dmanr158include/asm-alpha/dma.hif (dmanr<=3)
dmanr159include/asm-alpha/dma.hdma_outb(dmanr | 4,  DMA1_MASK_REG);
dmanr161include/asm-alpha/dma.hdma_outb((dmanr & 3) | 4,  DMA2_MASK_REG);
dmanr171include/asm-alpha/dma.hstatic __inline__ void clear_dma_ff(unsigned int dmanr)
dmanr173include/asm-alpha/dma.hif (dmanr<=3)
dmanr180include/asm-alpha/dma.hstatic __inline__ void set_dma_mode(unsigned int dmanr, char mode)
dmanr182include/asm-alpha/dma.hif (dmanr<=3)
dmanr183include/asm-alpha/dma.hdma_outb(mode | dmanr,  DMA1_MODE_REG);
dmanr185include/asm-alpha/dma.hdma_outb(mode | (dmanr&3),  DMA2_MODE_REG);
dmanr189include/asm-alpha/dma.hstatic __inline__ void set_dma_ext_mode(unsigned int dmanr, char ext_mode)
dmanr191include/asm-alpha/dma.hif (dmanr<=3)
dmanr192include/asm-alpha/dma.hdma_outb(ext_mode | dmanr,  DMA1_EXT_MODE_REG);
dmanr194include/asm-alpha/dma.hdma_outb(ext_mode | (dmanr&3),  DMA2_EXT_MODE_REG);
dmanr201include/asm-alpha/dma.hstatic __inline__ void set_dma_page(unsigned int dmanr, unsigned int pagenr)
dmanr203include/asm-alpha/dma.hswitch(dmanr) {
dmanr239include/asm-alpha/dma.hstatic __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
dmanr241include/asm-alpha/dma.hif (dmanr <= 3)  {
dmanr242include/asm-alpha/dma.hdma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr243include/asm-alpha/dma.hdma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr245include/asm-alpha/dma.hdma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr246include/asm-alpha/dma.hdma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr248include/asm-alpha/dma.hset_dma_page(dmanr, a>>16);  /* set hipage last to enable 32-bit mode */
dmanr260include/asm-alpha/dma.hstatic __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
dmanr263include/asm-alpha/dma.hif (dmanr <= 3)  {
dmanr264include/asm-alpha/dma.hdma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr265include/asm-alpha/dma.hdma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr267include/asm-alpha/dma.hdma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr268include/asm-alpha/dma.hdma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr281include/asm-alpha/dma.hstatic __inline__ int get_dma_residue(unsigned int dmanr)
dmanr283include/asm-alpha/dma.hunsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
dmanr284include/asm-alpha/dma.h: ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
dmanr292include/asm-alpha/dma.hreturn (dmanr<=3)? count : (count<<1);
dmanr297include/asm-alpha/dma.hextern int request_dma(unsigned int dmanr, char * device_id);  /* reserve a DMA channel */
dmanr298include/asm-alpha/dma.hextern void free_dma(unsigned int dmanr);  /* release it again */
dmanr133include/asm-i386/dma.hstatic __inline__ void enable_dma(unsigned int dmanr)
dmanr135include/asm-i386/dma.hif (dmanr<=3)
dmanr136include/asm-i386/dma.hdma_outb(dmanr,  DMA1_MASK_REG);
dmanr138include/asm-i386/dma.hdma_outb(dmanr & 3,  DMA2_MASK_REG);
dmanr141include/asm-i386/dma.hstatic __inline__ void disable_dma(unsigned int dmanr)
dmanr143include/asm-i386/dma.hif (dmanr<=3)
dmanr144include/asm-i386/dma.hdma_outb(dmanr | 4,  DMA1_MASK_REG);
dmanr146include/asm-i386/dma.hdma_outb((dmanr & 3) | 4,  DMA2_MASK_REG);
dmanr156include/asm-i386/dma.hstatic __inline__ void clear_dma_ff(unsigned int dmanr)
dmanr158include/asm-i386/dma.hif (dmanr<=3)
dmanr165include/asm-i386/dma.hstatic __inline__ void set_dma_mode(unsigned int dmanr, char mode)
dmanr167include/asm-i386/dma.hif (dmanr<=3)
dmanr168include/asm-i386/dma.hdma_outb(mode | dmanr,  DMA1_MODE_REG);
dmanr170include/asm-i386/dma.hdma_outb(mode | (dmanr&3),  DMA2_MODE_REG);
dmanr178include/asm-i386/dma.hstatic __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
dmanr180include/asm-i386/dma.hswitch(dmanr) {
dmanr209include/asm-i386/dma.hstatic __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
dmanr211include/asm-i386/dma.hset_dma_page(dmanr, a>>16);
dmanr212include/asm-i386/dma.hif (dmanr <= 3)  {
dmanr213include/asm-i386/dma.hdma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr214include/asm-i386/dma.hdma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr216include/asm-i386/dma.hdma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr217include/asm-i386/dma.hdma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr230include/asm-i386/dma.hstatic __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
dmanr233include/asm-i386/dma.hif (dmanr <= 3)  {
dmanr234include/asm-i386/dma.hdma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr235include/asm-i386/dma.hdma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr237include/asm-i386/dma.hdma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr238include/asm-i386/dma.hdma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr251include/asm-i386/dma.hstatic __inline__ int get_dma_residue(unsigned int dmanr)
dmanr253include/asm-i386/dma.hunsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
dmanr254include/asm-i386/dma.h: ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
dmanr262include/asm-i386/dma.hreturn (dmanr<=3)? count : (count<<1);
dmanr267include/asm-i386/dma.hextern int request_dma(unsigned int dmanr, char * device_id);  /* reserve a DMA channel */
dmanr268include/asm-i386/dma.hextern void free_dma(unsigned int dmanr);  /* release it again */
dmanr136include/asm-mips/dma.hstatic __inline__ void enable_dma(unsigned int dmanr)
dmanr138include/asm-mips/dma.hif (dmanr<=3)
dmanr139include/asm-mips/dma.hdma_outb(dmanr,  DMA1_MASK_REG);
dmanr141include/asm-mips/dma.hdma_outb(dmanr & 3,  DMA2_MASK_REG);
dmanr144include/asm-mips/dma.hstatic __inline__ void disable_dma(unsigned int dmanr)
dmanr146include/asm-mips/dma.hif (dmanr<=3)
dmanr147include/asm-mips/dma.hdma_outb(dmanr | 4,  DMA1_MASK_REG);
dmanr149include/asm-mips/dma.hdma_outb((dmanr & 3) | 4,  DMA2_MASK_REG);
dmanr159include/asm-mips/dma.hstatic __inline__ void clear_dma_ff(unsigned int dmanr)
dmanr161include/asm-mips/dma.hif (dmanr<=3)
dmanr168include/asm-mips/dma.hstatic __inline__ void set_dma_mode(unsigned int dmanr, char mode)
dmanr170include/asm-mips/dma.hif (dmanr<=3)
dmanr171include/asm-mips/dma.hdma_outb(mode | dmanr,  DMA1_MODE_REG);
dmanr173include/asm-mips/dma.hdma_outb(mode | (dmanr&3),  DMA2_MODE_REG);
dmanr181include/asm-mips/dma.hstatic __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
dmanr183include/asm-mips/dma.hswitch(dmanr) {
dmanr212include/asm-mips/dma.hstatic __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
dmanr214include/asm-mips/dma.hset_dma_page(dmanr, a>>16);
dmanr215include/asm-mips/dma.hif (dmanr <= 3)  {
dmanr216include/asm-mips/dma.hdma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr217include/asm-mips/dma.hdma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr219include/asm-mips/dma.hdma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr220include/asm-mips/dma.hdma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr233include/asm-mips/dma.hstatic __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
dmanr236include/asm-mips/dma.hif (dmanr <= 3)  {
dmanr237include/asm-mips/dma.hdma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr238include/asm-mips/dma.hdma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr240include/asm-mips/dma.hdma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr241include/asm-mips/dma.hdma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr254include/asm-mips/dma.hstatic __inline__ int get_dma_residue(unsigned int dmanr)
dmanr256include/asm-mips/dma.hunsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
dmanr257include/asm-mips/dma.h: ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
dmanr265include/asm-mips/dma.hreturn (dmanr<=3)? count : (count<<1);
dmanr270include/asm-mips/dma.hextern int request_dma(unsigned int dmanr, char * device_id);  /* reserve a DMA channel */
dmanr271include/asm-mips/dma.hextern void free_dma(unsigned int dmanr);  /* release it again */
dmanr386include/linux/tpqic02.h# define QIC02_TAPE_DMA    (qic02_tape_dynconf.dmanr)
dmanr638include/linux/tpqic02.hunsigned short  dmanr;  /* DMA channel to use */
dmanr72kernel/dma.cint request_dma(unsigned int dmanr, char * device_id)
dmanr74kernel/dma.cif (dmanr >= MAX_DMA_CHANNELS)
dmanr77kernel/dma.cif (xchg(&dma_chan_busy[dmanr].lock, 1) != 0)
dmanr80kernel/dma.cdma_chan_busy[dmanr].device_id = device_id;
dmanr87kernel/dma.cvoid free_dma(unsigned int dmanr)
dmanr89kernel/dma.cif (dmanr >= MAX_DMA_CHANNELS) {
dmanr90kernel/dma.cprintk("Trying to free DMA%d\n", dmanr);
dmanr94kernel/dma.cif (xchg(&dma_chan_busy[dmanr].lock, 0) == 0) {
dmanr95kernel/dma.cprintk("Trying to free free DMA%d\n", dmanr);
dmanr95kernel/ksyms.cextern int request_dma(unsigned int dmanr, char * deviceID);
dmanr96kernel/ksyms.cextern void free_dma(unsigned int dmanr);