| tag | line | file | source code | 
| outb_p | 355 | arch/i386/kernel/irq.c | outb_p(0x34,0x43);    /* binary, mode 2, LSB/MSB, ch 0 */ | 
| outb_p | 356 | arch/i386/kernel/irq.c | outb_p(LATCH & 0xff , 0x40);  /* LSB */ | 
| outb_p | 288 | arch/mips/kernel/irq.c | outb_p(0x34,0x43);    /* binary, mode 2, LSB/MSB, ch 0 */ | 
| outb_p | 289 | arch/mips/kernel/irq.c | outb_p(LATCH & 0xff , 0x40);  /* LSB */ | 
| outb_p | 724 | drivers/block/floppy.c | outb_p(newdor, FD_DOR); | 
| outb_p | 743 | drivers/block/floppy.c | outb_p(FDCS->dor & ~(0x10<<UNIT(current_drive)),FD_DOR); | 
| outb_p | 744 | drivers/block/floppy.c | outb_p(FDCS->dor, FD_DOR); | 
| outb_p | 1045 | drivers/block/floppy.c | outb_p(byte,FD_DATA); | 
| outb_p | 1247 | drivers/block/floppy.c | outb_p(raw_cmd.rate, FD_DCR); | 
| outb_p | 1675 | drivers/block/floppy.c | outb_p(0x80 | ( FDCS->dtr &3), FD_STATUS); | 
| outb_p | 1677 | drivers/block/floppy.c | outb_p(FDCS->dor & ~0x04, FD_DOR); | 
| outb_p | 1718 | drivers/block/floppy.c | outb_p(fdc_state[i].address+2, fdc_state[i].dor); | 
| outb_p | 3688 | drivers/block/floppy.c | outb_p(FDCS->dor, FD_DOR); | 
| outb_p | 3706 | drivers/block/floppy.c | outb_p(FDCS->dor, FD_DOR); | 
| outb_p | 106 | drivers/block/hd.c | outb_p(0, 0x43); | 
| outb_p | 215 | drivers/block/hd.c | outb_p(0xA0 | (drive<<4) | head, HD_CURRENT); | 
| outb_p | 239 | drivers/block/hd.c | outb_p(hd_info[drive].ctl,HD_CMD); | 
| outb_p | 241 | drivers/block/hd.c | outb_p(hd_info[drive].wpcom>>2,++port); | 
| outb_p | 242 | drivers/block/hd.c | outb_p(nsect,++port); | 
| outb_p | 243 | drivers/block/hd.c | outb_p(sect,++port); | 
| outb_p | 244 | drivers/block/hd.c | outb_p(cyl,++port); | 
| outb_p | 245 | drivers/block/hd.c | outb_p(cyl>>8,++port); | 
| outb_p | 246 | drivers/block/hd.c | outb_p(0xA0|(drive<<4)|head,++port); | 
| outb_p | 247 | drivers/block/hd.c | outb_p(cmd,++port); | 
| outb_p | 377 | drivers/block/hd.c | outb_p(4,HD_CMD); | 
| outb_p | 379 | drivers/block/hd.c | outb_p(hd_info[0].ctl & 0x0f,HD_CMD); | 
| outb_p | 237 | drivers/block/ide.c | #define OUT_BYTE(b,p)    outb_p((b),IDE_PORT(p,DEV_HWIF)) | 
| outb_p | 412 | drivers/block/ide.c | outb_p(0, 0x43); | 
| outb_p | 1253 | drivers/block/ide.c | outb_p(2,IDE_PORT(HD_CMD,hwif));  /* disable device irq */ | 
| outb_p | 1258 | drivers/block/ide.c | outb_p(2,IDE_PORT(HD_CMD,hwif^1));  /* disable device irq */ | 
| outb_p | 2233 | drivers/block/ide.c | outb_p(0x12,0x70);    /* specify CMOS address 0x12 */ | 
| outb_p | 2393 | drivers/block/ide.c | outb_p(b,0xb0); | 
| outb_p | 2395 | drivers/block/ide.c | outb_p(c,0xb4); | 
| outb_p | 2398 | drivers/block/ide.c | outb_p(7,0xb0); | 
| outb_p | 2415 | drivers/block/ide.c | outb_p(4,0xb0); | 
| outb_p | 2417 | drivers/block/ide.c | outb_p(0x20,0xb4); | 
| outb_p | 598 | drivers/block/ll_rw_blk.c | outb_p(0xc, 0x3f2); | 
| outb_p | 564 | drivers/char/console.c | outb_p(12, video_port_reg); | 
| outb_p | 565 | drivers/char/console.c | outb_p(offset >> 8, video_port_val); | 
| outb_p | 566 | drivers/char/console.c | outb_p(13, video_port_reg); | 
| outb_p | 567 | drivers/char/console.c | outb_p(offset, video_port_val); | 
| outb_p | 641 | drivers/char/console.c | outb_p(14, video_port_reg); | 
| outb_p | 642 | drivers/char/console.c | outb_p(0xff&((video_mem_term-video_mem_base)>>9), video_port_val); | 
| outb_p | 643 | drivers/char/console.c | outb_p(15, video_port_reg); | 
| outb_p | 644 | drivers/char/console.c | outb_p(0xff&((video_mem_term-video_mem_base)>>1), video_port_val); | 
| outb_p | 657 | drivers/char/console.c | outb_p(14, video_port_reg); | 
| outb_p | 658 | drivers/char/console.c | outb_p(0xff&((pos-video_mem_base)>>9), video_port_val); | 
| outb_p | 659 | drivers/char/console.c | outb_p(15, video_port_reg); | 
| outb_p | 660 | drivers/char/console.c | outb_p(0xff&((pos-video_mem_base)>>1), video_port_val); | 
| outb_p | 2087 | drivers/char/console.c | outb_p (6, 0x3ce) ; | 
| outb_p | 2088 | drivers/char/console.c | outb_p (6, 0x3cf) ; | 
| outb_p | 2096 | drivers/char/console.c | outb_p (i, 0x3c0) ; | 
| outb_p | 2097 | drivers/char/console.c | outb_p (i, 0x3c0) ; | 
| outb_p | 2099 | drivers/char/console.c | outb_p (0x20, 0x3c0) ; | 
| outb_p | 2105 | drivers/char/console.c | outb_p (color_table[i], 0x3c8) ; | 
| outb_p | 2106 | drivers/char/console.c | outb_p (default_red[i], 0x3c9) ; | 
| outb_p | 2107 | drivers/char/console.c | outb_p (default_grn[i], 0x3c9) ; | 
| outb_p | 2108 | drivers/char/console.c | outb_p (default_blu[i], 0x3c9) ; | 
| outb_p | 2207 | drivers/char/console.c | outb_p(0, 0x3bf);  /* Back to power-on defaults */ | 
| outb_p | 2208 | drivers/char/console.c | outb_p(0, 0x3b8);  /* Blank the screen, select page 0, etc */ | 
| outb_p | 2211 | drivers/char/console.c | outb_p(i, 0x3b4); | 
| outb_p | 2212 | drivers/char/console.c | outb_p(herc_txt_tbl[i], 0x3b5); | 
| outb_p | 2218 | drivers/char/console.c | outb_p(HGA_BLINKER_ON | HGA_SCREEN_ON, 0x3b8); | 
| outb_p | 2420 | drivers/char/console.c | outb_p( 0x00, seq_port_reg );   /* First, the sequencer */ | 
| outb_p | 2421 | drivers/char/console.c | outb_p( 0x01, seq_port_val );   /* Synchronous reset */ | 
| outb_p | 2422 | drivers/char/console.c | outb_p( 0x02, seq_port_reg ); | 
| outb_p | 2423 | drivers/char/console.c | outb_p( 0x04, seq_port_val );   /* CPU writes only to map 2 */ | 
| outb_p | 2424 | drivers/char/console.c | outb_p( 0x04, seq_port_reg ); | 
| outb_p | 2425 | drivers/char/console.c | outb_p( 0x07, seq_port_val );   /* Sequential addressing */ | 
| outb_p | 2426 | drivers/char/console.c | outb_p( 0x00, seq_port_reg ); | 
| outb_p | 2427 | drivers/char/console.c | outb_p( 0x03, seq_port_val );   /* Clear synchronous reset */ | 
| outb_p | 2429 | drivers/char/console.c | outb_p( 0x04, gr_port_reg );    /* Now, the graphics controller */ | 
| outb_p | 2430 | drivers/char/console.c | outb_p( 0x02, gr_port_val );    /* select map 2 */ | 
| outb_p | 2431 | drivers/char/console.c | outb_p( 0x05, gr_port_reg ); | 
| outb_p | 2432 | drivers/char/console.c | outb_p( 0x00, gr_port_val );    /* disable odd-even addressing */ | 
| outb_p | 2433 | drivers/char/console.c | outb_p( 0x06, gr_port_reg ); | 
| outb_p | 2434 | drivers/char/console.c | outb_p( 0x00, gr_port_val );    /* map start at A000:0000 */ | 
| outb_p | 2462 | drivers/char/console.c | outb_p( 0x00, seq_port_reg );   /* First, the sequencer */ | 
| outb_p | 2463 | drivers/char/console.c | outb_p( 0x01, seq_port_val );   /* Synchronous reset */ | 
| outb_p | 2464 | drivers/char/console.c | outb_p( 0x02, seq_port_reg ); | 
| outb_p | 2465 | drivers/char/console.c | outb_p( 0x03, seq_port_val );   /* CPU writes to maps 0 and 1 */ | 
| outb_p | 2466 | drivers/char/console.c | outb_p( 0x04, seq_port_reg ); | 
| outb_p | 2467 | drivers/char/console.c | outb_p( 0x03, seq_port_val );   /* odd-even addressing */ | 
| outb_p | 2470 | drivers/char/console.c | outb_p( 0x03, seq_port_reg ); /* Character Map Select */ | 
| outb_p | 2471 | drivers/char/console.c | outb_p( ch512 ? 0x04 : 0x00, seq_port_val ); | 
| outb_p | 2473 | drivers/char/console.c | outb_p( 0x00, seq_port_reg ); | 
| outb_p | 2474 | drivers/char/console.c | outb_p( 0x03, seq_port_val );   /* clear synchronous reset */ | 
| outb_p | 2476 | drivers/char/console.c | outb_p( 0x04, gr_port_reg );    /* Now, the graphics controller */ | 
| outb_p | 2477 | drivers/char/console.c | outb_p( 0x00, gr_port_val );    /* select map 0 for CPU */ | 
| outb_p | 2478 | drivers/char/console.c | outb_p( 0x05, gr_port_reg ); | 
| outb_p | 2479 | drivers/char/console.c | outb_p( 0x10, gr_port_val );    /* enable even-odd addressing */ | 
| outb_p | 2480 | drivers/char/console.c | outb_p( 0x06, gr_port_reg ); | 
| outb_p | 2481 | drivers/char/console.c | outb_p( beg, gr_port_val );     /* map starts at b800:0 or b000:0 */ | 
| outb_p | 2487 | drivers/char/console.c | outb_p ( 0x12, attrib_port ); /* color plane enable register */ | 
| outb_p | 2488 | drivers/char/console.c | outb_p ( ch512 ? 0x07 : 0x0f, attrib_port ); | 
| outb_p | 2492 | drivers/char/console.c | outb_p ( 0x20, attrib_port ); | 
| outb_p | 2583 | drivers/char/console.c | outb_p (color_table[i], dac_reg) ; | 
| outb_p | 2584 | drivers/char/console.c | outb_p (vc_cons[fg_console].d->vc_palette[j++]>>2, dac_val) ; | 
| outb_p | 2585 | drivers/char/console.c | outb_p (vc_cons[fg_console].d->vc_palette[j++]>>2, dac_val) ; | 
| outb_p | 2586 | drivers/char/console.c | outb_p (vc_cons[fg_console].d->vc_palette[j++]>>2, dac_val) ; | 
| outb_p | 2648 | drivers/char/console.c | outb_p( 0x07, video_port_reg );    /* CRTC overflow register */ | 
| outb_p | 2650 | drivers/char/console.c | outb_p( 0x09, video_port_reg );    /* Font size register */ | 
| outb_p | 2652 | drivers/char/console.c | outb_p( 0x0a, video_port_reg );    /* Cursor start */ | 
| outb_p | 2654 | drivers/char/console.c | outb_p( 0x0b, video_port_reg );    /* Cursor end */ | 
| outb_p | 2667 | drivers/char/console.c | outb_p( 0x07, video_port_reg );    /* CRTC overflow register */ | 
| outb_p | 2668 | drivers/char/console.c | outb_p( ovr, video_port_val ); | 
| outb_p | 2669 | drivers/char/console.c | outb_p( 0x09, video_port_reg );    /* Font size */ | 
| outb_p | 2670 | drivers/char/console.c | outb_p( fsr, video_port_val ); | 
| outb_p | 2671 | drivers/char/console.c | outb_p( 0x0a, video_port_reg );    /* Cursor start */ | 
| outb_p | 2672 | drivers/char/console.c | outb_p( curs, video_port_val ); | 
| outb_p | 2673 | drivers/char/console.c | outb_p( 0x0b, video_port_reg );    /* Cursor end */ | 
| outb_p | 2674 | drivers/char/console.c | outb_p( cure, video_port_val ); | 
| outb_p | 2675 | drivers/char/console.c | outb_p( 0x12, video_port_reg );    /* Vertical display limit */ | 
| outb_p | 2676 | drivers/char/console.c | outb_p( vde, video_port_val ); | 
| outb_p | 1042 | drivers/char/keyboard.c | outb_p(data, 0x60); | 
| outb_p | 69 | drivers/char/lp.c | outb_p(0, LP_C(minor)); | 
| outb_p | 72 | drivers/char/lp.c | outb_p(command, LP_C(minor)); | 
| outb_p | 102 | drivers/char/lp.c | outb_p(lpchar, LP_B(minor)); | 
| outb_p | 107 | drivers/char/lp.c | outb_p(( LP_PSELECP | LP_PINITP | LP_PSTROBE ), ( LP_C( minor ))); | 
| outb_p | 110 | drivers/char/lp.c | outb_p(( LP_PSELECP | LP_PINITP ), ( LP_C( minor ))); | 
| outb_p | 127 | drivers/char/lp.c | outb_p(lpchar, LP_B(minor)); | 
| outb_p | 132 | drivers/char/lp.c | outb_p(( LP_PSELECP | LP_PINITP | LP_PSTROBE ), ( LP_C( minor ))); | 
| outb_p | 135 | drivers/char/lp.c | outb_p(( LP_PSELECP | LP_PINITP ), ( LP_C( minor ))); | 
| outb_p | 195 | drivers/char/lp.c | outb_p((LP_PSELECP|LP_PINITP|LP_PINTEN), (LP_C(minor))); | 
| outb_p | 199 | drivers/char/lp.c | outb_p((LP_PSELECP|LP_PINITP), (LP_C(minor))); | 
| outb_p | 205 | drivers/char/lp.c | outb_p((LP_PSELECP|LP_PINITP), (LP_C(minor))); | 
| outb_p | 536 | drivers/char/lp.c | outb_p( LP_DUMMY, LP_B(offset)); | 
| outb_p | 131 | drivers/char/psaux.c | outb_p(AUX_MAGIC_WRITE,AUX_COMMAND);  /* write magic cookie */ | 
| outb_p | 133 | drivers/char/psaux.c | outb_p(val,AUX_OUTPUT_PORT);    /* write data */ | 
| outb_p | 146 | drivers/char/psaux.c | outb_p(AUX_MAGIC_WRITE,AUX_COMMAND); | 
| outb_p | 148 | drivers/char/psaux.c | outb_p(val,AUX_OUTPUT_PORT); | 
| outb_p | 166 | drivers/char/psaux.c | outb_p(AUX_CMD_WRITE,AUX_COMMAND); | 
| outb_p | 168 | drivers/char/psaux.c | outb_p(val,AUX_OUTPUT_PORT); | 
| outb_p | 244 | drivers/char/psaux.c | outb_p(AUX_DISABLE,AUX_COMMAND);        /* Disable Aux device */ | 
| outb_p | 259 | drivers/char/psaux.c | outb_p(status & ~(QP_ENABLE|QP_INTS_ON), qp_status); | 
| outb_p | 320 | drivers/char/psaux.c | outb_p(AUX_ENABLE,AUX_COMMAND);    /* Enable Aux */ | 
| outb_p | 352 | drivers/char/psaux.c | outb_p(status, qp_status); | 
| outb_p | 354 | drivers/char/psaux.c | outb_p(status, qp_status); | 
| outb_p | 358 | drivers/char/psaux.c | outb_p(status, qp_status);              /* Enable interrupts */ | 
| outb_p | 365 | drivers/char/psaux.c | outb_p(AUX_ENABLE_DEV, qp_data);  /* Wake up mouse */ | 
| outb_p | 382 | drivers/char/psaux.c | outb_p(AUX_MAGIC_WRITE,AUX_COMMAND); | 
| outb_p | 385 | drivers/char/psaux.c | outb_p(get_user(buffer++),AUX_OUTPUT_PORT); | 
| outb_p | 404 | drivers/char/psaux.c | outb_p(get_user(buffer++), qp_data); | 
| outb_p | 509 | drivers/char/psaux.c | outb_p(AUX_ENABLE,AUX_COMMAND);    /* Enable Aux */ | 
| outb_p | 517 | drivers/char/psaux.c | outb_p(AUX_DISABLE,AUX_COMMAND);   /* Disable Aux device */ | 
| outb_p | 519 | drivers/char/psaux.c | outb_p(AUX_CMD_WRITE,AUX_COMMAND); | 
| outb_p | 521 | drivers/char/psaux.c | outb_p(AUX_INTS_OFF, AUX_OUTPUT_PORT); /*  on the controller */ | 
| outb_p | 582 | drivers/char/psaux.c | outb_p(index, 0x390);      /* Write index */ | 
| outb_p | 592 | drivers/char/psaux.c | outb_p(0x55, 0x2fa);      /* Any value except 9, ff or 36 */ | 
| outb_p | 593 | drivers/char/psaux.c | outb_p(0xaa, 0x3fa);      /* Inverse of 55 */ | 
| outb_p | 594 | drivers/char/psaux.c | outb_p(0x36, 0x3fa);      /* Address the chip */ | 
| outb_p | 595 | drivers/char/psaux.c | outb_p(0xe4, 0x3fa);      /* 390/4; 390 = config address */ | 
| outb_p | 596 | drivers/char/psaux.c | outb_p(0x1b, 0x2fa);      /* Inverse of e4 */ | 
| outb_p | 601 | drivers/char/psaux.c | outb_p(0x0f, 0x390); | 
| outb_p | 602 | drivers/char/psaux.c | outb_p(0x0f, 0x391);      /* Close config mode */ | 
| outb_p | 278 | drivers/char/serial.c | outb_p(value, info->port+1); | 
| outb_p | 284 | drivers/char/serial.c | outb_p(value, info->port+offset); | 
| outb_p | 991 | drivers/char/serial.c | outb_p(0x80, ICP); | 
| outb_p | 2358 | drivers/char/serial.c | outb_p(0x80, ICP); | 
| outb_p | 2386 | drivers/char/serial.c | outb_p(save_ICP, ICP); | 
| outb_p | 459 | drivers/char/tpqic02.c | outb_p(ctlbits, QIC02_CTL_PORT); | 
| outb_p | 463 | drivers/char/tpqic02.c | outb_p(ctlbits, QIC02_CTL_PORT); | 
| outb_p | 464 | drivers/char/tpqic02.c | outb_p(0, AR_RESET_DMA_PORT);  /* dummy write to reset DMA */ | 
| outb_p | 468 | drivers/char/tpqic02.c | outb_p(ctlbits, QIC02_CTL_PORT); | 
| outb_p | 621 | drivers/char/tpqic02.c | outb_p(ctlbits & ~MTN_QIC02_CTL_RESET_NOT, QIC02_CTL_PORT); | 
| outb_p | 623 | drivers/char/tpqic02.c | outb_p(ctlbits | QIC02_CTL_RESET, QIC02_CTL_PORT); | 
| outb_p | 638 | drivers/char/tpqic02.c | outb_p(ctlbits | MTN_QIC02_CTL_RESET_NOT, QIC02_CTL_PORT); | 
| outb_p | 640 | drivers/char/tpqic02.c | outb_p(ctlbits & ~QIC02_CTL_RESET, QIC02_CTL_PORT); | 
| outb_p | 669 | drivers/char/tpqic02.c | outb_p(cmd, QIC02_CMD_PORT);    /* output the command */ | 
| outb_p | 685 | drivers/char/tpqic02.c | outb_p(ctlbits | QIC02_CTL_REQUEST, QIC02_CTL_PORT);  /* set request bit */ | 
| outb_p | 699 | drivers/char/tpqic02.c | outb_p(ctlbits & ~QIC02_CTL_REQUEST, QIC02_CTL_PORT); /* reset request bit */ | 
| outb_p | 895 | drivers/char/tpqic02.c | outb_p(ctlbits | QIC02_CTL_REQUEST, QIC02_CTL_PORT);  /* set request */ | 
| outb_p | 901 | drivers/char/tpqic02.c | outb_p(ctlbits & ~QIC02_CTL_REQUEST, QIC02_CTL_PORT);  /* un-set request */ | 
| outb_p | 1531 | drivers/char/tpqic02.c | outb_p(WT_CTL_ONLINE, QIC02_CTL_PORT);  /* back to normal */ | 
| outb_p | 1533 | drivers/char/tpqic02.c | outb_p(0, AR_RESET_DMA_PORT); | 
| outb_p | 1535 | drivers/char/tpqic02.c | outb_p(ctlbits, QIC02_CTL_PORT); | 
| outb_p | 1545 | drivers/char/tpqic02.c | outb_p(WT_CTL_DMA | WT_CTL_ONLINE, QIC02_CTL_PORT); /* trigger DMA transfer */ | 
| outb_p | 1548 | drivers/char/tpqic02.c | outb_p(AR_CTL_IEN | AR_CTL_DNIEN, QIC02_CTL_PORT);  /* enable interrupts again */ | 
| outb_p | 1549 | drivers/char/tpqic02.c | outb_p(0, AR_START_DMA_PORT);        /* start DMA transfer */ | 
| outb_p | 1554 | drivers/char/tpqic02.c | outb_p(ctlbits | (MTN_CTL_EXC_IEN | MTN_CTL_DNIEN), QIC02_CTL_PORT); | 
| outb_p | 1555 | drivers/char/tpqic02.c | outb_p(0, MTN_W_SELECT_DMA_PORT);   /* start DMA transfer */ | 
| outb_p | 1557 | drivers/char/tpqic02.c | outb_p(0, MTN_W_DMA_WRITE_PORT); /* start DMA transfer */ | 
| outb_p | 1702 | drivers/char/tpqic02.c | outb_p(WT_CTL_ONLINE, QIC02_CTL_PORT);  /* back to normal */ | 
| outb_p | 1704 | drivers/char/tpqic02.c | outb_p(0, AR_RESET_DMA_PORT); | 
| outb_p | 1716 | drivers/char/tpqic02.c | outb_p(ctlbits, QIC02_CTL_PORT); | 
| outb_p | 140 | drivers/char/vesa_blank.c | outb_p(0x00,video_port_reg);    /* HorizontalTotal */ | 
| outb_p | 142 | drivers/char/vesa_blank.c | outb_p(0x01,video_port_reg);    /* HorizDisplayEnd */ | 
| outb_p | 144 | drivers/char/vesa_blank.c | outb_p(0x04,video_port_reg);    /* StartHorizRetrace */ | 
| outb_p | 146 | drivers/char/vesa_blank.c | outb_p(0x05,video_port_reg);    /* EndHorizRetrace */ | 
| outb_p | 149 | drivers/char/vesa_blank.c | outb_p(0x07,video_port_reg);      /* Overflow */ | 
| outb_p | 151 | drivers/char/vesa_blank.c | outb_p(0x10,video_port_reg);      /* StartVertRetrace */ | 
| outb_p | 153 | drivers/char/vesa_blank.c | outb_p(0x11,video_port_reg);      /* EndVertRetrace */ | 
| outb_p | 155 | drivers/char/vesa_blank.c | outb_p(0x17,video_port_reg);      /* ModeControl */ | 
| outb_p | 157 | drivers/char/vesa_blank.c | outb_p(0x01,seq_port_reg);      /* ClockingMode */ | 
| outb_p | 163 | drivers/char/vesa_blank.c | outb_p(0x01,seq_port_reg); | 
| outb_p | 164 | drivers/char/vesa_blank.c | outb_p(vga.ClockingMode | 0x20,seq_port_val); | 
| outb_p | 168 | drivers/char/vesa_blank.c | outb_p(vga.CrtMiscIO & 0xef,video_misc_wr); | 
| outb_p | 175 | drivers/char/vesa_blank.c | outb_p(0x10,video_port_reg);    /* StartVertRetrace */ | 
| outb_p | 176 | drivers/char/vesa_blank.c | outb_p(0xff,video_port_val);    /* maximum value */ | 
| outb_p | 177 | drivers/char/vesa_blank.c | outb_p(0x11,video_port_reg);    /* EndVertRetrace */ | 
| outb_p | 178 | drivers/char/vesa_blank.c | outb_p(0x40,video_port_val);            /* minimum (bits 0..3)  */ | 
| outb_p | 179 | drivers/char/vesa_blank.c | outb_p(0x07,video_port_reg);    /* Overflow */ | 
| outb_p | 180 | drivers/char/vesa_blank.c | outb_p(vga.Overflow | 0x84,video_port_val);  /* bits 9,10 of  */ | 
| outb_p | 188 | drivers/char/vesa_blank.c | outb_p(0x04,video_port_reg);  /* StartHorizRetrace */ | 
| outb_p | 189 | drivers/char/vesa_blank.c | outb_p(0xff,video_port_val);  /* maximum */ | 
| outb_p | 190 | drivers/char/vesa_blank.c | outb_p(0x05,video_port_reg);  /* EndHorizRetrace */ | 
| outb_p | 191 | drivers/char/vesa_blank.c | outb_p(0x00,video_port_val);  /* minimum (0) */ | 
| outb_p | 195 | drivers/char/vesa_blank.c | outb_p(vga.SeqCtrlIndex,seq_port_reg); | 
| outb_p | 196 | drivers/char/vesa_blank.c | outb_p(vga.CrtCtrlIndex,video_port_reg); | 
| outb_p | 210 | drivers/char/vesa_blank.c | outb_p(vga.CrtMiscIO,video_misc_wr); | 
| outb_p | 213 | drivers/char/vesa_blank.c | outb_p(0x00,video_port_reg);  /* HorizontalTotal */ | 
| outb_p | 214 | drivers/char/vesa_blank.c | outb_p(vga.HorizontalTotal,video_port_val); | 
| outb_p | 215 | drivers/char/vesa_blank.c | outb_p(0x01,video_port_reg);  /* HorizDisplayEnd */ | 
| outb_p | 216 | drivers/char/vesa_blank.c | outb_p(vga.HorizDisplayEnd,video_port_val); | 
| outb_p | 217 | drivers/char/vesa_blank.c | outb_p(0x04,video_port_reg);  /* StartHorizRetrace */ | 
| outb_p | 218 | drivers/char/vesa_blank.c | outb_p(vga.StartHorizRetrace,video_port_val); | 
| outb_p | 219 | drivers/char/vesa_blank.c | outb_p(0x05,video_port_reg);  /* EndHorizRetrace */ | 
| outb_p | 220 | drivers/char/vesa_blank.c | outb_p(vga.EndHorizRetrace,video_port_val); | 
| outb_p | 222 | drivers/char/vesa_blank.c | outb_p(0x07,video_port_reg);    /* Overflow */ | 
| outb_p | 223 | drivers/char/vesa_blank.c | outb_p(vga.Overflow,video_port_val); | 
| outb_p | 224 | drivers/char/vesa_blank.c | outb_p(0x10,video_port_reg);    /* StartVertRetrace */ | 
| outb_p | 225 | drivers/char/vesa_blank.c | outb_p(vga.StartVertRetrace,video_port_val); | 
| outb_p | 226 | drivers/char/vesa_blank.c | outb_p(0x11,video_port_reg);    /* EndVertRetrace */ | 
| outb_p | 227 | drivers/char/vesa_blank.c | outb_p(vga.EndVertRetrace,video_port_val); | 
| outb_p | 228 | drivers/char/vesa_blank.c | outb_p(0x17,video_port_reg);    /* ModeControl */ | 
| outb_p | 229 | drivers/char/vesa_blank.c | outb_p(vga.ModeControl,video_port_val); | 
| outb_p | 230 | drivers/char/vesa_blank.c | outb_p(0x01,seq_port_reg);    /* ClockingMode */ | 
| outb_p | 231 | drivers/char/vesa_blank.c | outb_p(vga.ClockingMode,seq_port_val); | 
| outb_p | 234 | drivers/char/vesa_blank.c | outb_p(vga.SeqCtrlIndex,seq_port_reg); | 
| outb_p | 235 | drivers/char/vesa_blank.c | outb_p(vga.CrtCtrlIndex,video_port_reg); | 
| outb_p | 162 | drivers/char/vt.c | outb_p(inb_p(0x61)|3, 0x61); | 
| outb_p | 164 | drivers/char/vt.c | outb_p(0xB6, 0x43); | 
| outb_p | 166 | drivers/char/vt.c | outb_p(count & 0xff, 0x42); | 
| outb_p | 163 | drivers/net/3c503.c | outb_p(ECNTRL_RESET|ECNTRL_THIN, ioaddr + 0x406); /* Reset it... */ | 
| outb_p | 164 | drivers/net/3c503.c | outb_p(ECNTRL_THIN, ioaddr + 0x406); | 
| outb_p | 291 | drivers/net/3c503.c | outb_p(0x04 << ((*irqp == 9) ? 2 : *irqp), E33G_IDCFR); | 
| outb_p | 292 | drivers/net/3c503.c | outb_p(0x00, E33G_IDCFR); | 
| outb_p | 337 | drivers/net/3c503.c | outb_p(ECNTRL_RESET|ECNTRL_THIN, E33G_CNTRL); | 
| outb_p | 339 | drivers/net/3c503.c | outb_p(ei_status.interface_num==0 ? ECNTRL_THIN : ECNTRL_AUI, E33G_CNTRL); | 
| outb_p | 349 | drivers/net/3c503.c | outb_p(ei_status.interface_num==0 ? ECNTRL_THIN : ECNTRL_AUI, E33G_CNTRL); | 
| outb_p | 361 | drivers/net/3c503.c | outb_p(0x00,  dev->base_addr + EN0_IMR); | 
| outb_p | 366 | drivers/net/3c503.c | outb_p((0x04 << (dev->irq == 9 ? 2 : dev->irq)), E33G_IDCFR); | 
| outb_p | 367 | drivers/net/3c503.c | outb_p(8, E33G_DRQCNT);    /* Set burst size to 8 */ | 
| outb_p | 368 | drivers/net/3c503.c | outb_p(0x20, E33G_DMAAH);  /* Put a valid addr in the GA DMA */ | 
| outb_p | 369 | drivers/net/3c503.c | outb_p(0x00, E33G_DMAAL); | 
| outb_p | 397 | drivers/net/3c503.c | outb_p(start_page, E33G_DMAAH); | 
| outb_p | 398 | drivers/net/3c503.c | outb_p((ei_status.interface_num ? ECNTRL_AUI : ECNTRL_THIN ) | ECNTRL_OUTPUT | 
| outb_p | 414 | drivers/net/3c503.c | outb_p(ei_status.interface_num==0 ? ECNTRL_THIN : ECNTRL_AUI, E33G_CNTRL); | 
| outb_p | 442 | drivers/net/3c503.c | outb_p((ring_offset >> 8) & 0xff, E33G_DMAAH); | 
| outb_p | 443 | drivers/net/3c503.c | outb_p((ei_status.interface_num == 0 ? ECNTRL_THIN : ECNTRL_AUI) | ECNTRL_INPUT | 
| outb_p | 459 | drivers/net/3c503.c | outb_p(ei_status.interface_num == 0 ? ECNTRL_THIN : ECNTRL_AUI, E33G_CNTRL); | 
| outb_p | 180 | drivers/net/8390.c | outb_p(0x00, e8390_base + EN0_IMR); | 
| outb_p | 183 | drivers/net/8390.c | outb_p(ENISR_ALL, e8390_base + EN0_IMR); | 
| outb_p | 213 | drivers/net/8390.c | outb_p(ENISR_ALL, e8390_base + EN0_IMR); | 
| outb_p | 239 | drivers/net/8390.c | outb_p(ENISR_ALL, e8390_base + EN0_IMR); | 
| outb_p | 274 | drivers/net/8390.c | outb_p(E8390_NODMA+E8390_PAGE0, e8390_base + E8390_CMD); | 
| outb_p | 300 | drivers/net/8390.c | outb_p(ENISR_COUNTERS, e8390_base + EN0_ISR); /* Ack intr. */ | 
| outb_p | 305 | drivers/net/8390.c | outb_p(ENISR_TX_ERR, e8390_base + EN0_ISR); /* Ack intr. */ | 
| outb_p | 310 | drivers/net/8390.c | outb_p(ENISR_RDC, e8390_base + EN0_ISR); | 
| outb_p | 313 | drivers/net/8390.c | outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, e8390_base + E8390_CMD); | 
| outb_p | 317 | drivers/net/8390.c | outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, e8390_base + E8390_CMD); | 
| outb_p | 321 | drivers/net/8390.c | outb_p(ENISR_ALL, e8390_base + EN0_ISR); /* Ack. most intrs. */ | 
| outb_p | 324 | drivers/net/8390.c | outb_p(0xff, e8390_base + EN0_ISR); /* Ack. all intrs. */ | 
| outb_p | 339 | drivers/net/8390.c | outb_p(ENISR_TX, e8390_base + EN0_ISR); /* Ack intr. */ | 
| outb_p | 410 | drivers/net/8390.c | outb_p(E8390_NODMA+E8390_PAGE1, e8390_base + E8390_CMD); | 
| outb_p | 412 | drivers/net/8390.c | outb_p(E8390_NODMA+E8390_PAGE0, e8390_base + E8390_CMD); | 
| outb_p | 493 | drivers/net/8390.c | outb_p(next_frame-1, e8390_base+EN0_BOUNDARY); | 
| outb_p | 504 | drivers/net/8390.c | outb_p(ENISR_RX+ENISR_RX_ERR+ENISR_OVER, e8390_base+EN0_ISR); | 
| outb_p | 517 | drivers/net/8390.c | outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base+E8390_CMD); | 
| outb_p | 541 | drivers/net/8390.c | outb_p(0xff, e8390_base+EN0_ISR); | 
| outb_p | 543 | drivers/net/8390.c | outb_p(E8390_NODMA + E8390_PAGE0 + E8390_START, e8390_base + E8390_CMD); | 
| outb_p | 544 | drivers/net/8390.c | outb_p(E8390_TXCONFIG, e8390_base + EN0_TXCR); /* xmit on. */ | 
| outb_p | 577 | drivers/net/8390.c | outb_p(E8390_RXCONFIG | 0x08, ioaddr + EN0_RXCR); | 
| outb_p | 579 | drivers/net/8390.c | outb_p(E8390_RXCONFIG | 0x18, ioaddr + EN0_RXCR); | 
| outb_p | 581 | drivers/net/8390.c | outb_p(E8390_RXCONFIG, ioaddr + EN0_RXCR); | 
| outb_p | 629 | drivers/net/8390.c | outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base); /* 0x21 */ | 
| outb_p | 630 | drivers/net/8390.c | outb_p(endcfg, e8390_base + EN0_DCFG);  /* 0x48 or 0x49 */ | 
| outb_p | 632 | drivers/net/8390.c | outb_p(0x00,  e8390_base + EN0_RCNTLO); | 
| outb_p | 633 | drivers/net/8390.c | outb_p(0x00,  e8390_base + EN0_RCNTHI); | 
| outb_p | 635 | drivers/net/8390.c | outb_p(E8390_RXOFF, e8390_base + EN0_RXCR); /* 0x20 */ | 
| outb_p | 636 | drivers/net/8390.c | outb_p(E8390_TXOFF, e8390_base + EN0_TXCR); /* 0x02 */ | 
| outb_p | 638 | drivers/net/8390.c | outb_p(ei_local->tx_start_page,   e8390_base + EN0_TPSR); | 
| outb_p | 640 | drivers/net/8390.c | outb_p(ei_local->rx_start_page,   e8390_base + EN0_STARTPG); | 
| outb_p | 641 | drivers/net/8390.c | outb_p(ei_local->stop_page-1, e8390_base + EN0_BOUNDARY); /* 3c503 says 0x3f,NS0x26*/ | 
| outb_p | 643 | drivers/net/8390.c | outb_p(ei_local->stop_page,    e8390_base + EN0_STOPPG); | 
| outb_p | 645 | drivers/net/8390.c | outb_p(0xFF, e8390_base + EN0_ISR); | 
| outb_p | 646 | drivers/net/8390.c | outb_p(0x00,  e8390_base + EN0_IMR); | 
| outb_p | 652 | drivers/net/8390.c | outb_p(E8390_NODMA + E8390_PAGE1 + E8390_STOP, e8390_base); /* 0x61 */ | 
| outb_p | 654 | drivers/net/8390.c | outb_p(dev->dev_addr[i], e8390_base + EN1_PHYS + i); | 
| outb_p | 659 | drivers/net/8390.c | outb_p(0xff, e8390_base + EN1_MULT + i); | 
| outb_p | 661 | drivers/net/8390.c | outb_p(ei_local->rx_start_page,   e8390_base + EN1_CURPAG); | 
| outb_p | 662 | drivers/net/8390.c | outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base); | 
| outb_p | 669 | drivers/net/8390.c | outb_p(0xff,  e8390_base + EN0_ISR); | 
| outb_p | 670 | drivers/net/8390.c | outb_p(ENISR_ALL,  e8390_base + EN0_IMR); | 
| outb_p | 671 | drivers/net/8390.c | outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, e8390_base); | 
| outb_p | 672 | drivers/net/8390.c | outb_p(E8390_TXCONFIG, e8390_base + EN0_TXCR); /* xmit on. */ | 
| outb_p | 674 | drivers/net/8390.c | outb_p(E8390_RXCONFIG,  e8390_base + EN0_RXCR); /* rx on,  */ | 
| outb_p | 685 | drivers/net/8390.c | outb_p(E8390_NODMA+E8390_PAGE0, e8390_base); | 
| outb_p | 692 | drivers/net/8390.c | outb_p(length & 0xff, e8390_base + EN0_TCNTLO); | 
| outb_p | 693 | drivers/net/8390.c | outb_p(length >> 8, e8390_base + EN0_TCNTHI); | 
| outb_p | 694 | drivers/net/8390.c | outb_p(start_page, e8390_base + EN0_TPSR); | 
| outb_p | 695 | drivers/net/8390.c | outb_p(E8390_NODMA+E8390_TRANS+E8390_START, e8390_base); | 
| outb_p | 278 | drivers/net/de600.c | #define select_prn() outb_p(SELECT_PRN, COMMAND_PORT); DE600_SLOW_DOWN | 
| outb_p | 279 | drivers/net/de600.c | #define select_nic() outb_p(SELECT_NIC, COMMAND_PORT); DE600_SLOW_DOWN | 
| outb_p | 283 | drivers/net/de600.c | outb_p(((data) << 4)   | WRITE_DATA            , DATA_PORT), \ | 
| outb_p | 284 | drivers/net/de600.c | outb_p(((data) & 0xf0) | WRITE_DATA | HI_NIBBLE, DATA_PORT)) | 
| outb_p | 291 | drivers/net/de600.c | outb_p(( rx_page        << 4)   | COMMAND            , DATA_PORT), \ | 
| outb_p | 292 | drivers/net/de600.c | outb_p(( rx_page        & 0xf0) | COMMAND | HI_NIBBLE, DATA_PORT), \ | 
| outb_p | 293 | drivers/net/de600.c | outb_p(((rx_page | cmd) << 4)   | COMMAND            , DATA_PORT), \ | 
| outb_p | 294 | drivers/net/de600.c | outb_p(((rx_page | cmd) & 0xf0) | COMMAND | HI_NIBBLE, DATA_PORT)) | 
| outb_p | 297 | drivers/net/de600.c | outb_p((((addr) << 4) & 0xf0) | type            , DATA_PORT), \ | 
| outb_p | 298 | drivers/net/de600.c | outb_p(( (addr)       & 0xf0) | type | HI_NIBBLE, DATA_PORT), \ | 
| outb_p | 299 | drivers/net/de600.c | outb_p((((addr) >> 4) & 0xf0) | type            , DATA_PORT), \ | 
| outb_p | 300 | drivers/net/de600.c | outb_p((((addr) >> 8) & 0xf0) | type | HI_NIBBLE, DATA_PORT)) | 
| outb_p | 314 | drivers/net/de600.c | outb_p(STATUS, DATA_PORT); | 
| outb_p | 316 | drivers/net/de600.c | outb_p(NULL_COMMAND | HI_NIBBLE, DATA_PORT); | 
| outb_p | 325 | drivers/net/de600.c | (void)outb_p((type), DATA_PORT); | 
| outb_p | 327 | drivers/net/de600.c | (void)outb_p((type) | HI_NIBBLE, DATA_PORT); | 
| outb_p | 145 | drivers/net/hp.c | outb_p(irqmap[irq] | HP_RUN, ioaddr + HP_CONFIGURE); | 
| outb_p | 146 | drivers/net/hp.c | outb_p( 0x00 | HP_RUN, ioaddr + HP_CONFIGURE); | 
| outb_p | 197 | drivers/net/hp.c | outb_p(0x00, hp_base + HP_CONFIGURE); | 
| outb_p | 203 | drivers/net/hp.c | outb_p(saved_config, hp_base + HP_CONFIGURE); | 
| outb_p | 225 | drivers/net/hp.c | outb_p(saved_config | HP_DATAON, nic_base - NIC_OFFSET + HP_CONFIGURE); | 
| outb_p | 226 | drivers/net/hp.c | outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base); | 
| outb_p | 227 | drivers/net/hp.c | outb_p(count & 0xff, nic_base + EN0_RCNTLO); | 
| outb_p | 228 | drivers/net/hp.c | outb_p(count >> 8, nic_base + EN0_RCNTHI); | 
| outb_p | 229 | drivers/net/hp.c | outb_p(ring_offset & 0xff, nic_base + EN0_RSARLO); | 
| outb_p | 230 | drivers/net/hp.c | outb_p(ring_offset >> 8, nic_base + EN0_RSARHI); | 
| outb_p | 231 | drivers/net/hp.c | outb_p(E8390_RREAD+E8390_START, nic_base); | 
| outb_p | 249 | drivers/net/hp.c | outb_p(saved_config & (~HP_DATAON), nic_base - NIC_OFFSET + HP_CONFIGURE); | 
| outb_p | 260 | drivers/net/hp.c | outb_p(saved_config | HP_DATAON, nic_base - NIC_OFFSET + HP_CONFIGURE); | 
| outb_p | 267 | drivers/net/hp.c | outb_p(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base); | 
| outb_p | 272 | drivers/net/hp.c | outb_p(0x42, nic_base + EN0_RCNTLO); | 
| outb_p | 273 | drivers/net/hp.c | outb_p(0,  nic_base + EN0_RCNTHI); | 
| outb_p | 274 | drivers/net/hp.c | outb_p(0xff, nic_base + EN0_RSARLO); | 
| outb_p | 275 | drivers/net/hp.c | outb_p(0x00, nic_base + EN0_RSARHI); | 
| outb_p | 276 | drivers/net/hp.c | outb_p(E8390_RREAD+E8390_START, EN_CMD); | 
| outb_p | 282 | drivers/net/hp.c | outb_p(count & 0xff, nic_base + EN0_RCNTLO); | 
| outb_p | 283 | drivers/net/hp.c | outb_p(count >> 8,   nic_base + EN0_RCNTHI); | 
| outb_p | 284 | drivers/net/hp.c | outb_p(0x00, nic_base + EN0_RSARLO); | 
| outb_p | 285 | drivers/net/hp.c | outb_p(start_page, nic_base + EN0_RSARHI); | 
| outb_p | 287 | drivers/net/hp.c | outb_p(E8390_RWRITE+E8390_START, nic_base); | 
| outb_p | 306 | drivers/net/hp.c | outb_p(saved_config & (~HP_DATAON), nic_base - NIC_OFFSET + HP_CONFIGURE); | 
| outb_p | 316 | drivers/net/hp.c | outb_p(irqmap[irq&0x0f] | HP_RUN, | 
| outb_p | 161 | drivers/net/ne.c | outb_p(E8390_NODMA+E8390_PAGE1+E8390_STOP, ioaddr + E8390_CMD); | 
| outb_p | 163 | drivers/net/ne.c | outb_p(0xff, ioaddr + 0x0d); | 
| outb_p | 164 | drivers/net/ne.c | outb_p(E8390_NODMA+E8390_PAGE0, ioaddr + E8390_CMD); | 
| outb_p | 167 | drivers/net/ne.c | outb_p(reg0, ioaddr); | 
| outb_p | 168 | drivers/net/ne.c | outb_p(regd, ioaddr + 0x0d);  /* Restore the old values. */ | 
| outb_p | 189 | drivers/net/ne.c | outb_p(0xff, ioaddr + EN0_ISR);    /* Ack all intr. */ | 
| outb_p | 213 | drivers/net/ne.c | outb_p(program_seq[i].value, ioaddr + program_seq[i].offset); | 
| outb_p | 225 | drivers/net/ne.c | outb_p(0x49, ioaddr + EN0_DCFG); | 
| outb_p | 287 | drivers/net/ne.c | outb_p(0x50, ioaddr + EN0_IMR);  /* Enable one interrupt. */ | 
| outb_p | 288 | drivers/net/ne.c | outb_p(0x00, ioaddr + EN0_RCNTLO); | 
| outb_p | 289 | drivers/net/ne.c | outb_p(0x00, ioaddr + EN0_RCNTHI); | 
| outb_p | 290 | drivers/net/ne.c | outb_p(E8390_RREAD+E8390_START, ioaddr); /* Trigger it... */ | 
| outb_p | 291 | drivers/net/ne.c | outb_p(0x00, ioaddr + EN0_IMR);     /* Mask it again. */ | 
| outb_p | 363 | drivers/net/ne.c | outb_p(ENISR_RESET, NE_BASE + EN0_ISR);  /* Ack intr. */ | 
| outb_p | 389 | drivers/net/ne.c | outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD); | 
| outb_p | 390 | drivers/net/ne.c | outb_p(count & 0xff, nic_base + EN0_RCNTLO); | 
| outb_p | 391 | drivers/net/ne.c | outb_p(count >> 8, nic_base + EN0_RCNTHI); | 
| outb_p | 392 | drivers/net/ne.c | outb_p(ring_offset & 0xff, nic_base + EN0_RSARLO); | 
| outb_p | 393 | drivers/net/ne.c | outb_p(ring_offset >> 8, nic_base + EN0_RSARHI); | 
| outb_p | 394 | drivers/net/ne.c | outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD); | 
| outb_p | 429 | drivers/net/ne.c | outb_p(ENISR_RDC, nic_base + EN0_ISR);  /* Ack intr. */ | 
| outb_p | 461 | drivers/net/ne.c | outb_p(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD); | 
| outb_p | 472 | drivers/net/ne.c | outb_p(0x42, nic_base + EN0_RCNTLO); | 
| outb_p | 473 | drivers/net/ne.c | outb_p(0x00,   nic_base + EN0_RCNTHI); | 
| outb_p | 474 | drivers/net/ne.c | outb_p(0x42, nic_base + EN0_RSARLO); | 
| outb_p | 475 | drivers/net/ne.c | outb_p(0x00, nic_base + EN0_RSARHI); | 
| outb_p | 476 | drivers/net/ne.c | outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD); | 
| outb_p | 483 | drivers/net/ne.c | outb_p(ENISR_RDC, nic_base + EN0_ISR); | 
| outb_p | 486 | drivers/net/ne.c | outb_p(count & 0xff, nic_base + EN0_RCNTLO); | 
| outb_p | 487 | drivers/net/ne.c | outb_p(count >> 8,   nic_base + EN0_RCNTHI); | 
| outb_p | 488 | drivers/net/ne.c | outb_p(0x00, nic_base + EN0_RSARLO); | 
| outb_p | 489 | drivers/net/ne.c | outb_p(start_page, nic_base + EN0_RSARHI); | 
| outb_p | 491 | drivers/net/ne.c | outb_p(E8390_RWRITE+E8390_START, nic_base + NE_CMD); | 
| outb_p | 530 | drivers/net/ne.c | outb_p(ENISR_RDC, nic_base + EN0_ISR);  /* Ack intr. */ | 
| outb_p | 183 | drivers/net/pi2.c | outb_p(0, cbase + DMAEN);  /* Disable DMA while we touch the scc */ | 
| outb_p | 184 | drivers/net/pi2.c | outb_p(sccreg, ctl);  /* Select register */ | 
| outb_p | 185 | drivers/net/pi2.c | outb_p(val, ctl);    /* Output value */ | 
| outb_p | 186 | drivers/net/pi2.c | outb_p(1, cbase + DMAEN);  /* Enable DMA */ | 
| outb_p | 194 | drivers/net/pi2.c | outb_p(0, cbase + DMAEN);  /* Disable DMA while we touch the scc */ | 
| outb_p | 195 | drivers/net/pi2.c | outb_p(sccreg, ctl);  /* Select register */ | 
| outb_p | 197 | drivers/net/pi2.c | outb_p(1, cbase + DMAEN);  /* Enable DMA */ | 
| outb_p | 328 | drivers/net/pi2.c | outb_p(sc | LSB_MSB | MODE0, lp->cardbase + TMRCMD); | 
| outb_p | 331 | drivers/net/pi2.c | outb_p((t1 << 1) & 0xFF, port); | 
| outb_p | 332 | drivers/net/pi2.c | outb_p((t1 >> 7) & 0xFF, port); | 
| outb_p | 956 | drivers/net/pi2.c | outb_p(SC0 | LSB_MSB | MODE3, tmrcmd); | 
| outb_p | 957 | drivers/net/pi2.c | outb_p(922 & 0xFF, tmr0); | 
| outb_p | 958 | drivers/net/pi2.c | outb_p(922 >> 8, tmr0); | 
| outb_p | 961 | drivers/net/pi2.c | outb_p(SC1 | LSB_MSB | MODE0, tmrcmd); | 
| outb_p | 962 | drivers/net/pi2.c | outb_p((time << 1) & 0xFF, tmr1); | 
| outb_p | 963 | drivers/net/pi2.c | outb_p((time >> 7) & 0XFF, tmr1); | 
| outb_p | 968 | drivers/net/pi2.c | outb_p(SC1, tmrcmd); | 
| outb_p | 975 | drivers/net/pi2.c | outb_p(SC1, tmrcmd); | 
| outb_p | 991 | drivers/net/pi2.c | outb_p(SC0 | LSB_MSB | MODE3, tmrcmd); | 
| outb_p | 992 | drivers/net/pi2.c | outb_p(1844 & 0xFF, tmr0); | 
| outb_p | 993 | drivers/net/pi2.c | outb_p(1844 >> 8, tmr0); | 
| outb_p | 211 | drivers/net/wd.c | outb_p(E8390_NODMA + E8390_STOP, nic_addr); | 
| outb_p | 214 | drivers/net/wd.c | outb_p(0xff, nic_addr + EN0_IMR);  /* Enable all interrupts. */ | 
| outb_p | 215 | drivers/net/wd.c | outb_p(0x00, nic_addr + EN0_RCNTLO); | 
| outb_p | 216 | drivers/net/wd.c | outb_p(0x00, nic_addr + EN0_RCNTHI); | 
| outb_p | 219 | drivers/net/wd.c | outb_p(0x00, nic_addr+EN0_IMR);  /* Mask all intrs. again. */ | 
| outb_p | 317 | drivers/scsi/aha152x.h | outb_p( (VAL), (PORT) ) | 
| outb_p | 38 | include/asm-i386/bugs.h | outb_p(0,0xf1); | 
| outb_p | 39 | include/asm-i386/bugs.h | outb_p(0,0xf0); | 
| outb_p | 72 | include/asm-i386/bugs.h | outb_p(inb_p(0x21) | (1 << 2), 0x21); | 
| outb_p | 15 | include/asm-i386/dma.h | #define dma_outb  outb_p | 
| outb_p | 15 | include/asm-mips/dma.h | #define dma_outb  outb_p | 
| outb_p | 22 | include/linux/mc146818rtc.h | outb_p(RTC_ADDR(addr),RTC_PORT(0)); \ | 
| outb_p | 26 | include/linux/mc146818rtc.h | outb_p(RTC_ADDR(addr),RTC_PORT(0)); \ | 
| outb_p | 27 | include/linux/mc146818rtc.h | outb_p(val,RTC_PORT(1)); \ | 
| outb_p | 120 | include/linux/scc.h | #define Outb(port, val)  outb_p(val, port) | 
| outb_p | 199 | kernel/time.c | outb_p(0x00, 0x43);  /* latch the count ASAP */ | 
| outb_p | 205 | kernel/time.c | outb_p(0x0a, 0x20); |