This source file includes following definitions.
- wavelan_splhi
- wavelan_splx
- hasr_read
- hacr_write
- hacr_write_slow
- set_chan_attn
- wavelan_reset
- wavelan_16_off
- wavelan_16_on
- wavelan_ints_off
- wavelan_ints_on
- psa_read
- psa_write
- obram_read
- obram_write
- mmc_read
- mmc_write
- wavelan_unmap_irq
- wavelan_map_irq
- wavelan_mmc_init
- wavelan_ack
- wavelan_synchronous_cmd
- wavelan_hardware_reset
- wavelan_struct_check
- wavelan_probe
- wavelan_probe1
- wavelan_ru_start
- wavelan_cu_start
- wavelan_open
- hardware_send_packet
- wavelan_send_packet
- addrcmp
- wavelan_receive
- wavelan_complete
- wavelan_watchdog
- wavelan_interrupt
- wavelan_close
- wavelan_get_stats
- wavelan_set_multicast_list
- sprintf_stats
- wavelan_get_info
- init_module
- cleanup_module
- wavelan_cu_show_one
- wavelan_psa_show
- wavelan_mmc_show
- wavelan_scb_show
- wavelan_ru_show
- wavelan_cu_show
- wavelan_dev_show
- wavelan_local_show
1
2
3
4
5
6
7 #include <linux/config.h>
8
9 #if defined(MODULE)
10 #include <linux/module.h>
11 #include <linux/version.h>
12 #endif
13
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/types.h>
17 #include <linux/fcntl.h>
18 #include <linux/interrupt.h>
19 #include <linux/ptrace.h>
20 #include <linux/ioport.h>
21 #include <linux/in.h>
22 #include <linux/string.h>
23 #include <linux/delay.h>
24 #include <asm/system.h>
25 #include <asm/bitops.h>
26 #include <asm/io.h>
27 #include <asm/dma.h>
28 #include <linux/errno.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/skbuff.h>
32 #include <linux/malloc.h>
33 #include <linux/timer.h>
34 #include <linux/proc_fs.h>
35 #define STRUCT_CHECK 1
36 #include "i82586.h"
37 #include "wavelan.h"
38
39 #ifndef WAVELAN_DEBUG
40 #define WAVELAN_DEBUG 0
41 #endif
42
43 #define WATCHDOG_JIFFIES 512
44 #define ENABLE_FULL_PROMISCUOUS 0x10000
45
46 #define nels(a) (sizeof(a) / sizeof(a[0]))
47
48 typedef struct device device;
49 typedef struct enet_statistics en_stats;
50 typedef struct net_local net_local;
51 typedef struct timer_list timer_list;
52
53 struct net_local
54 {
55 en_stats stats;
56 unsigned int tx_n_in_use;
57 unsigned char nwid[2];
58 unsigned short hacr;
59 unsigned short rx_head;
60 unsigned short rx_last;
61 unsigned short tx_first_free;
62 unsigned short tx_first_in_use;
63 unsigned int nresets;
64 unsigned int correct_nwid;
65 unsigned int wrong_nwid;
66 unsigned int promiscuous;
67 unsigned int full_promiscuous;
68 timer_list watchdog;
69 device *dev;
70 net_local *prev;
71 net_local *next;
72 };
73
74 extern int wavelan_probe(device *);
75
76 static const char *version = "wavelan.c:v7 95/4/8\n";
77
78
79
80
81 static int wavelan_probe1(device *, unsigned short);
82 static int wavelan_open(device *);
83 static int wavelan_send_packet(struct sk_buff *, device *);
84 static void wavelan_interrupt(int, struct pt_regs *);
85 static int wavelan_close(device *);
86 static en_stats *wavelan_get_stats(device *);
87 static void wavelan_set_multicast_list(device *, int, void *);
88 static int wavelan_get_info(char*, char**, off_t, int, int);
89
90
91
92
93 static void wavelan_cu_show_one(device *, net_local *, int, unsigned short);
94 static void wavelan_cu_start(device *);
95 static void wavelan_ru_start(device *);
96 static void wavelan_watchdog(unsigned long);
97 #if 0
98 static void wavelan_psa_show(psa_t *);
99 static void wavelan_mmc_show(unsigned short);
100 #endif
101 static void wavelan_scb_show(unsigned short);
102 static void wavelan_ru_show(device *);
103 static void wavelan_cu_show(device *);
104 static void wavelan_dev_show(device *);
105 static void wavelan_local_show(device *);
106
107 static unsigned int wavelan_debug = WAVELAN_DEBUG;
108 static net_local *first_wavelan = (net_local *)0;
109
110 static
111 unsigned long
112 wavelan_splhi(void)
113 {
114 unsigned long flags;
115
116 save_flags(flags);
117 cli();
118
119 return flags;
120 }
121
122 static
123 void
124 wavelan_splx(unsigned long flags)
125 {
126 restore_flags(flags);
127 }
128
129 static
130 unsigned short
131 hasr_read(unsigned short ioaddr)
132 {
133 return inw(HASR(ioaddr));
134 }
135
136 static
137 void
138 hacr_write(unsigned short ioaddr, int hacr)
139 {
140 outw(hacr, HACR(ioaddr));
141 }
142
143 static
144 void
145 hacr_write_slow(unsigned short ioaddr, int hacr)
146 {
147 hacr_write(ioaddr, hacr);
148
149 udelay(1000);
150 }
151
152
153
154
155 static
156 void
157 set_chan_attn(unsigned short ioaddr, unsigned short current_hacr)
158 {
159 hacr_write(ioaddr, current_hacr | HACR_CA);
160 }
161
162
163
164
165 static
166 void
167 wavelan_reset(unsigned short ioaddr)
168 {
169 hacr_write_slow(ioaddr, HACR_RESET);
170 hacr_write(ioaddr, HACR_DEFAULT);
171 }
172
173 static
174 void
175 wavelan_16_off(unsigned short ioaddr, unsigned short hacr)
176 {
177 hacr &= ~HACR_16BITS;
178
179 hacr_write(ioaddr, hacr);
180 }
181
182 static
183 void
184 wavelan_16_on(unsigned short ioaddr, unsigned short hacr)
185 {
186 hacr |= HACR_16BITS;
187
188 hacr_write(ioaddr, hacr);
189 }
190
191 static
192 void
193 wavelan_ints_off(device *dev)
194 {
195 unsigned short ioaddr;
196 net_local *lp;
197 unsigned long x;
198
199 ioaddr = dev->base_addr;
200 lp = (net_local *)dev->priv;
201
202 x = wavelan_splhi();
203
204 lp->hacr &= ~HACR_INTRON;
205 hacr_write(ioaddr, lp->hacr);
206
207 wavelan_splx(x);
208 }
209
210 static
211 void
212 wavelan_ints_on(device *dev)
213 {
214 unsigned short ioaddr;
215 net_local *lp;
216 unsigned long x;
217
218 ioaddr = dev->base_addr;
219 lp = (net_local *)dev->priv;
220
221 x = wavelan_splhi();
222
223 lp->hacr |= HACR_INTRON;
224 hacr_write(ioaddr, lp->hacr);
225
226 wavelan_splx(x);
227 }
228
229
230
231
232 static
233 void
234 psa_read(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
235 {
236 wavelan_16_off(ioaddr, hacr);
237
238 while (n-- > 0)
239 {
240 outw(o, PIOR2(ioaddr));
241 o++;
242 *b++ = inb(PIOP2(ioaddr));
243 }
244
245 wavelan_16_on(ioaddr, hacr);
246 }
247
248 #if defined(IRQ_SET_WORKS)
249
250
251
252 static
253 void
254 psa_write(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
255 {
256 wavelan_16_off(ioaddr, hacr);
257
258 while (n-- > 0)
259 {
260 outw(o, PIOR2(ioaddr));
261 o++;
262 outb(*b, PIOP2(ioaddr));
263 b++;
264 }
265
266 wavelan_16_on(ioaddr, hacr);
267 }
268 #endif
269
270
271
272
273 static
274 void
275 obram_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
276 {
277 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
278
279 outw(o, PIOR1(ioaddr));
280
281 insw(PIOP1(ioaddr), (unsigned short *)b, n);
282 }
283
284
285
286
287 static
288 void
289 obram_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
290 {
291 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
292
293 outw(o, PIOR1(ioaddr));
294
295 outsw(PIOP1(ioaddr), (unsigned short *)b, n);
296 }
297
298
299
300
301 static
302 void
303 mmc_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
304 {
305 while (n-- > 0)
306 {
307 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
308 ;
309
310 outw(o << 1, MMCR(ioaddr));
311 o++;
312
313 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
314 ;
315
316 *b++ = (unsigned char)(inw(MMCR(ioaddr)) >> 8);
317 }
318 }
319
320
321
322
323 static
324 void
325 mmc_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
326 {
327 while (n-- > 0)
328 {
329 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
330 ;
331
332 outw((unsigned short)(((unsigned short)*b << 8) | (o << 1) | 1), MMCR(ioaddr));
333 b++;
334 o++;
335 }
336 }
337
338 static int irqvals[] =
339 {
340 0, 0, 0, 0x01,
341 0x02, 0x04, 0, 0x08,
342 0, 0, 0x10, 0x20,
343 0x40, 0, 0, 0x80,
344 };
345
346 #if defined(IRQ_SET_WORKS)
347 static
348 int
349 wavelan_unmap_irq(int irq, unsigned char *irqval)
350 {
351 if (irq < 0 || irq >= nels(irqvals) || irqvals[irq] == 0)
352 return -1;
353
354 *irqval = (unsigned char)irqvals[irq];
355
356 return 0;
357 }
358 #endif
359
360
361
362
363 static
364 int
365 wavelan_map_irq(unsigned char irqval)
366 {
367 int irq;
368
369 for (irq = 0; irq < nels(irqvals); irq++)
370 {
371 if (irqvals[irq] == (int)irqval)
372 return irq;
373 }
374
375 return -1;
376 }
377
378
379
380
381 static
382 void
383 wavelan_mmc_init(device *dev, psa_t *psa)
384 {
385 unsigned short ioaddr;
386 net_local *lp;
387 mmw_t m;
388 int configured;
389
390 ioaddr = dev->base_addr;
391 lp = (net_local *)dev->priv;
392 memset(&m, 0x00, sizeof(m));
393
394
395
396
397
398
399
400
401
402 configured = 0;
403
404
405
406
407
408 m.mmw_jabber_enable = 0x01;
409 m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
410 m.mmw_ifs = 0x20;
411 m.mmw_mod_delay = 0x04;
412 m.mmw_jam_time = 0x38;
413
414 m.mmw_encr_enable = 0;
415 m.mmw_des_io_invert = 0;
416 m.mmw_freeze = 0;
417 m.mmw_decay_prm = 0;
418 m.mmw_decay_updat_prm = 0;
419
420 if (configured)
421 {
422
423
424
425 if (psa->psa_undefined & 1)
426 m.mmw_loopt_sel = 0x00;
427 else
428 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
429
430 m.mmw_thr_pre_set = psa->psa_thr_pre_set & 0x3F;
431 m.mmw_quality_thr = psa->psa_quality_thr & 0x0F;
432 }
433 else
434 {
435 if (lp->promiscuous && lp->full_promiscuous)
436 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
437 else
438 m.mmw_loopt_sel = 0x00;
439
440
441
442
443
444 if (psa->psa_comp_number & 1)
445 m.mmw_thr_pre_set = 0x01;
446 else
447 m.mmw_thr_pre_set = 0x04;
448
449 m.mmw_quality_thr = 0x03;
450 }
451
452 m.mmw_netw_id_l = lp->nwid[1];
453 m.mmw_netw_id_h = lp->nwid[0];
454
455 mmc_write(ioaddr, 0, (unsigned char *)&m, sizeof(m));
456 }
457
458 static
459 void
460 wavelan_ack(device *dev)
461 {
462 unsigned short ioaddr;
463 net_local *lp;
464 unsigned short scb_cs;
465 int i;
466
467 ioaddr = dev->base_addr;
468 lp = (net_local *)dev->priv;
469
470 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
471 scb_cs &= SCB_ST_INT;
472
473 if (scb_cs == 0)
474 return;
475
476 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
477
478 set_chan_attn(ioaddr, lp->hacr);
479
480 for (i = 1000; i > 0; i--)
481 {
482 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
483 if (scb_cs == 0)
484 break;
485
486 udelay(1000);
487 }
488
489 if (i <= 0)
490 printk("%s: wavelan_ack(): board not accepting command.\n", dev->name);
491 }
492
493
494
495
496
497 static
498 int
499 wavelan_synchronous_cmd(device *dev, const char *str)
500 {
501 unsigned short ioaddr;
502 net_local *lp;
503 unsigned short scb_cmd;
504 ach_t cb;
505 int i;
506
507 ioaddr = dev->base_addr;
508 lp = (net_local *)dev->priv;
509
510 scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO;
511 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
512
513 set_chan_attn(ioaddr, lp->hacr);
514
515 for (i = 64; i > 0; i--)
516 {
517 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
518 if (cb.ac_status & AC_SFLD_C)
519 break;
520
521 udelay(1000);
522 }
523
524 if (i <= 0 || !(cb.ac_status & AC_SFLD_OK))
525 {
526 printk("%s: %s failed; status = 0x%x\n", dev->name, str, cb.ac_status);
527 wavelan_scb_show(ioaddr);
528 return -1;
529 }
530
531 wavelan_ack(dev);
532
533 return 0;
534 }
535
536 static
537 int
538 wavelan_hardware_reset(device *dev)
539 {
540 unsigned short ioaddr;
541 psa_t psa;
542 net_local *lp;
543 scp_t scp;
544 iscp_t iscp;
545 scb_t scb;
546 ach_t cb;
547 int i;
548 ac_cfg_t cfg;
549 ac_ias_t ias;
550
551 if (wavelan_debug > 0)
552 printk("%s: ->wavelan_hardware_reset(dev=0x%x)\n", dev->name, (unsigned int)dev);
553
554 ioaddr = dev->base_addr;
555 lp = (net_local *)dev->priv;
556
557 lp->nresets++;
558
559 wavelan_reset(ioaddr);
560 lp->hacr = HACR_DEFAULT;
561
562
563
564
565 {
566 unsigned char zeroes[512];
567
568 memset(&zeroes[0], 0x00, sizeof(zeroes));
569
570 for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes))
571 obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes));
572 }
573
574 psa_read(ioaddr, lp->hacr, 0, (unsigned char *)&psa, sizeof(psa));
575
576 wavelan_mmc_init(dev, &psa);
577
578
579
580
581
582 memset(&scp, 0x00, sizeof(scp));
583 scp.scp_sysbus = SCP_SY_16BBUS;
584 scp.scp_iscpl = OFFSET_ISCP;
585 obram_write(ioaddr, OFFSET_SCP, (unsigned char *)&scp, sizeof(scp));
586
587 memset(&iscp, 0x00, sizeof(iscp));
588 iscp.iscp_busy = 1;
589 iscp.iscp_offset = OFFSET_SCB;
590 obram_write(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
591
592 memset(&scb, 0x00, sizeof(scb));
593 scb.scb_command = SCB_CMD_RESET;
594 scb.scb_cbl_offset = OFFSET_CU;
595 scb.scb_rfa_offset = OFFSET_RU;
596 obram_write(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
597
598 set_chan_attn(ioaddr, lp->hacr);
599
600 for (i = 1000; i > 0; i--)
601 {
602 obram_read(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
603
604 if (iscp.iscp_busy == (unsigned short)0)
605 break;
606
607 udelay(1000);
608 }
609
610 if (i <= 0)
611 {
612 printk("%s: wavelan_hardware_reset(): iscp_busy timeout.\n", dev->name);
613 if (wavelan_debug > 0)
614 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
615 return -1;
616 }
617
618 for (i = 15; i > 0; i--)
619 {
620 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
621
622 if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA))
623 break;
624
625 udelay(1000);
626 }
627
628 if (i <= 0)
629 {
630 printk("%s: wavelan_hardware_reset(): status: expected 0x%02x, got 0x%02x.\n", dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status);
631 if (wavelan_debug > 0)
632 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
633 return -1;
634 }
635
636 wavelan_ack(dev);
637
638 memset(&cb, 0x00, sizeof(cb));
639 cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose);
640 cb.ac_link = OFFSET_CU;
641 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
642
643 if (wavelan_synchronous_cmd(dev, "diag()") == -1)
644 {
645 if (wavelan_debug > 0)
646 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
647 return -1;
648 }
649
650 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
651 if (cb.ac_status & AC_SFLD_FAIL)
652 {
653 printk("%s: wavelan_hardware_reset(): i82586 Self Test failed.\n", dev->name);
654 if (wavelan_debug > 0)
655 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
656 return -1;
657 }
658
659 memset(&cfg, 0x00, sizeof(cfg));
660
661 #if 0
662
663
664
665 cfg.fifolim_bytecnt = 0x080c;
666 cfg.addrlen_mode = 0x2600;
667 cfg.linprio_interframe = 0x7820;
668 cfg.slot_time = 0xf00c;
669 cfg.hardware = 0x0008;
670 cfg.min_frame_len = 0x0040;
671 #endif
672
673
674
675
676
677
678 cfg.cfg_byte_cnt = AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t));
679 cfg.cfg_fifolim = AC_CFG_FIFOLIM(8);
680 cfg.cfg_byte8 = AC_CFG_SAV_BF(0) |
681 AC_CFG_SRDY(0);
682 cfg.cfg_byte9 = AC_CFG_ELPBCK(0) |
683 AC_CFG_ILPBCK(0) |
684 AC_CFG_PRELEN(AC_CFG_PLEN_2) |
685 AC_CFG_ALOC(1) |
686 AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE);
687 cfg.cfg_byte10 = AC_CFG_BOFMET(0) |
688 AC_CFG_ACR(0) |
689 AC_CFG_LINPRIO(0);
690 cfg.cfg_ifs = 32;
691 cfg.cfg_slotl = 0;
692 cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) |
693 AC_CFG_SLTTMHI(2);
694 cfg.cfg_byte14 = AC_CFG_FLGPAD(0) |
695 AC_CFG_BTSTF(0) |
696 AC_CFG_CRC16(0) |
697 AC_CFG_NCRC(0) |
698 AC_CFG_TNCRS(1) |
699 AC_CFG_MANCH(0) |
700 AC_CFG_BCDIS(0) |
701 AC_CFG_PRM(lp->promiscuous);
702 cfg.cfg_byte15 = AC_CFG_ICDS(0) |
703 AC_CFG_CDTF(0) |
704 AC_CFG_ICSS(0) |
705 AC_CFG_CSTF(0);
706
707
708
709 cfg.cfg_min_frm_len = AC_CFG_MNFRM(8);
710
711 cfg.cfg_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_configure);
712 cfg.cfg_h.ac_link = OFFSET_CU;
713 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cfg, sizeof(cfg));
714
715 if (wavelan_synchronous_cmd(dev, "reset()-configure") == -1)
716 {
717 if (wavelan_debug > 0)
718 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
719
720 return -1;
721 }
722
723 memset(&ias, 0x00, sizeof(ias));
724 ias.ias_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_ia_setup);
725 ias.ias_h.ac_link = OFFSET_CU;
726 memcpy(&ias.ias_addr[0], (unsigned char *)&dev->dev_addr[0], sizeof(ias.ias_addr));
727 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&ias, sizeof(ias));
728
729 if (wavelan_synchronous_cmd(dev, "reset()-address") == -1)
730 {
731 if (wavelan_debug > 0)
732 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
733
734 return -1;
735 }
736
737 wavelan_ints_on(dev);
738
739 if (wavelan_debug > 4)
740 wavelan_scb_show(ioaddr);
741
742 wavelan_ru_start(dev);
743 wavelan_cu_start(dev);
744
745 if (wavelan_debug > 0)
746 printk("%s: <-wavelan_hardware_reset(): 0\n", dev->name);
747
748 return 0;
749 }
750
751 #if STRUCT_CHECK == 1
752
753 static
754 const char *
755 wavelan_struct_check(void)
756 {
757 #define SC(t,s,n) if (sizeof(t) != s) return n
758 SC(psa_t, PSA_SIZE, "psa_t");
759 SC(mmw_t, MMW_SIZE, "mmw_t");
760 SC(mmr_t, MMR_SIZE, "mmr_t");
761 SC(ha_t, HA_SIZE, "ha_t");
762 #undef SC
763
764 return (char *)0;
765 }
766
767 #endif
768
769
770
771
772
773
774
775
776 int
777 wavelan_probe(device *dev)
778 {
779 int i;
780 int r;
781 short base_addr;
782 static unsigned short iobase[] =
783 {
784 #if 0
785 Leave out 0x3C0 for now -- seems to clash
786 with some video controllers.
787 Leave out the others too -- we will always
788 use 0x390 and leave 0x300 for the Ethernet device.
789 0x300, 0x390, 0x3E0, 0x3C0,
790 #endif
791 0x390,
792 };
793
794 if (wavelan_debug > 0)
795 printk("%s: ->wavelan_probe(dev=0x%x (base_addr=0x%x))\n", dev->name, (unsigned int)dev, (unsigned int)dev->base_addr);
796
797 #if STRUCT_CHECK == 1
798 if (wavelan_struct_check() != (char *)0)
799 {
800 printk("%s: structure/compiler botch: \"%s\"\n", dev->name, wavelan_struct_check());
801
802 if (wavelan_debug > 0)
803 printk("%s: <-wavelan_probe(): ENODEV\n", dev->name);
804
805 return ENODEV;
806 }
807 #endif
808
809 base_addr = dev->base_addr;
810
811 if (base_addr < 0)
812 {
813
814
815
816 if (wavelan_debug > 0)
817 printk("%s: <-wavelan_probe(): ENXIO\n", dev->name);
818 return ENXIO;
819 }
820
821 if (base_addr > 0x100)
822 {
823
824
825
826 r = wavelan_probe1(dev, base_addr);
827 if (wavelan_debug > 0)
828 printk("%s: <-wavelan_probe(): %d\n", dev->name, r);
829 return r;
830 }
831
832 for (i = 0; i < nels(iobase); i++)
833 {
834 if (check_region(iobase[i], sizeof(ha_t)))
835 continue;
836
837 if (wavelan_probe1(dev, iobase[i]) == 0)
838 {
839 if (wavelan_debug > 0)
840 printk("%s: <-wavelan_probe(): 0\n", dev->name);
841 proc_net_register(&(struct proc_dir_entry)
842 { PROC_NET_WAVELAN, wavelan_get_info,
843 7, "wavelan" });
844
845 return 0;
846 }
847 }
848
849 if (wavelan_debug > 0)
850 printk("%s: <-wavelan_probe(): ENODEV\n", dev->name);
851
852 return ENODEV;
853 }
854
855 static
856 int
857 wavelan_probe1(device *dev, unsigned short ioaddr)
858 {
859 psa_t psa;
860 int irq;
861 int i;
862 net_local *lp;
863 int enable_full_promiscuous;
864
865 if (wavelan_debug > 0)
866 printk("%s: ->wavelan_probe1(dev=0x%x, ioaddr=0x%x)\n", dev->name, (unsigned int)dev, ioaddr);
867
868 wavelan_reset(ioaddr);
869
870 psa_read(ioaddr, HACR_DEFAULT, 0, (unsigned char *)&psa, sizeof(psa));
871
872
873
874
875
876 if
877 (
878 psa.psa_univ_mac_addr[0] != SA_ADDR0
879 ||
880 psa.psa_univ_mac_addr[1] != SA_ADDR1
881 ||
882 psa.psa_univ_mac_addr[2] != SA_ADDR2
883 )
884 {
885 if (wavelan_debug > 0)
886 printk("%s: <-wavelan_probe1(): ENODEV\n", dev->name);
887 return ENODEV;
888 }
889
890 printk("%s: WaveLAN at %#x,", dev->name, ioaddr);
891
892 if (dev->irq != 0)
893 {
894 printk("[WARNING: explicit IRQ value %d ignored: using PSA value instead]", dev->irq);
895 #if defined(IRQ_SET_WORKS)
896 Leave this out until I can get it to work -- BJ.
897 if (wavelan_unmap_irq(dev->irq, &psa.psa_int_req_no) == -1)
898 {
899 printk(" could not wavelan_unmap_irq(%d, ..) -- ignored.\n", dev->irq);
900 dev->irq = 0;
901 }
902 else
903 {
904 psa_write(ioaddr, HACR_DEFAULT, (char *)&psa.psa_int_req_no - (char *)&psa, (unsigned char *)&psa.psa_int_req_no, sizeof(psa.psa_int_req_no));
905 wavelan_reset(ioaddr);
906 }
907 #endif
908 }
909
910 if ((irq = wavelan_map_irq(psa.psa_int_req_no)) == -1)
911 {
912 printk(" could not wavelan_map_irq(%d).\n", psa.psa_int_req_no);
913 if (wavelan_debug > 0)
914 printk("%s: <-wavelan_probe1(): EAGAIN\n", dev->name);
915 return EAGAIN;
916 }
917
918 dev->irq = irq;
919
920 request_region(ioaddr, sizeof(ha_t), "wavelan");
921 dev->base_addr = ioaddr;
922
923
924
925
926
927
928
929
930
931
932
933
934 enable_full_promiscuous = (dev->mem_start & ENABLE_FULL_PROMISCUOUS) == ENABLE_FULL_PROMISCUOUS;
935 dev->mem_start &= ~ENABLE_FULL_PROMISCUOUS;
936
937 if (dev->mem_start != 0)
938 {
939 psa.psa_nwid[0] = (dev->mem_start >> 8) & 0xFF;
940 psa.psa_nwid[1] = (dev->mem_start >> 0) & 0xFF;
941 }
942
943 dev->mem_start = 0x0000;
944 dev->mem_end = 0x0000;
945 dev->if_port = 0;
946
947 memcpy(&dev->dev_addr[0], &psa.psa_univ_mac_addr[0], WAVELAN_ADDR_SIZE);
948
949 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
950 printk("%s%02x", (i == 0) ? " " : ":", dev->dev_addr[i]);
951
952 printk(", IRQ %d", dev->irq);
953 if (enable_full_promiscuous)
954 printk(", promisc");
955 printk(", nwid 0x%02x%02x", psa.psa_nwid[0], psa.psa_nwid[1]);
956
957 printk(", PC");
958 switch (psa.psa_comp_number)
959 {
960 case PSA_COMP_PC_AT_915:
961 case PSA_COMP_PC_AT_2400:
962 printk("-AT");
963 break;
964
965 case PSA_COMP_PC_MC_915:
966 case PSA_COMP_PC_MC_2400:
967 printk("-MC");
968 break;
969
970 case PSA_COMP_PCMCIA_915:
971 printk("MCIA");
972 break;
973
974 default:
975 printk("???");
976 break;
977 }
978
979 printk(", ");
980 switch (psa.psa_subband)
981 {
982 case PSA_SUBBAND_915:
983 printk("915");
984 break;
985
986 case PSA_SUBBAND_2425:
987 printk("2425");
988 break;
989
990 case PSA_SUBBAND_2460:
991 printk("2460");
992 break;
993
994 case PSA_SUBBAND_2484:
995 printk("2484");
996 break;
997
998 case PSA_SUBBAND_2430_5:
999 printk("2430.5");
1000 break;
1001
1002 default:
1003 printk("???");
1004 break;
1005 }
1006 printk(" MHz");
1007
1008 printk("\n");
1009
1010 if (wavelan_debug > 0)
1011 printk(version);
1012
1013 dev->priv = kmalloc(sizeof(net_local), GFP_KERNEL);
1014 memset(dev->priv, 0x00, sizeof(net_local));
1015 lp = (net_local *)dev->priv;
1016
1017 if (first_wavelan == (net_local *)0)
1018 {
1019 first_wavelan = lp;
1020 lp->prev = lp;
1021 lp->next = lp;
1022 }
1023 else
1024 {
1025 lp->prev = first_wavelan->prev;
1026 lp->next = first_wavelan;
1027 first_wavelan->prev->next = lp;
1028 first_wavelan->prev = lp;
1029 }
1030 lp->dev = dev;
1031
1032 lp->hacr = HACR_DEFAULT;
1033
1034 lp->full_promiscuous = enable_full_promiscuous;
1035 lp->nwid[0] = psa.psa_nwid[0];
1036 lp->nwid[1] = psa.psa_nwid[1];
1037
1038 lp->watchdog.function = wavelan_watchdog;
1039 lp->watchdog.data = (unsigned long)dev;
1040
1041 dev->open = wavelan_open;
1042 dev->stop = wavelan_close;
1043 dev->hard_start_xmit = wavelan_send_packet;
1044 dev->get_stats = wavelan_get_stats;
1045 dev->set_multicast_list = &wavelan_set_multicast_list;
1046
1047
1048
1049
1050
1051 ether_setup(dev);
1052
1053 dev->mtu = WAVELAN_MTU;
1054
1055 if (wavelan_debug > 0)
1056 printk("%s: <-wavelan_probe1(): 0\n", dev->name);
1057
1058 return 0;
1059 }
1060
1061
1062
1063
1064
1065 static
1066 void
1067 wavelan_ru_start(device *dev)
1068 {
1069 unsigned short ioaddr;
1070 net_local *lp;
1071 unsigned short scb_cs;
1072 fd_t fd;
1073 rbd_t rbd;
1074 unsigned short rx;
1075 unsigned short rx_next;
1076 int i;
1077
1078 ioaddr = dev->base_addr;
1079 lp = (net_local *)dev->priv;
1080
1081 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
1082 if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY)
1083 return;
1084
1085 lp->rx_head = OFFSET_RU;
1086
1087 for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next)
1088 {
1089 rx_next = (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ;
1090
1091 fd.fd_status = 0;
1092 fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0;
1093 fd.fd_link_offset = rx_next;
1094 fd.fd_rbd_offset = rx + sizeof(fd);
1095 obram_write(ioaddr, rx, (unsigned char *)&fd, sizeof(fd));
1096
1097 rbd.rbd_status = 0;
1098 rbd.rbd_next_rbd_offset = I82586NULL;
1099 rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd);
1100 rbd.rbd_bufh = 0;
1101 rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ);
1102 obram_write(ioaddr, rx + sizeof(fd), (unsigned char *)&rbd, sizeof(rbd));
1103
1104 lp->rx_last = rx;
1105 }
1106
1107 obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset), (unsigned char *)&lp->rx_head, sizeof(lp->rx_head));
1108
1109 scb_cs = SCB_CMD_RUC_GO;
1110 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1111
1112 set_chan_attn(ioaddr, lp->hacr);
1113
1114 for (i = 1000; i > 0; i--)
1115 {
1116 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1117 if (scb_cs == 0)
1118 break;
1119
1120 udelay(1000);
1121 }
1122
1123 if (i <= 0)
1124 printk("%s: wavelan_ru_start(): board not accepting command.\n", dev->name);
1125 }
1126
1127
1128
1129
1130
1131
1132 static
1133 void
1134 wavelan_cu_start(device *dev)
1135 {
1136 unsigned short ioaddr;
1137 net_local *lp;
1138 int i;
1139 unsigned short txblock;
1140 unsigned short first_nop;
1141 unsigned short scb_cs;
1142
1143 ioaddr = dev->base_addr;
1144 lp = (net_local *)dev->priv;
1145
1146 lp->tx_first_free = OFFSET_CU;
1147 lp->tx_first_in_use = I82586NULL;
1148
1149 for
1150 (
1151 i = 0, txblock = OFFSET_CU;
1152 i < NTXBLOCKS;
1153 i++, txblock += TXBLOCKZ
1154 )
1155 {
1156 ac_tx_t tx;
1157 ac_nop_t nop;
1158 tbd_t tbd;
1159 unsigned short tx_addr;
1160 unsigned short nop_addr;
1161 unsigned short tbd_addr;
1162 unsigned short buf_addr;
1163
1164 tx_addr = txblock;
1165 nop_addr = tx_addr + sizeof(tx);
1166 tbd_addr = nop_addr + sizeof(nop);
1167 buf_addr = tbd_addr + sizeof(tbd);
1168
1169 tx.tx_h.ac_status = 0;
1170 tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I;
1171 tx.tx_h.ac_link = nop_addr;
1172 tx.tx_tbd_offset = tbd_addr;
1173 obram_write(ioaddr, tx_addr, (unsigned char *)&tx, sizeof(tx));
1174
1175 nop.nop_h.ac_status = 0;
1176 nop.nop_h.ac_command = acmd_nop;
1177 nop.nop_h.ac_link = nop_addr;
1178 obram_write(ioaddr, nop_addr, (unsigned char *)&nop, sizeof(nop));
1179
1180 tbd.tbd_status = TBD_STATUS_EOF;
1181 tbd.tbd_next_bd_offset = I82586NULL;
1182 tbd.tbd_bufl = buf_addr;
1183 tbd.tbd_bufh = 0;
1184 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1185 }
1186
1187 first_nop = OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t);
1188 obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset), (unsigned char *)&first_nop, sizeof(first_nop));
1189
1190 scb_cs = SCB_CMD_CUC_GO;
1191 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1192
1193 set_chan_attn(ioaddr, lp->hacr);
1194
1195 for (i = 1000; i > 0; i--)
1196 {
1197 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1198 if (scb_cs == 0)
1199 break;
1200
1201 udelay(1000);
1202 }
1203
1204 if (i <= 0)
1205 printk("%s: wavelan_cu_start(): board not accepting command.\n", dev->name);
1206
1207 lp->tx_n_in_use = 0;
1208 dev->tbusy = 0;
1209 }
1210
1211 static
1212 int
1213 wavelan_open(device *dev)
1214 {
1215 unsigned short ioaddr;
1216 net_local *lp;
1217 unsigned long x;
1218 int r;
1219
1220 if (wavelan_debug > 0)
1221 printk("%s: ->wavelan_open(dev=0x%x)\n", dev->name, (unsigned int)dev);
1222
1223 ioaddr = dev->base_addr;
1224 lp = (net_local *)dev->priv;
1225
1226 if (dev->irq == 0)
1227 {
1228 if (wavelan_debug > 0)
1229 printk("%s: <-wavelan_open(): -ENXIO\n", dev->name);
1230 return -ENXIO;
1231 }
1232
1233 if
1234 (
1235 irq2dev_map[dev->irq] != (device *)0
1236
1237 ||
1238 (irq2dev_map[dev->irq] = dev) == (device *)0
1239 ||
1240 request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN") != 0
1241 )
1242 {
1243 irq2dev_map[dev->irq] = (device *)0;
1244 if (wavelan_debug > 0)
1245 printk("%s: <-wavelan_open(): -EAGAIN\n", dev->name);
1246 return -EAGAIN;
1247 }
1248
1249 x = wavelan_splhi();
1250 if ((r = wavelan_hardware_reset(dev)) != -1)
1251 {
1252 dev->interrupt = 0;
1253 dev->start = 1;
1254 }
1255 wavelan_splx(x);
1256
1257 if (r == -1)
1258 {
1259 free_irq(dev->irq);
1260 irq2dev_map[dev->irq] = (device *)0;
1261 if (wavelan_debug > 0)
1262 printk("%s: <-wavelan_open(): -EAGAIN(2)\n", dev->name);
1263 return -EAGAIN;
1264 }
1265
1266 #if defined(MODULE)
1267 MOD_INC_USE_COUNT;
1268 #endif
1269
1270 if (wavelan_debug > 0)
1271 printk("%s: <-wavelan_open(): 0\n", dev->name);
1272
1273 return 0;
1274 }
1275
1276 static
1277 void
1278 hardware_send_packet(device *dev, void *buf, short length)
1279 {
1280 unsigned short ioaddr;
1281 net_local *lp;
1282 unsigned short txblock;
1283 unsigned short txpred;
1284 unsigned short tx_addr;
1285 unsigned short nop_addr;
1286 unsigned short tbd_addr;
1287 unsigned short buf_addr;
1288 ac_tx_t tx;
1289 ac_nop_t nop;
1290 tbd_t tbd;
1291 unsigned long x;
1292
1293 ioaddr = dev->base_addr;
1294 lp = (net_local *)dev->priv;
1295
1296 x = wavelan_splhi();
1297
1298 txblock = lp->tx_first_free;
1299 txpred = txblock - TXBLOCKZ;
1300 if (txpred < OFFSET_CU)
1301 txpred += NTXBLOCKS * TXBLOCKZ;
1302 lp->tx_first_free += TXBLOCKZ;
1303 if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1304 lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
1305
1306
1307
1308
1309
1310
1311 lp->tx_n_in_use++;
1312
1313 tx_addr = txblock;
1314 nop_addr = tx_addr + sizeof(tx);
1315 tbd_addr = nop_addr + sizeof(nop);
1316 buf_addr = tbd_addr + sizeof(tbd);
1317
1318
1319
1320
1321 tx.tx_h.ac_status = 0;
1322 obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status), (unsigned char *)&tx.tx_h.ac_status, sizeof(tx.tx_h.ac_status));
1323
1324
1325
1326
1327 nop.nop_h.ac_status = 0;
1328 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1329 nop.nop_h.ac_link = nop_addr;
1330 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1331
1332
1333
1334
1335 tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & length);
1336 tbd.tbd_next_bd_offset = I82586NULL;
1337 tbd.tbd_bufl = buf_addr;
1338 tbd.tbd_bufh = 0;
1339 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1340
1341
1342
1343
1344 obram_write(ioaddr, buf_addr, buf, length);
1345
1346
1347
1348
1349
1350 nop_addr = txpred + sizeof(tx);
1351 nop.nop_h.ac_status = 0;
1352 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1353 nop.nop_h.ac_link = txblock;
1354 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1355
1356 if (lp->tx_first_in_use == I82586NULL)
1357 lp->tx_first_in_use = txblock;
1358
1359 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1360 dev->tbusy = 0;
1361
1362 dev->trans_start = jiffies;
1363
1364 if (lp->watchdog.next == (timer_list *)0)
1365 wavelan_watchdog((unsigned long)dev);
1366
1367 wavelan_splx(x);
1368
1369 if (wavelan_debug > 4)
1370 {
1371 unsigned char *a;
1372
1373 a = (unsigned char *)buf;
1374
1375 printk
1376 (
1377 "%s: tx: dest %02x:%02x:%02x:%02x:%02x:%02x, length %d, tbd.tbd_bufl 0x%x.\n",
1378 dev->name,
1379 a[0], a[1], a[2], a[3], a[4], a[5],
1380 length,
1381 buf_addr
1382 );
1383 }
1384 }
1385
1386 static
1387 int
1388 wavelan_send_packet(struct sk_buff *skb, device *dev)
1389 {
1390 unsigned short ioaddr;
1391
1392 ioaddr = dev->base_addr;
1393
1394 if (dev->tbusy)
1395 {
1396
1397
1398
1399
1400 int tickssofar;
1401
1402 tickssofar = jiffies - dev->trans_start;
1403
1404
1405
1406
1407
1408
1409
1410
1411 return 1;
1412
1413 wavelan_scb_show(ioaddr);
1414 wavelan_ru_show(dev);
1415 wavelan_cu_show(dev);
1416 wavelan_dev_show(dev);
1417 wavelan_local_show(dev);
1418
1419 printk("%s: transmit timed out -- resetting board.\n", dev->name);
1420
1421 (void)wavelan_hardware_reset(dev);
1422 }
1423
1424
1425
1426
1427
1428
1429 if (skb == (struct sk_buff *)0)
1430 {
1431 dev_tint(dev);
1432 return 0;
1433 }
1434
1435
1436
1437
1438 if (set_bit(0, (void *)&dev->tbusy) == 0)
1439 {
1440 short length;
1441 unsigned char *buf;
1442
1443 length = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
1444 buf = skb->data;
1445
1446 hardware_send_packet(dev, buf, length);
1447 }
1448 else
1449 printk("%s: Transmitter access conflict.\n", dev->name);
1450
1451 dev_kfree_skb(skb, FREE_WRITE);
1452
1453 return 0;
1454 }
1455
1456 #if 0
1457 static
1458 int
1459 addrcmp(unsigned char *a0, unsigned char *a1)
1460 {
1461 int i;
1462
1463 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1464 {
1465 if (a0[i] != a1[i])
1466 return a0[i] - a1[i];
1467 }
1468
1469 return 0;
1470 }
1471 #endif
1472
1473
1474
1475
1476
1477
1478 static
1479 void
1480 wavelan_receive(device *dev)
1481 {
1482 unsigned short ioaddr;
1483 net_local *lp;
1484 int nreaped;
1485
1486 ioaddr = dev->base_addr;
1487 lp = (net_local *)dev->priv;
1488 nreaped = 0;
1489
1490 for (;;)
1491 {
1492 fd_t fd;
1493 rbd_t rbd;
1494 ushort pkt_len;
1495 int sksize;
1496 struct sk_buff *skb;
1497
1498 obram_read(ioaddr, lp->rx_head, (unsigned char *)&fd, sizeof(fd));
1499
1500 if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C)
1501 break;
1502
1503 nreaped++;
1504
1505 if
1506 (
1507 (fd.fd_status & (FD_STATUS_B | FD_STATUS_OK))
1508 !=
1509 (FD_STATUS_B | FD_STATUS_OK)
1510 )
1511 {
1512
1513
1514
1515
1516
1517
1518
1519 if ((fd.fd_status & FD_STATUS_OK) != FD_STATUS_OK)
1520 printk("%s: frame not received successfully.\n", dev->name);
1521 }
1522
1523 if ((fd.fd_status & (FD_STATUS_S6 | FD_STATUS_S7 | FD_STATUS_S8 | FD_STATUS_S9 | FD_STATUS_S10 | FD_STATUS_S11)) != 0)
1524 {
1525 lp->stats.rx_errors++;
1526
1527 if ((fd.fd_status & FD_STATUS_S6) != 0)
1528 printk("%s: no EOF flag.\n", dev->name);
1529
1530 if ((fd.fd_status & FD_STATUS_S7) != 0)
1531 {
1532 lp->stats.rx_length_errors++;
1533 printk("%s: frame too short.\n", dev->name);
1534 }
1535
1536 if ((fd.fd_status & FD_STATUS_S8) != 0)
1537 {
1538 lp->stats.rx_over_errors++;
1539 printk("%s: rx DMA overrun.\n", dev->name);
1540 }
1541
1542 if ((fd.fd_status & FD_STATUS_S9) != 0)
1543 {
1544 lp->stats.rx_fifo_errors++;
1545 printk("%s: ran out of resources.\n", dev->name);
1546 }
1547
1548 if ((fd.fd_status & FD_STATUS_S10) != 0)
1549 {
1550 lp->stats.rx_frame_errors++;
1551 printk("%s: alignment error.\n", dev->name);
1552 }
1553
1554 if ((fd.fd_status & FD_STATUS_S11) != 0)
1555 {
1556 lp->stats.rx_crc_errors++;
1557 printk("%s: CRC error.\n", dev->name);
1558 }
1559 }
1560
1561 if (fd.fd_rbd_offset == I82586NULL)
1562 printk("%s: frame has no data.\n", dev->name);
1563 else
1564 {
1565 obram_read(ioaddr, fd.fd_rbd_offset, (unsigned char *)&rbd, sizeof(rbd));
1566
1567 if ((rbd.rbd_status & RBD_STATUS_EOF) != RBD_STATUS_EOF)
1568 printk("%s: missing EOF flag.\n", dev->name);
1569
1570 if ((rbd.rbd_status & RBD_STATUS_F) != RBD_STATUS_F)
1571 printk("%s: missing F flag.\n", dev->name);
1572
1573 pkt_len = rbd.rbd_status & RBD_STATUS_ACNT;
1574
1575 #if 0
1576 {
1577 unsigned char addr[WAVELAN_ADDR_SIZE];
1578 int i;
1579 static unsigned char toweraddr[WAVELAN_ADDR_SIZE] =
1580 {
1581 0x08, 0x00, 0x0e, 0x20, 0x3e, 0xd3,
1582 };
1583
1584 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1585 if
1586 (
1587
1588
1589
1590
1591 addrcmp(&addr[0], toweraddr) != 0
1592 )
1593 {
1594 printk("%s: foreign MAC source addr=", dev->name);
1595 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1596 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1597 printk("\n");
1598 }
1599 }
1600 #endif
1601
1602 if (wavelan_debug > 5)
1603 {
1604 unsigned char addr[WAVELAN_ADDR_SIZE];
1605 unsigned short ltype;
1606 int i;
1607
1608 #if 0
1609 printk("%s: fd_dest=", dev->name);
1610 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1611 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_dest[i]);
1612 printk("\n");
1613
1614 printk("%s: fd_src=", dev->name);
1615 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1616 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_src[i]);
1617 printk("\n");
1618 printk("%s: fd_length=%d\n", dev->name, fd.fd_length);
1619 #endif
1620
1621 obram_read(ioaddr, rbd.rbd_bufl, &addr[0], sizeof(addr));
1622 printk("%s: dest=", dev->name);
1623 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1624 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1625 printk("\n");
1626
1627 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1628 printk("%s: src=", dev->name);
1629 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1630 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1631 printk("\n");
1632
1633 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr) * 2, (unsigned char *)<ype, sizeof(ltype));
1634 printk("%s: ntohs(length/type)=0x%04x\n", dev->name, ntohs(ltype));
1635 }
1636
1637 sksize = pkt_len;
1638
1639 if ((skb = dev_alloc_skb(sksize)) == (struct sk_buff *)0)
1640 {
1641 printk("%s: could not alloc_skb(%d, GFP_ATOMIC).\n", dev->name, sksize);
1642 lp->stats.rx_dropped++;
1643 }
1644 else
1645 {
1646 skb->dev = dev;
1647
1648 obram_read(ioaddr, rbd.rbd_bufl, skb_put(skb,pkt_len), pkt_len);
1649
1650 if (wavelan_debug > 5)
1651 {
1652 int i;
1653 int maxi;
1654
1655 printk("%s: pkt_len=%d, data=\"", dev->name, pkt_len);
1656
1657 if ((maxi = pkt_len) > 16)
1658 maxi = 16;
1659
1660 for (i = 0; i < maxi; i++)
1661 {
1662 unsigned char c;
1663
1664 c = skb->data[i];
1665 if (c >= ' ' && c <= '~')
1666 printk(" %c", skb->data[i]);
1667 else
1668 printk("%02x", skb->data[i]);
1669 }
1670
1671 if (maxi < pkt_len)
1672 printk("..");
1673
1674 printk("\"\n\n");
1675 }
1676
1677 skb->protocol=eth_type_trans(skb,dev);
1678 netif_rx(skb);
1679
1680 lp->stats.rx_packets++;
1681 }
1682 }
1683
1684 fd.fd_status = 0;
1685 obram_write(ioaddr, fdoff(lp->rx_head, fd_status), (unsigned char *)&fd.fd_status, sizeof(fd.fd_status));
1686
1687 fd.fd_command = FD_COMMAND_EL;
1688 obram_write(ioaddr, fdoff(lp->rx_head, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1689
1690 fd.fd_command = 0;
1691 obram_write(ioaddr, fdoff(lp->rx_last, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1692
1693 lp->rx_last = lp->rx_head;
1694 lp->rx_head = fd.fd_link_offset;
1695 }
1696
1697
1698
1699
1700
1701 }
1702
1703
1704
1705
1706
1707 static
1708 int
1709 wavelan_complete(device *dev, unsigned short ioaddr, net_local *lp)
1710 {
1711 int nreaped;
1712
1713 nreaped = 0;
1714
1715 for (;;)
1716 {
1717 unsigned short tx_status;
1718
1719 if (lp->tx_first_in_use == I82586NULL)
1720 break;
1721
1722 obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status), (unsigned char *)&tx_status, sizeof(tx_status));
1723
1724 if ((tx_status & AC_SFLD_C) == 0)
1725 break;
1726
1727 nreaped++;
1728
1729 --lp->tx_n_in_use;
1730
1731
1732
1733
1734
1735
1736 if (lp->tx_n_in_use <= 0)
1737 lp->tx_first_in_use = I82586NULL;
1738 else
1739 {
1740 lp->tx_first_in_use += TXBLOCKZ;
1741 if (lp->tx_first_in_use >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1742 lp->tx_first_in_use -= NTXBLOCKS * TXBLOCKZ;
1743 }
1744
1745 if (tx_status & AC_SFLD_OK)
1746 {
1747 int ncollisions;
1748
1749 lp->stats.tx_packets++;
1750 ncollisions = tx_status & AC_SFLD_MAXCOL;
1751 lp->stats.collisions += ncollisions;
1752
1753
1754
1755
1756 }
1757 else
1758 {
1759 lp->stats.tx_errors++;
1760 if (tx_status & AC_SFLD_S10)
1761 {
1762 lp->stats.tx_carrier_errors++;
1763 if (wavelan_debug > 0)
1764 printk("%s: tx error: no CS.\n", dev->name);
1765 }
1766 if (tx_status & AC_SFLD_S9)
1767 {
1768 lp->stats.tx_carrier_errors++;
1769 printk("%s: tx error: lost CTS.\n", dev->name);
1770 }
1771 if (tx_status & AC_SFLD_S8)
1772 {
1773 lp->stats.tx_fifo_errors++;
1774 printk("%s: tx error: slow DMA.\n", dev->name);
1775 }
1776 if (tx_status & AC_SFLD_S6)
1777 {
1778 lp->stats.tx_heartbeat_errors++;
1779 if (wavelan_debug > 0)
1780 printk("%s: tx error: heart beat.\n", dev->name);
1781 }
1782 if (tx_status & AC_SFLD_S5)
1783 {
1784 lp->stats.tx_aborted_errors++;
1785 if (wavelan_debug > 0)
1786 printk("%s: tx error: too many collisions.\n", dev->name);
1787 }
1788 }
1789
1790 if (wavelan_debug > 5)
1791 printk("%s: tx completed, tx_status 0x%04x.\n", dev->name, tx_status);
1792 }
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1803 {
1804 dev->tbusy = 0;
1805 mark_bh(NET_BH);
1806 }
1807
1808 return nreaped;
1809 }
1810
1811 static
1812 void
1813 wavelan_watchdog(unsigned long a)
1814 {
1815 device *dev;
1816 net_local *lp;
1817 unsigned short ioaddr;
1818 unsigned long x;
1819 unsigned int nreaped;
1820
1821 x = wavelan_splhi();
1822
1823 dev = (device *)a;
1824 ioaddr = dev->base_addr;
1825 lp = (net_local *)dev->priv;
1826
1827 if (lp->tx_n_in_use <= 0)
1828 {
1829 wavelan_splx(x);
1830 return;
1831 }
1832
1833 lp->watchdog.expires = jiffies+WATCHDOG_JIFFIES;
1834 add_timer(&lp->watchdog);
1835
1836 if (jiffies - dev->trans_start < WATCHDOG_JIFFIES)
1837 {
1838 wavelan_splx(x);
1839 return;
1840 }
1841
1842 nreaped = wavelan_complete(dev, ioaddr, lp);
1843
1844 printk("%s: warning: wavelan_watchdog(): %d reaped, %d remain.\n", dev->name, nreaped, lp->tx_n_in_use);
1845
1846
1847
1848
1849
1850
1851
1852
1853 wavelan_splx(x);
1854 }
1855
1856 static
1857 void
1858 wavelan_interrupt(int irq, struct pt_regs *regs)
1859 {
1860 device *dev;
1861 unsigned short ioaddr;
1862 net_local *lp;
1863 unsigned short hasr;
1864 unsigned short status;
1865 unsigned short ack_cmd;
1866
1867 if ((dev = (device *)(irq2dev_map[irq])) == (device *)0)
1868 {
1869 printk("wavelan_interrupt(): irq %d for unknown device.\n", irq);
1870 return;
1871 }
1872
1873 ioaddr = dev->base_addr;
1874 lp = (net_local *)dev->priv;
1875
1876 dev->interrupt = 1;
1877
1878 if ((hasr = hasr_read(ioaddr)) & HASR_MMC_INTR)
1879 {
1880 unsigned char dce_status;
1881
1882
1883
1884
1885
1886 mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status, sizeof(dce_status));
1887 if (wavelan_debug > 0)
1888 printk("%s: warning: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n", dev->name, dce_status);
1889 }
1890
1891 if ((hasr & HASR_82586_INTR) == 0)
1892 {
1893 dev->interrupt = 0;
1894 if (wavelan_debug > 0)
1895 printk("%s: warning: wavelan_interrupt() but (hasr & HASR_82586_INTR) == 0.\n", dev->name);
1896 return;
1897 }
1898
1899 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&status, sizeof(status));
1900
1901
1902
1903
1904 ack_cmd = status & SCB_ST_INT;
1905
1906 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&ack_cmd, sizeof(ack_cmd));
1907
1908 set_chan_attn(ioaddr, lp->hacr);
1909
1910 if (wavelan_debug > 5)
1911 printk("%s: interrupt, status 0x%04x.\n", dev->name, status);
1912
1913 if ((status & SCB_ST_CX) == SCB_ST_CX)
1914 {
1915
1916
1917
1918 if (wavelan_debug > 5)
1919 printk("%s: command completed.\n", dev->name);
1920 (void)wavelan_complete(dev, ioaddr, lp);
1921 }
1922
1923 if ((status & SCB_ST_FR) == SCB_ST_FR)
1924 {
1925
1926
1927
1928 if (wavelan_debug > 5)
1929 printk("%s: received packet.\n", dev->name);
1930 wavelan_receive(dev);
1931 }
1932
1933 if
1934 (
1935 (status & SCB_ST_CNA) == SCB_ST_CNA
1936 ||
1937 (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) && dev->start)
1938 )
1939 {
1940 printk("%s: warning: CU inactive -- restarting.\n", dev->name);
1941
1942 (void)wavelan_hardware_reset(dev);
1943 }
1944
1945 if
1946 (
1947 (status & SCB_ST_RNR) == SCB_ST_RNR
1948 ||
1949 (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) && dev->start)
1950 )
1951 {
1952 printk("%s: warning: RU not ready -- restarting.\n", dev->name);
1953
1954 (void)wavelan_hardware_reset(dev);
1955 }
1956
1957 dev->interrupt = 0;
1958 }
1959
1960 static
1961 int
1962 wavelan_close(device *dev)
1963 {
1964 unsigned short ioaddr;
1965 net_local *lp;
1966 unsigned short scb_cmd;
1967
1968 if (wavelan_debug > 0)
1969 printk("%s: ->wavelan_close(dev=0x%x)\n", dev->name, (unsigned int)dev);
1970
1971 ioaddr = dev->base_addr;
1972 lp = (net_local *)dev->priv;
1973
1974 dev->tbusy = 1;
1975 dev->start = 0;
1976
1977
1978
1979
1980 scb_cmd = (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC & SCB_CMD_RUC_SUS);
1981 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
1982 set_chan_attn(ioaddr, lp->hacr);
1983
1984 wavelan_ints_off(dev);
1985
1986 free_irq(dev->irq);
1987 irq2dev_map[dev->irq] = (device *)0;
1988
1989
1990
1991
1992 release_region(ioaddr, sizeof(ha_t));
1993
1994 #if defined(MODULE)
1995 MOD_DEC_USE_COUNT;
1996 #endif
1997
1998 if (wavelan_debug > 0)
1999 printk("%s: <-wavelan_close(): 0\n", dev->name);
2000
2001 return 0;
2002 }
2003
2004
2005
2006
2007
2008 static
2009 en_stats *
2010 wavelan_get_stats(device *dev)
2011 {
2012 net_local *lp;
2013
2014 lp = (net_local *)dev->priv;
2015
2016 return &lp->stats;
2017 }
2018
2019 static
2020 void
2021 wavelan_set_multicast_list(device *dev, int num_addrs, void *addrs)
2022 {
2023 net_local *lp;
2024 unsigned long x;
2025
2026 if (wavelan_debug > 0)
2027 printk("%s: ->wavelan_set_multicast_list(dev=0x%x, num_addrs=%d, addrs=0x%x)\n", dev->name, (unsigned int)dev, num_addrs, (unsigned int)addrs);
2028
2029 lp = (net_local *)dev->priv;
2030
2031 switch (num_addrs)
2032 {
2033 case -1:
2034
2035
2036
2037 lp->promiscuous = 1;
2038 x = wavelan_splhi();
2039 (void)wavelan_hardware_reset(dev);
2040 wavelan_splx(x);
2041 break;
2042
2043 case 0:
2044
2045
2046
2047
2048 lp->promiscuous = 0;
2049 x = wavelan_splhi();
2050 (void)wavelan_hardware_reset(dev);
2051 wavelan_splx(x);
2052 break;
2053
2054 default:
2055
2056
2057
2058
2059 break;
2060 }
2061
2062 if (wavelan_debug > 0)
2063 printk("%s: <-wavelan_set_multicast_list()\n", dev->name);
2064 }
2065
2066
2067
2068
2069
2070 static
2071 int
2072 sprintf_stats(char *buffer, device *dev)
2073 {
2074 net_local *lp;
2075 unsigned char v;
2076 mmr_t m;
2077
2078 lp = (net_local *)dev->priv;
2079
2080 if (lp == (net_local *)0)
2081 return sprintf(buffer, "%6s: No statistics available.\n", dev->name);
2082
2083 v = (unsigned char)1;
2084 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
2085
2086 mmc_read(dev->base_addr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, sizeof(m.mmr_dce_status));
2087 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_h), &m.mmr_correct_nwid_h, sizeof(m.mmr_correct_nwid_h));
2088 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_l), &m.mmr_correct_nwid_l, sizeof(m.mmr_correct_nwid_l));
2089 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_h), &m.mmr_wrong_nwid_h, sizeof(m.mmr_wrong_nwid_h));
2090 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, sizeof(m.mmr_wrong_nwid_l));
2091 mmc_read(dev->base_addr, mmroff(0, mmr_signal_lvl), &m.mmr_signal_lvl, sizeof(m.mmr_signal_lvl));
2092 mmc_read(dev->base_addr, mmroff(0, mmr_silence_lvl), &m.mmr_silence_lvl, sizeof(m.mmr_silence_lvl));
2093 mmc_read(dev->base_addr, mmroff(0, mmr_sgnl_qual), &m.mmr_sgnl_qual, sizeof(m.mmr_sgnl_qual));
2094
2095 v = (unsigned char)0;
2096 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
2097
2098 lp->correct_nwid += (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l;
2099 lp->wrong_nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
2100
2101 return sprintf
2102 (
2103 buffer,
2104 "%6s: %02x %08x %08x %02x %02x %02x %02x %u\n",
2105 dev->name,
2106 m.mmr_dce_status,
2107 lp->correct_nwid,
2108 lp->wrong_nwid,
2109 m.mmr_signal_lvl,
2110 m.mmr_silence_lvl,
2111 m.mmr_sgnl_qual,
2112 lp->tx_n_in_use,
2113 lp->nresets
2114 );
2115 }
2116
2117 static int
2118 wavelan_get_info(char *buffer, char **start, off_t offset, int length, int dummy)
2119 {
2120 int len;
2121 off_t begin;
2122 off_t pos;
2123 int size;
2124 unsigned long x;
2125
2126 len = 0;
2127 begin = 0;
2128 pos = 0;
2129
2130 size = sprintf(buffer, "%s", "Iface | dce +nwid -nwid lvl slnc qual ntxq nrst\n");
2131
2132 pos += size;
2133 len += size;
2134
2135 x = wavelan_splhi();
2136
2137 if (first_wavelan != (net_local *)0)
2138 {
2139 net_local *lp;
2140
2141 lp = first_wavelan;
2142 do
2143 {
2144 size = sprintf_stats(buffer + len, lp->dev);
2145
2146 len += size;
2147 pos = begin + len;
2148
2149 if (pos < offset)
2150 {
2151 len = 0;
2152 begin = pos;
2153 }
2154
2155 if (pos > offset + length)
2156 break;
2157 }
2158 while ((lp = lp->next) != first_wavelan);
2159 }
2160
2161 wavelan_splx(x);
2162
2163 *start = buffer + (offset - begin);
2164 len -= (offset - begin);
2165 if (len > length)
2166 len = length;
2167
2168 return len;
2169 }
2170
2171 #if defined(MODULE)
2172 char kernel_version[] = UTS_RELEASE;
2173 static struct device dev_wavelan =
2174 {
2175 " " ,
2176 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, wavelan_probe
2177 };
2178
2179 int io = 0x390;
2180 int irq = 0;
2181
2182 int
2183 init_module(void)
2184 {
2185 dev_wavelan.base_addr = io;
2186 dev_wavelan.irq = irq;
2187 if (register_netdev(&dev_wavelan) != 0)
2188 return -EIO;
2189
2190 return 0;
2191 }
2192
2193 void
2194 cleanup_module(void)
2195 {
2196 if (MOD_IN_USE)
2197 printk("wavelan: device busy, remove delayed\n");
2198 else
2199 {
2200 proc_net_unregister(PROC_NET_WAVELAN);
2201 unregister_netdev(&dev_wavelan);
2202 kfree_s(dev_wavelan.priv, sizeof(struct net_local));
2203 dev_wavelan.priv = NULL;
2204 }
2205 }
2206 #endif
2207
2208 static
2209 void
2210 wavelan_cu_show_one(device *dev, net_local *lp, int i, unsigned short p)
2211 {
2212 unsigned short ioaddr;
2213 ac_tx_t actx;
2214
2215 ioaddr = dev->base_addr;
2216
2217 printk("%d: 0x%x:", i, p);
2218
2219 obram_read(ioaddr, p, (unsigned char *)&actx, sizeof(actx));
2220 printk(" status=0x%x,", actx.tx_h.ac_status);
2221 printk(" command=0x%x,", actx.tx_h.ac_command);
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232 printk("|");
2233 }
2234
2235 #if 0
2236 static
2237 void
2238 wavelan_psa_show(psa_t *p)
2239 {
2240 printk("psa:");
2241
2242 printk("psa_io_base_addr_1: 0x%02x,", p->psa_io_base_addr_1);
2243 printk("psa_io_base_addr_2: 0x%02x,", p->psa_io_base_addr_2);
2244 printk("psa_io_base_addr_3: 0x%02x,", p->psa_io_base_addr_3);
2245 printk("psa_io_base_addr_4: 0x%02x,", p->psa_io_base_addr_4);
2246 printk("psa_rem_boot_addr_1: 0x%02x,", p->psa_rem_boot_addr_1);
2247 printk("psa_rem_boot_addr_2: 0x%02x,", p->psa_rem_boot_addr_2);
2248 printk("psa_rem_boot_addr_3: 0x%02x,", p->psa_rem_boot_addr_3);
2249 printk("psa_holi_params: 0x%02x,", p->psa_holi_params);
2250 printk("psa_int_req_no: %d,", p->psa_int_req_no);
2251 printk
2252 (
2253 "psa_univ_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2254 p->psa_univ_mac_addr[0],
2255 p->psa_univ_mac_addr[1],
2256 p->psa_univ_mac_addr[2],
2257 p->psa_univ_mac_addr[3],
2258 p->psa_univ_mac_addr[4],
2259 p->psa_univ_mac_addr[5]
2260 );
2261 printk
2262 (
2263 "psa_local_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2264 p->psa_local_mac_addr[0],
2265 p->psa_local_mac_addr[1],
2266 p->psa_local_mac_addr[2],
2267 p->psa_local_mac_addr[3],
2268 p->psa_local_mac_addr[4],
2269 p->psa_local_mac_addr[5]
2270 );
2271 printk("psa_univ_local_sel: %d,", p->psa_univ_local_sel);
2272 printk("psa_comp_number: %d,", p->psa_comp_number);
2273 printk("psa_thr_pre_set: 0x%02x,", p->psa_thr_pre_set);
2274 printk("psa_feature_select/decay_prm: 0x%02x,", p->psa_feature_select);
2275 printk("psa_subband/decay_update_prm: %d,", p->psa_subband);
2276 printk("psa_quality_thr: 0x%02x,", p->psa_quality_thr);
2277 printk("psa_mod_delay: 0x%02x,", p->psa_mod_delay);
2278 printk("psa_nwid: 0x%02x%02x,", p->psa_nwid[0], p->psa_nwid[1]);
2279 printk("psa_undefined: %d,", p->psa_undefined);
2280 printk("psa_encryption_select: %d,", p->psa_encryption_select);
2281 printk
2282 (
2283 "psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x,",
2284 p->psa_encryption_key[0],
2285 p->psa_encryption_key[1],
2286 p->psa_encryption_key[2],
2287 p->psa_encryption_key[3],
2288 p->psa_encryption_key[4],
2289 p->psa_encryption_key[5],
2290 p->psa_encryption_key[6],
2291 p->psa_encryption_key[7]
2292 );
2293 printk("psa_databus_width: %d,", p->psa_databus_width);
2294 printk("psa_call_code/auto_squelch: 0x%02x,", p->psa_call_code);
2295 printk("psa_no_of_retries: %d,", p->psa_no_of_retries);
2296 printk("psa_acr: %d,", p->psa_acr);
2297 printk("psa_dump_count: %d,", p->psa_dump_count);
2298 printk("psa_nwid_prefix: 0x%02x,", p->psa_nwid_prefix);
2299 printk("psa_conf_status: %d,", p->psa_conf_status);
2300 printk("psa_crc: 0x%02x%02x,", p->psa_crc[0], p->psa_crc[1]);
2301 printk("psa_crc_status: 0x%02x,", p->psa_crc_status);
2302
2303 printk("\n");
2304 }
2305
2306 static
2307 void
2308 wavelan_mmc_show(unsigned short ioaddr)
2309 {
2310 mmr_t m;
2311
2312 mmc_read(ioaddr, 0, (unsigned char *)&m, sizeof(m));
2313
2314 printk("mmr:");
2315 printk(" des_status: 0x%x", m.mmr_des_status);
2316 printk(" des_avail: 0x%x", m.mmr_des_avail);
2317 printk(" des_io_invert: 0x%x", m.mmr_des_io_invert);
2318 printk
2319 (
2320 " dce_status: 0x%x[%s%s%s%s]",
2321 m.mmr_dce_status & 0x0F,
2322 (m.mmr_dce_status & MMR_DCE_STATUS_ENERG_DET) ? "energy detected," : "",
2323 (m.mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ? "loop test indicated," : "",
2324 (m.mmr_dce_status & MMR_DCE_STATUS_XMTITR_IND) ? "transmitter on," : "",
2325 (m.mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ? "jabber timer expired," : ""
2326 );
2327 printk(" correct_nwid: %d", m.mmr_correct_nwid_h << 8 | m.mmr_correct_nwid_l);
2328 printk(" wrong_nwid: %d", (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
2329 printk(" thr_pre_set: 0x%x", m.mmr_thr_pre_set);
2330 printk(" signal_lvl: %d", m.mmr_signal_lvl);
2331 printk(" silence_lvl: %d", m.mmr_silence_lvl);
2332 printk(" sgnl_qual: 0x%x", m.mmr_sgnl_qual);
2333 printk(" netw_id_l: %x", m.mmr_netw_id_l);
2334
2335 printk("\n");
2336 }
2337 #endif
2338
2339 static
2340 void
2341 wavelan_scb_show(unsigned short ioaddr)
2342 {
2343 scb_t scb;
2344
2345 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
2346
2347 printk("scb:");
2348
2349 printk(" status:");
2350 printk
2351 (
2352 " stat 0x%x[%s%s%s%s]",
2353 (scb.scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA | SCB_ST_RNR)) >> 12,
2354 (scb.scb_status & SCB_ST_CX) ? "cmd completion interrupt," : "",
2355 (scb.scb_status & SCB_ST_FR) ? "frame received," : "",
2356 (scb.scb_status & SCB_ST_CNA) ? "cmd unit not active," : "",
2357 (scb.scb_status & SCB_ST_RNR) ? "rcv unit not ready," : ""
2358 );
2359 printk
2360 (
2361 " cus 0x%x[%s%s%s]",
2362 (scb.scb_status & SCB_ST_CUS) >> 8,
2363 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_IDLE) ? "idle" : "",
2364 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_SUSP) ? "suspended" : "",
2365 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_ACTV) ? "active" : ""
2366 );
2367 printk
2368 (
2369 " rus 0x%x[%s%s%s%s]",
2370 (scb.scb_status & SCB_ST_RUS) >> 4,
2371 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_IDLE) ? "idle" : "",
2372 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_SUSP) ? "suspended" : "",
2373 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_NRES) ? "no resources" : "",
2374 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_RDY) ? "ready" : ""
2375 );
2376
2377 printk(" command:");
2378 printk
2379 (
2380 " ack 0x%x[%s%s%s%s]",
2381 (scb.scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR | SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12,
2382 (scb.scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "",
2383 (scb.scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "",
2384 (scb.scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "",
2385 (scb.scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : ""
2386 );
2387 printk
2388 (
2389 " cuc 0x%x[%s%s%s%s%s]",
2390 (scb.scb_command & SCB_CMD_CUC) >> 8,
2391 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_NOP) ? "nop" : "",
2392 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_GO) ? "start cbl_offset" : "",
2393 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_RES) ? "resume execution" : "",
2394 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_SUS) ? "suspend execution" : "",
2395 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_ABT) ? "abort execution" : ""
2396 );
2397 printk
2398 (
2399 " ruc 0x%x[%s%s%s%s%s]",
2400 (scb.scb_command & SCB_CMD_RUC) >> 4,
2401 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_NOP) ? "nop" : "",
2402 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_GO) ? "start rfa_offset" : "",
2403 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_RES) ? "resume reception" : "",
2404 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_SUS) ? "suspend reception" : "",
2405 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_ABT) ? "abort reception" : ""
2406 );
2407
2408 printk(" cbl_offset 0x%x", scb.scb_cbl_offset);
2409 printk(" rfa_offset 0x%x", scb.scb_rfa_offset);
2410
2411 printk(" crcerrs %d", scb.scb_crcerrs);
2412 printk(" alnerrs %d", scb.scb_alnerrs);
2413 printk(" rscerrs %d", scb.scb_rscerrs);
2414 printk(" ovrnerrs %d", scb.scb_ovrnerrs);
2415
2416 printk("\n");
2417 }
2418
2419 static
2420 void
2421 wavelan_ru_show(device *dev)
2422 {
2423 net_local *lp;
2424
2425 lp = (net_local *)dev->priv;
2426
2427 printk("ru:");
2428
2429
2430
2431 printk("\n");
2432 }
2433
2434 static
2435 void
2436 wavelan_cu_show(device *dev)
2437 {
2438 net_local *lp;
2439 unsigned int i;
2440 unsigned short p;
2441
2442 lp = (net_local *)dev->priv;
2443
2444 printk("cu:");
2445 printk("\n");
2446
2447 for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++)
2448 {
2449 wavelan_cu_show_one(dev, lp, i, p);
2450
2451 p += TXBLOCKZ;
2452 if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
2453 p -= NTXBLOCKS * TXBLOCKZ;
2454 }
2455 }
2456
2457 static
2458 void
2459 wavelan_dev_show(device *dev)
2460 {
2461 printk("dev:");
2462 printk(" start=%d,", dev->start);
2463 printk(" tbusy=%ld,", dev->tbusy);
2464 printk(" interrupt=%d,", dev->interrupt);
2465 printk(" trans_start=%ld,", dev->trans_start);
2466 printk(" flags=0x%x,", dev->flags);
2467 printk("\n");
2468 }
2469
2470 static
2471 void
2472 wavelan_local_show(device *dev)
2473 {
2474 net_local *lp;
2475
2476 lp = (net_local *)dev->priv;
2477
2478 printk("local:");
2479 printk(" tx_n_in_use=%d,", lp->tx_n_in_use);
2480 printk(" hacr=0x%x,", lp->hacr);
2481 printk(" rx_head=0x%x,", lp->rx_head);
2482 printk(" rx_last=0x%x,", lp->rx_last);
2483 printk(" tx_first_free=0x%x,", lp->tx_first_free);
2484 printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use);
2485 printk("\n");
2486 }
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