tag	line	file	source code
R9	922	drivers/char/scc.c	wr(scc,R9,VIS);      /* vector includes status */
R9	995	drivers/char/scc.c	or(scc,R9,MIE);      /* master interrupt enable */
R9	1479	drivers/char/scc.c	OutReg(scc->ctrl,R9,FHWRES);  /* force hardware reset */
R9	1480	drivers/char/scc.c	OutReg(scc->ctrl,R9,0);    /* end hardware reset */
R9	1481	drivers/char/scc.c	OutReg(scc->ctrl,R9,CHRA);  /* reset channel A */
R9	1482	drivers/char/scc.c	OutReg(scc->ctrl,R9,CHRB);  /* reset channel B */
R9	1107	drivers/net/pi2.c	wrtscc(lp->cardbase, cmd, R9, CHRA);  /* Reset channel A */
R9	1111	drivers/net/pi2.c	wrtscc(lp->cardbase, cmd, R9, CHRB);  /* Reset channel B */
R9	1201	drivers/net/pi2.c	wrtscc(cardbase, dev->base_addr + CTL, R9, FHWRES);  /* Hardware reset */
R9	1203	drivers/net/pi2.c	wrtscc(cardbase, dev->base_addr + CTL, R9, 0);
R9	1381	drivers/net/pi2.c	wrtscc(lp->cardbase, CTL + lp->base, R9, MIE | NV);
R9	1392	drivers/net/pi2.c	wrtscc(lp->cardbase, dev->base_addr + CTL, R9, FHWRES);  /* Hardware reset */
R9	1394	drivers/net/pi2.c	wrtscc(lp->cardbase, dev->base_addr + CTL, R9, 0);
R9	1485	drivers/net/pi2.c	wrtscc(lp->cardbase, CTL + lp->base, R9, MIE | NV);