This source file includes following definitions.
- wavelan_splhi
- wavelan_splx
- hasr_read
- hacr_write
- hacr_write_slow
- set_chan_attn
- wavelan_reset
- wavelan_16_off
- wavelan_16_on
- wavelan_ints_off
- wavelan_ints_on
- psa_read
- psa_write
- obram_read
- obram_write
- mmc_read
- mmc_write
- wavelan_unmap_irq
- wavelan_map_irq
- wavelan_mmc_init
- wavelan_ack
- wavelan_synchronous_cmd
- wavelan_hardware_reset
- wavelan_struct_check
- wavelan_probe
- wavelan_probe1
- wavelan_ru_start
- wavelan_cu_start
- wavelan_open
- hardware_send_packet
- wavelan_send_packet
- addrcmp
- wavelan_receive
- wavelan_complete
- wavelan_watchdog
- wavelan_interrupt
- wavelan_close
- wavelan_get_stats
- wavelan_set_multicast_list
- sprintf_stats
- wavelan_get_info
- init_module
- cleanup_module
- wavelan_cu_show_one
- wavelan_psa_show
- wavelan_mmc_show
- wavelan_scb_show
- wavelan_ru_show
- wavelan_cu_show
- wavelan_dev_show
- wavelan_local_show
1
2
3
4
5
6
7 #include <linux/config.h>
8
9 #if defined(MODULE)
10 #include <linux/module.h>
11 #include <linux/version.h>
12 #endif
13
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/types.h>
17 #include <linux/fcntl.h>
18 #include <linux/interrupt.h>
19 #include <linux/stat.h>
20 #include <linux/ptrace.h>
21 #include <linux/ioport.h>
22 #include <linux/in.h>
23 #include <linux/string.h>
24 #include <linux/delay.h>
25 #include <asm/system.h>
26 #include <asm/bitops.h>
27 #include <asm/io.h>
28 #include <asm/dma.h>
29 #include <linux/errno.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/skbuff.h>
33 #include <linux/malloc.h>
34 #include <linux/timer.h>
35 #include <linux/proc_fs.h>
36 #define STRUCT_CHECK 1
37 #include "i82586.h"
38 #include "wavelan.h"
39
40 #ifndef WAVELAN_DEBUG
41 #define WAVELAN_DEBUG 0
42 #endif
43
44 #define WATCHDOG_JIFFIES 512
45 #define ENABLE_FULL_PROMISCUOUS 0x10000
46
47 #define nels(a) (sizeof(a) / sizeof(a[0]))
48
49 typedef struct device device;
50 typedef struct enet_statistics en_stats;
51 typedef struct net_local net_local;
52 typedef struct timer_list timer_list;
53
54 struct net_local
55 {
56 en_stats stats;
57 unsigned int tx_n_in_use;
58 unsigned char nwid[2];
59 unsigned short hacr;
60 unsigned short rx_head;
61 unsigned short rx_last;
62 unsigned short tx_first_free;
63 unsigned short tx_first_in_use;
64 unsigned int nresets;
65 unsigned int correct_nwid;
66 unsigned int wrong_nwid;
67 unsigned int promiscuous;
68 unsigned int full_promiscuous;
69 timer_list watchdog;
70 device *dev;
71 net_local *prev;
72 net_local *next;
73 };
74
75 extern int wavelan_probe(device *);
76
77 static const char *version = "wavelan.c:v7 95/4/8\n";
78
79
80
81
82 static int wavelan_probe1(device *, unsigned short);
83 static int wavelan_open(device *);
84 static int wavelan_send_packet(struct sk_buff *, device *);
85 static void wavelan_interrupt(int, struct pt_regs *);
86 static int wavelan_close(device *);
87 static en_stats *wavelan_get_stats(device *);
88 static void wavelan_set_multicast_list(device *, int, void *);
89 static int wavelan_get_info(char*, char**, off_t, int, int);
90
91
92
93
94 static void wavelan_cu_show_one(device *, net_local *, int, unsigned short);
95 static void wavelan_cu_start(device *);
96 static void wavelan_ru_start(device *);
97 static void wavelan_watchdog(unsigned long);
98 #if 0
99 static void wavelan_psa_show(psa_t *);
100 static void wavelan_mmc_show(unsigned short);
101 #endif
102 static void wavelan_scb_show(unsigned short);
103 static void wavelan_ru_show(device *);
104 static void wavelan_cu_show(device *);
105 static void wavelan_dev_show(device *);
106 static void wavelan_local_show(device *);
107
108 static unsigned int wavelan_debug = WAVELAN_DEBUG;
109 static net_local *first_wavelan = (net_local *)0;
110
111 static
112 unsigned long
113 wavelan_splhi(void)
114 {
115 unsigned long flags;
116
117 save_flags(flags);
118 cli();
119
120 return flags;
121 }
122
123 static
124 void
125 wavelan_splx(unsigned long flags)
126 {
127 restore_flags(flags);
128 }
129
130 static
131 unsigned short
132 hasr_read(unsigned short ioaddr)
133 {
134 return inw(HASR(ioaddr));
135 }
136
137 static
138 void
139 hacr_write(unsigned short ioaddr, int hacr)
140 {
141 outw(hacr, HACR(ioaddr));
142 }
143
144 static
145 void
146 hacr_write_slow(unsigned short ioaddr, int hacr)
147 {
148 hacr_write(ioaddr, hacr);
149
150 udelay(1000);
151 }
152
153
154
155
156 static
157 void
158 set_chan_attn(unsigned short ioaddr, unsigned short current_hacr)
159 {
160 hacr_write(ioaddr, current_hacr | HACR_CA);
161 }
162
163
164
165
166 static
167 void
168 wavelan_reset(unsigned short ioaddr)
169 {
170 hacr_write_slow(ioaddr, HACR_RESET);
171 hacr_write(ioaddr, HACR_DEFAULT);
172 }
173
174 static
175 void
176 wavelan_16_off(unsigned short ioaddr, unsigned short hacr)
177 {
178 hacr &= ~HACR_16BITS;
179
180 hacr_write(ioaddr, hacr);
181 }
182
183 static
184 void
185 wavelan_16_on(unsigned short ioaddr, unsigned short hacr)
186 {
187 hacr |= HACR_16BITS;
188
189 hacr_write(ioaddr, hacr);
190 }
191
192 static
193 void
194 wavelan_ints_off(device *dev)
195 {
196 unsigned short ioaddr;
197 net_local *lp;
198 unsigned long x;
199
200 ioaddr = dev->base_addr;
201 lp = (net_local *)dev->priv;
202
203 x = wavelan_splhi();
204
205 lp->hacr &= ~HACR_INTRON;
206 hacr_write(ioaddr, lp->hacr);
207
208 wavelan_splx(x);
209 }
210
211 static
212 void
213 wavelan_ints_on(device *dev)
214 {
215 unsigned short ioaddr;
216 net_local *lp;
217 unsigned long x;
218
219 ioaddr = dev->base_addr;
220 lp = (net_local *)dev->priv;
221
222 x = wavelan_splhi();
223
224 lp->hacr |= HACR_INTRON;
225 hacr_write(ioaddr, lp->hacr);
226
227 wavelan_splx(x);
228 }
229
230
231
232
233 static
234 void
235 psa_read(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
236 {
237 wavelan_16_off(ioaddr, hacr);
238
239 while (n-- > 0)
240 {
241 outw(o, PIOR2(ioaddr));
242 o++;
243 *b++ = inb(PIOP2(ioaddr));
244 }
245
246 wavelan_16_on(ioaddr, hacr);
247 }
248
249 #if defined(IRQ_SET_WORKS)
250
251
252
253 static
254 void
255 psa_write(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
256 {
257 wavelan_16_off(ioaddr, hacr);
258
259 while (n-- > 0)
260 {
261 outw(o, PIOR2(ioaddr));
262 o++;
263 outb(*b, PIOP2(ioaddr));
264 b++;
265 }
266
267 wavelan_16_on(ioaddr, hacr);
268 }
269 #endif
270
271
272
273
274 static
275 void
276 obram_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
277 {
278 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
279
280 outw(o, PIOR1(ioaddr));
281
282 insw(PIOP1(ioaddr), (unsigned short *)b, n);
283 }
284
285
286
287
288 static
289 void
290 obram_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
291 {
292 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
293
294 outw(o, PIOR1(ioaddr));
295
296 outsw(PIOP1(ioaddr), (unsigned short *)b, n);
297 }
298
299
300
301
302 static
303 void
304 mmc_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
305 {
306 while (n-- > 0)
307 {
308 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
309 ;
310
311 outw(o << 1, MMCR(ioaddr));
312 o++;
313
314 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
315 ;
316
317 *b++ = (unsigned char)(inw(MMCR(ioaddr)) >> 8);
318 }
319 }
320
321
322
323
324 static
325 void
326 mmc_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
327 {
328 while (n-- > 0)
329 {
330 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
331 ;
332
333 outw((unsigned short)(((unsigned short)*b << 8) | (o << 1) | 1), MMCR(ioaddr));
334 b++;
335 o++;
336 }
337 }
338
339 static int irqvals[] =
340 {
341 0, 0, 0, 0x01,
342 0x02, 0x04, 0, 0x08,
343 0, 0, 0x10, 0x20,
344 0x40, 0, 0, 0x80,
345 };
346
347 #if defined(IRQ_SET_WORKS)
348 static
349 int
350 wavelan_unmap_irq(int irq, unsigned char *irqval)
351 {
352 if (irq < 0 || irq >= nels(irqvals) || irqvals[irq] == 0)
353 return -1;
354
355 *irqval = (unsigned char)irqvals[irq];
356
357 return 0;
358 }
359 #endif
360
361
362
363
364 static
365 int
366 wavelan_map_irq(unsigned char irqval)
367 {
368 int irq;
369
370 for (irq = 0; irq < nels(irqvals); irq++)
371 {
372 if (irqvals[irq] == (int)irqval)
373 return irq;
374 }
375
376 return -1;
377 }
378
379
380
381
382 static
383 void
384 wavelan_mmc_init(device *dev, psa_t *psa)
385 {
386 unsigned short ioaddr;
387 net_local *lp;
388 mmw_t m;
389 int configured;
390
391 ioaddr = dev->base_addr;
392 lp = (net_local *)dev->priv;
393 memset(&m, 0x00, sizeof(m));
394
395
396
397
398
399
400
401
402
403 configured = 0;
404
405
406
407
408
409 m.mmw_jabber_enable = 0x01;
410 m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
411 m.mmw_ifs = 0x20;
412 m.mmw_mod_delay = 0x04;
413 m.mmw_jam_time = 0x38;
414
415 m.mmw_encr_enable = 0;
416 m.mmw_des_io_invert = 0;
417 m.mmw_freeze = 0;
418 m.mmw_decay_prm = 0;
419 m.mmw_decay_updat_prm = 0;
420
421 if (configured)
422 {
423
424
425
426 if (psa->psa_undefined & 1)
427 m.mmw_loopt_sel = 0x00;
428 else
429 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
430
431 m.mmw_thr_pre_set = psa->psa_thr_pre_set & 0x3F;
432 m.mmw_quality_thr = psa->psa_quality_thr & 0x0F;
433 }
434 else
435 {
436 if (lp->promiscuous && lp->full_promiscuous)
437 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
438 else
439 m.mmw_loopt_sel = 0x00;
440
441
442
443
444
445 if (psa->psa_comp_number & 1)
446 m.mmw_thr_pre_set = 0x01;
447 else
448 m.mmw_thr_pre_set = 0x04;
449
450 m.mmw_quality_thr = 0x03;
451 }
452
453 m.mmw_netw_id_l = lp->nwid[1];
454 m.mmw_netw_id_h = lp->nwid[0];
455
456 mmc_write(ioaddr, 0, (unsigned char *)&m, sizeof(m));
457 }
458
459 static
460 void
461 wavelan_ack(device *dev)
462 {
463 unsigned short ioaddr;
464 net_local *lp;
465 unsigned short scb_cs;
466 int i;
467
468 ioaddr = dev->base_addr;
469 lp = (net_local *)dev->priv;
470
471 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
472 scb_cs &= SCB_ST_INT;
473
474 if (scb_cs == 0)
475 return;
476
477 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
478
479 set_chan_attn(ioaddr, lp->hacr);
480
481 for (i = 1000; i > 0; i--)
482 {
483 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
484 if (scb_cs == 0)
485 break;
486
487 udelay(1000);
488 }
489
490 if (i <= 0)
491 printk("%s: wavelan_ack(): board not accepting command.\n", dev->name);
492 }
493
494
495
496
497
498 static
499 int
500 wavelan_synchronous_cmd(device *dev, const char *str)
501 {
502 unsigned short ioaddr;
503 net_local *lp;
504 unsigned short scb_cmd;
505 ach_t cb;
506 int i;
507
508 ioaddr = dev->base_addr;
509 lp = (net_local *)dev->priv;
510
511 scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO;
512 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
513
514 set_chan_attn(ioaddr, lp->hacr);
515
516 for (i = 64; i > 0; i--)
517 {
518 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
519 if (cb.ac_status & AC_SFLD_C)
520 break;
521
522 udelay(1000);
523 }
524
525 if (i <= 0 || !(cb.ac_status & AC_SFLD_OK))
526 {
527 printk("%s: %s failed; status = 0x%x\n", dev->name, str, cb.ac_status);
528 wavelan_scb_show(ioaddr);
529 return -1;
530 }
531
532 wavelan_ack(dev);
533
534 return 0;
535 }
536
537 static
538 int
539 wavelan_hardware_reset(device *dev)
540 {
541 unsigned short ioaddr;
542 psa_t psa;
543 net_local *lp;
544 scp_t scp;
545 iscp_t iscp;
546 scb_t scb;
547 ach_t cb;
548 int i;
549 ac_cfg_t cfg;
550 ac_ias_t ias;
551
552 if (wavelan_debug > 0)
553 printk("%s: ->wavelan_hardware_reset(dev=0x%x)\n", dev->name, (unsigned int)dev);
554
555 ioaddr = dev->base_addr;
556 lp = (net_local *)dev->priv;
557
558 lp->nresets++;
559
560 wavelan_reset(ioaddr);
561 lp->hacr = HACR_DEFAULT;
562
563
564
565
566 {
567 unsigned char zeroes[512];
568
569 memset(&zeroes[0], 0x00, sizeof(zeroes));
570
571 for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes))
572 obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes));
573 }
574
575 psa_read(ioaddr, lp->hacr, 0, (unsigned char *)&psa, sizeof(psa));
576
577 wavelan_mmc_init(dev, &psa);
578
579
580
581
582
583 memset(&scp, 0x00, sizeof(scp));
584 scp.scp_sysbus = SCP_SY_16BBUS;
585 scp.scp_iscpl = OFFSET_ISCP;
586 obram_write(ioaddr, OFFSET_SCP, (unsigned char *)&scp, sizeof(scp));
587
588 memset(&iscp, 0x00, sizeof(iscp));
589 iscp.iscp_busy = 1;
590 iscp.iscp_offset = OFFSET_SCB;
591 obram_write(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
592
593 memset(&scb, 0x00, sizeof(scb));
594 scb.scb_command = SCB_CMD_RESET;
595 scb.scb_cbl_offset = OFFSET_CU;
596 scb.scb_rfa_offset = OFFSET_RU;
597 obram_write(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
598
599 set_chan_attn(ioaddr, lp->hacr);
600
601 for (i = 1000; i > 0; i--)
602 {
603 obram_read(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
604
605 if (iscp.iscp_busy == (unsigned short)0)
606 break;
607
608 udelay(1000);
609 }
610
611 if (i <= 0)
612 {
613 printk("%s: wavelan_hardware_reset(): iscp_busy timeout.\n", dev->name);
614 if (wavelan_debug > 0)
615 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
616 return -1;
617 }
618
619 for (i = 15; i > 0; i--)
620 {
621 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
622
623 if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA))
624 break;
625
626 udelay(1000);
627 }
628
629 if (i <= 0)
630 {
631 printk("%s: wavelan_hardware_reset(): status: expected 0x%02x, got 0x%02x.\n", dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status);
632 if (wavelan_debug > 0)
633 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
634 return -1;
635 }
636
637 wavelan_ack(dev);
638
639 memset(&cb, 0x00, sizeof(cb));
640 cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose);
641 cb.ac_link = OFFSET_CU;
642 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
643
644 if (wavelan_synchronous_cmd(dev, "diag()") == -1)
645 {
646 if (wavelan_debug > 0)
647 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
648 return -1;
649 }
650
651 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
652 if (cb.ac_status & AC_SFLD_FAIL)
653 {
654 printk("%s: wavelan_hardware_reset(): i82586 Self Test failed.\n", dev->name);
655 if (wavelan_debug > 0)
656 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
657 return -1;
658 }
659
660 memset(&cfg, 0x00, sizeof(cfg));
661
662 #if 0
663
664
665
666 cfg.fifolim_bytecnt = 0x080c;
667 cfg.addrlen_mode = 0x2600;
668 cfg.linprio_interframe = 0x7820;
669 cfg.slot_time = 0xf00c;
670 cfg.hardware = 0x0008;
671 cfg.min_frame_len = 0x0040;
672 #endif
673
674
675
676
677
678
679 cfg.cfg_byte_cnt = AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t));
680 cfg.cfg_fifolim = AC_CFG_FIFOLIM(8);
681 cfg.cfg_byte8 = AC_CFG_SAV_BF(0) |
682 AC_CFG_SRDY(0);
683 cfg.cfg_byte9 = AC_CFG_ELPBCK(0) |
684 AC_CFG_ILPBCK(0) |
685 AC_CFG_PRELEN(AC_CFG_PLEN_2) |
686 AC_CFG_ALOC(1) |
687 AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE);
688 cfg.cfg_byte10 = AC_CFG_BOFMET(0) |
689 AC_CFG_ACR(0) |
690 AC_CFG_LINPRIO(0);
691 cfg.cfg_ifs = 32;
692 cfg.cfg_slotl = 0;
693 cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) |
694 AC_CFG_SLTTMHI(2);
695 cfg.cfg_byte14 = AC_CFG_FLGPAD(0) |
696 AC_CFG_BTSTF(0) |
697 AC_CFG_CRC16(0) |
698 AC_CFG_NCRC(0) |
699 AC_CFG_TNCRS(1) |
700 AC_CFG_MANCH(0) |
701 AC_CFG_BCDIS(0) |
702 AC_CFG_PRM(lp->promiscuous);
703 cfg.cfg_byte15 = AC_CFG_ICDS(0) |
704 AC_CFG_CDTF(0) |
705 AC_CFG_ICSS(0) |
706 AC_CFG_CSTF(0);
707
708
709
710 cfg.cfg_min_frm_len = AC_CFG_MNFRM(8);
711
712 cfg.cfg_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_configure);
713 cfg.cfg_h.ac_link = OFFSET_CU;
714 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cfg, sizeof(cfg));
715
716 if (wavelan_synchronous_cmd(dev, "reset()-configure") == -1)
717 {
718 if (wavelan_debug > 0)
719 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
720
721 return -1;
722 }
723
724 memset(&ias, 0x00, sizeof(ias));
725 ias.ias_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_ia_setup);
726 ias.ias_h.ac_link = OFFSET_CU;
727 memcpy(&ias.ias_addr[0], (unsigned char *)&dev->dev_addr[0], sizeof(ias.ias_addr));
728 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&ias, sizeof(ias));
729
730 if (wavelan_synchronous_cmd(dev, "reset()-address") == -1)
731 {
732 if (wavelan_debug > 0)
733 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
734
735 return -1;
736 }
737
738 wavelan_ints_on(dev);
739
740 if (wavelan_debug > 4)
741 wavelan_scb_show(ioaddr);
742
743 wavelan_ru_start(dev);
744 wavelan_cu_start(dev);
745
746 if (wavelan_debug > 0)
747 printk("%s: <-wavelan_hardware_reset(): 0\n", dev->name);
748
749 return 0;
750 }
751
752 #if STRUCT_CHECK == 1
753
754 static
755 const char *
756 wavelan_struct_check(void)
757 {
758 #define SC(t,s,n) if (sizeof(t) != s) return n
759 SC(psa_t, PSA_SIZE, "psa_t");
760 SC(mmw_t, MMW_SIZE, "mmw_t");
761 SC(mmr_t, MMR_SIZE, "mmr_t");
762 SC(ha_t, HA_SIZE, "ha_t");
763 #undef SC
764
765 return (char *)0;
766 }
767
768 #endif
769
770
771
772
773
774
775
776
777 int
778 wavelan_probe(device *dev)
779 {
780 int i;
781 int r;
782 short base_addr;
783 static unsigned short iobase[] =
784 {
785 #if 0
786 Leave out 0x3C0 for now -- seems to clash
787 with some video controllers.
788 Leave out the others too -- we will always
789 use 0x390 and leave 0x300 for the Ethernet device.
790 0x300, 0x390, 0x3E0, 0x3C0,
791 #endif
792 0x390,
793 };
794
795 if (wavelan_debug > 0)
796 printk("%s: ->wavelan_probe(dev=0x%x (base_addr=0x%x))\n", dev->name, (unsigned int)dev, (unsigned int)dev->base_addr);
797
798 #if STRUCT_CHECK == 1
799 if (wavelan_struct_check() != (char *)0)
800 {
801 printk("%s: structure/compiler botch: \"%s\"\n", dev->name, wavelan_struct_check());
802
803 if (wavelan_debug > 0)
804 printk("%s: <-wavelan_probe(): ENODEV\n", dev->name);
805
806 return ENODEV;
807 }
808 #endif
809
810 base_addr = dev->base_addr;
811
812 if (base_addr < 0)
813 {
814
815
816
817 if (wavelan_debug > 0)
818 printk("%s: <-wavelan_probe(): ENXIO\n", dev->name);
819 return ENXIO;
820 }
821
822 if (base_addr > 0x100)
823 {
824
825
826
827 r = wavelan_probe1(dev, base_addr);
828 if (wavelan_debug > 0)
829 printk("%s: <-wavelan_probe(): %d\n", dev->name, r);
830 return r;
831 }
832
833 for (i = 0; i < nels(iobase); i++)
834 {
835 if (check_region(iobase[i], sizeof(ha_t)))
836 continue;
837
838 if (wavelan_probe1(dev, iobase[i]) == 0)
839 {
840 if (wavelan_debug > 0)
841 printk("%s: <-wavelan_probe(): 0\n", dev->name);
842 proc_net_register(&(struct proc_dir_entry) {
843 PROC_NET_WAVELAN, 7, "wavelan",
844 S_IFREG | S_IRUGO, 1, 0, 0,
845 0, &proc_net_inode_operations,
846 wavelan_get_info
847 });
848
849 return 0;
850 }
851 }
852
853 if (wavelan_debug > 0)
854 printk("%s: <-wavelan_probe(): ENODEV\n", dev->name);
855
856 return ENODEV;
857 }
858
859 static
860 int
861 wavelan_probe1(device *dev, unsigned short ioaddr)
862 {
863 psa_t psa;
864 int irq;
865 int i;
866 net_local *lp;
867 int enable_full_promiscuous;
868
869 if (wavelan_debug > 0)
870 printk("%s: ->wavelan_probe1(dev=0x%x, ioaddr=0x%x)\n", dev->name, (unsigned int)dev, ioaddr);
871
872 wavelan_reset(ioaddr);
873
874 psa_read(ioaddr, HACR_DEFAULT, 0, (unsigned char *)&psa, sizeof(psa));
875
876
877
878
879
880 if
881 (
882 psa.psa_univ_mac_addr[0] != SA_ADDR0
883 ||
884 psa.psa_univ_mac_addr[1] != SA_ADDR1
885 ||
886 psa.psa_univ_mac_addr[2] != SA_ADDR2
887 )
888 {
889 if (wavelan_debug > 0)
890 printk("%s: <-wavelan_probe1(): ENODEV\n", dev->name);
891 return ENODEV;
892 }
893
894 printk("%s: WaveLAN at %#x,", dev->name, ioaddr);
895
896 if (dev->irq != 0)
897 {
898 printk("[WARNING: explicit IRQ value %d ignored: using PSA value instead]", dev->irq);
899 #if defined(IRQ_SET_WORKS)
900 Leave this out until I can get it to work -- BJ.
901 if (wavelan_unmap_irq(dev->irq, &psa.psa_int_req_no) == -1)
902 {
903 printk(" could not wavelan_unmap_irq(%d, ..) -- ignored.\n", dev->irq);
904 dev->irq = 0;
905 }
906 else
907 {
908 psa_write(ioaddr, HACR_DEFAULT, (char *)&psa.psa_int_req_no - (char *)&psa, (unsigned char *)&psa.psa_int_req_no, sizeof(psa.psa_int_req_no));
909 wavelan_reset(ioaddr);
910 }
911 #endif
912 }
913
914 if ((irq = wavelan_map_irq(psa.psa_int_req_no)) == -1)
915 {
916 printk(" could not wavelan_map_irq(%d).\n", psa.psa_int_req_no);
917 if (wavelan_debug > 0)
918 printk("%s: <-wavelan_probe1(): EAGAIN\n", dev->name);
919 return EAGAIN;
920 }
921
922 dev->irq = irq;
923
924 request_region(ioaddr, sizeof(ha_t), "wavelan");
925 dev->base_addr = ioaddr;
926
927
928
929
930
931
932
933
934
935
936
937
938 enable_full_promiscuous = (dev->mem_start & ENABLE_FULL_PROMISCUOUS) == ENABLE_FULL_PROMISCUOUS;
939 dev->mem_start &= ~ENABLE_FULL_PROMISCUOUS;
940
941 if (dev->mem_start != 0)
942 {
943 psa.psa_nwid[0] = (dev->mem_start >> 8) & 0xFF;
944 psa.psa_nwid[1] = (dev->mem_start >> 0) & 0xFF;
945 }
946
947 dev->mem_start = 0x0000;
948 dev->mem_end = 0x0000;
949 dev->if_port = 0;
950
951 memcpy(&dev->dev_addr[0], &psa.psa_univ_mac_addr[0], WAVELAN_ADDR_SIZE);
952
953 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
954 printk("%s%02x", (i == 0) ? " " : ":", dev->dev_addr[i]);
955
956 printk(", IRQ %d", dev->irq);
957 if (enable_full_promiscuous)
958 printk(", promisc");
959 printk(", nwid 0x%02x%02x", psa.psa_nwid[0], psa.psa_nwid[1]);
960
961 printk(", PC");
962 switch (psa.psa_comp_number)
963 {
964 case PSA_COMP_PC_AT_915:
965 case PSA_COMP_PC_AT_2400:
966 printk("-AT");
967 break;
968
969 case PSA_COMP_PC_MC_915:
970 case PSA_COMP_PC_MC_2400:
971 printk("-MC");
972 break;
973
974 case PSA_COMP_PCMCIA_915:
975 printk("MCIA");
976 break;
977
978 default:
979 printk("???");
980 break;
981 }
982
983 printk(", ");
984 switch (psa.psa_subband)
985 {
986 case PSA_SUBBAND_915:
987 printk("915");
988 break;
989
990 case PSA_SUBBAND_2425:
991 printk("2425");
992 break;
993
994 case PSA_SUBBAND_2460:
995 printk("2460");
996 break;
997
998 case PSA_SUBBAND_2484:
999 printk("2484");
1000 break;
1001
1002 case PSA_SUBBAND_2430_5:
1003 printk("2430.5");
1004 break;
1005
1006 default:
1007 printk("???");
1008 break;
1009 }
1010 printk(" MHz");
1011
1012 printk("\n");
1013
1014 if (wavelan_debug > 0)
1015 printk(version);
1016
1017 dev->priv = kmalloc(sizeof(net_local), GFP_KERNEL);
1018 memset(dev->priv, 0x00, sizeof(net_local));
1019 lp = (net_local *)dev->priv;
1020
1021 if (first_wavelan == (net_local *)0)
1022 {
1023 first_wavelan = lp;
1024 lp->prev = lp;
1025 lp->next = lp;
1026 }
1027 else
1028 {
1029 lp->prev = first_wavelan->prev;
1030 lp->next = first_wavelan;
1031 first_wavelan->prev->next = lp;
1032 first_wavelan->prev = lp;
1033 }
1034 lp->dev = dev;
1035
1036 lp->hacr = HACR_DEFAULT;
1037
1038 lp->full_promiscuous = enable_full_promiscuous;
1039 lp->nwid[0] = psa.psa_nwid[0];
1040 lp->nwid[1] = psa.psa_nwid[1];
1041
1042 lp->watchdog.function = wavelan_watchdog;
1043 lp->watchdog.data = (unsigned long)dev;
1044
1045 dev->open = wavelan_open;
1046 dev->stop = wavelan_close;
1047 dev->hard_start_xmit = wavelan_send_packet;
1048 dev->get_stats = wavelan_get_stats;
1049 dev->set_multicast_list = &wavelan_set_multicast_list;
1050
1051
1052
1053
1054
1055 ether_setup(dev);
1056
1057 dev->mtu = WAVELAN_MTU;
1058
1059 if (wavelan_debug > 0)
1060 printk("%s: <-wavelan_probe1(): 0\n", dev->name);
1061
1062 return 0;
1063 }
1064
1065
1066
1067
1068
1069 static
1070 void
1071 wavelan_ru_start(device *dev)
1072 {
1073 unsigned short ioaddr;
1074 net_local *lp;
1075 unsigned short scb_cs;
1076 fd_t fd;
1077 rbd_t rbd;
1078 unsigned short rx;
1079 unsigned short rx_next;
1080 int i;
1081
1082 ioaddr = dev->base_addr;
1083 lp = (net_local *)dev->priv;
1084
1085 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
1086 if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY)
1087 return;
1088
1089 lp->rx_head = OFFSET_RU;
1090
1091 for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next)
1092 {
1093 rx_next = (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ;
1094
1095 fd.fd_status = 0;
1096 fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0;
1097 fd.fd_link_offset = rx_next;
1098 fd.fd_rbd_offset = rx + sizeof(fd);
1099 obram_write(ioaddr, rx, (unsigned char *)&fd, sizeof(fd));
1100
1101 rbd.rbd_status = 0;
1102 rbd.rbd_next_rbd_offset = I82586NULL;
1103 rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd);
1104 rbd.rbd_bufh = 0;
1105 rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ);
1106 obram_write(ioaddr, rx + sizeof(fd), (unsigned char *)&rbd, sizeof(rbd));
1107
1108 lp->rx_last = rx;
1109 }
1110
1111 obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset), (unsigned char *)&lp->rx_head, sizeof(lp->rx_head));
1112
1113 scb_cs = SCB_CMD_RUC_GO;
1114 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1115
1116 set_chan_attn(ioaddr, lp->hacr);
1117
1118 for (i = 1000; i > 0; i--)
1119 {
1120 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1121 if (scb_cs == 0)
1122 break;
1123
1124 udelay(1000);
1125 }
1126
1127 if (i <= 0)
1128 printk("%s: wavelan_ru_start(): board not accepting command.\n", dev->name);
1129 }
1130
1131
1132
1133
1134
1135
1136 static
1137 void
1138 wavelan_cu_start(device *dev)
1139 {
1140 unsigned short ioaddr;
1141 net_local *lp;
1142 int i;
1143 unsigned short txblock;
1144 unsigned short first_nop;
1145 unsigned short scb_cs;
1146
1147 ioaddr = dev->base_addr;
1148 lp = (net_local *)dev->priv;
1149
1150 lp->tx_first_free = OFFSET_CU;
1151 lp->tx_first_in_use = I82586NULL;
1152
1153 for
1154 (
1155 i = 0, txblock = OFFSET_CU;
1156 i < NTXBLOCKS;
1157 i++, txblock += TXBLOCKZ
1158 )
1159 {
1160 ac_tx_t tx;
1161 ac_nop_t nop;
1162 tbd_t tbd;
1163 unsigned short tx_addr;
1164 unsigned short nop_addr;
1165 unsigned short tbd_addr;
1166 unsigned short buf_addr;
1167
1168 tx_addr = txblock;
1169 nop_addr = tx_addr + sizeof(tx);
1170 tbd_addr = nop_addr + sizeof(nop);
1171 buf_addr = tbd_addr + sizeof(tbd);
1172
1173 tx.tx_h.ac_status = 0;
1174 tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I;
1175 tx.tx_h.ac_link = nop_addr;
1176 tx.tx_tbd_offset = tbd_addr;
1177 obram_write(ioaddr, tx_addr, (unsigned char *)&tx, sizeof(tx));
1178
1179 nop.nop_h.ac_status = 0;
1180 nop.nop_h.ac_command = acmd_nop;
1181 nop.nop_h.ac_link = nop_addr;
1182 obram_write(ioaddr, nop_addr, (unsigned char *)&nop, sizeof(nop));
1183
1184 tbd.tbd_status = TBD_STATUS_EOF;
1185 tbd.tbd_next_bd_offset = I82586NULL;
1186 tbd.tbd_bufl = buf_addr;
1187 tbd.tbd_bufh = 0;
1188 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1189 }
1190
1191 first_nop = OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t);
1192 obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset), (unsigned char *)&first_nop, sizeof(first_nop));
1193
1194 scb_cs = SCB_CMD_CUC_GO;
1195 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1196
1197 set_chan_attn(ioaddr, lp->hacr);
1198
1199 for (i = 1000; i > 0; i--)
1200 {
1201 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1202 if (scb_cs == 0)
1203 break;
1204
1205 udelay(1000);
1206 }
1207
1208 if (i <= 0)
1209 printk("%s: wavelan_cu_start(): board not accepting command.\n", dev->name);
1210
1211 lp->tx_n_in_use = 0;
1212 dev->tbusy = 0;
1213 }
1214
1215 static
1216 int
1217 wavelan_open(device *dev)
1218 {
1219 unsigned short ioaddr;
1220 net_local *lp;
1221 unsigned long x;
1222 int r;
1223
1224 if (wavelan_debug > 0)
1225 printk("%s: ->wavelan_open(dev=0x%x)\n", dev->name, (unsigned int)dev);
1226
1227 ioaddr = dev->base_addr;
1228 lp = (net_local *)dev->priv;
1229
1230 if (dev->irq == 0)
1231 {
1232 if (wavelan_debug > 0)
1233 printk("%s: <-wavelan_open(): -ENXIO\n", dev->name);
1234 return -ENXIO;
1235 }
1236
1237 if
1238 (
1239 irq2dev_map[dev->irq] != (device *)0
1240
1241 ||
1242 (irq2dev_map[dev->irq] = dev) == (device *)0
1243 ||
1244 request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN") != 0
1245 )
1246 {
1247 irq2dev_map[dev->irq] = (device *)0;
1248 if (wavelan_debug > 0)
1249 printk("%s: <-wavelan_open(): -EAGAIN\n", dev->name);
1250 return -EAGAIN;
1251 }
1252
1253 x = wavelan_splhi();
1254 if ((r = wavelan_hardware_reset(dev)) != -1)
1255 {
1256 dev->interrupt = 0;
1257 dev->start = 1;
1258 }
1259 wavelan_splx(x);
1260
1261 if (r == -1)
1262 {
1263 free_irq(dev->irq);
1264 irq2dev_map[dev->irq] = (device *)0;
1265 if (wavelan_debug > 0)
1266 printk("%s: <-wavelan_open(): -EAGAIN(2)\n", dev->name);
1267 return -EAGAIN;
1268 }
1269
1270 #if defined(MODULE)
1271 MOD_INC_USE_COUNT;
1272 #endif
1273
1274 if (wavelan_debug > 0)
1275 printk("%s: <-wavelan_open(): 0\n", dev->name);
1276
1277 return 0;
1278 }
1279
1280 static
1281 void
1282 hardware_send_packet(device *dev, void *buf, short length)
1283 {
1284 unsigned short ioaddr;
1285 net_local *lp;
1286 unsigned short txblock;
1287 unsigned short txpred;
1288 unsigned short tx_addr;
1289 unsigned short nop_addr;
1290 unsigned short tbd_addr;
1291 unsigned short buf_addr;
1292 ac_tx_t tx;
1293 ac_nop_t nop;
1294 tbd_t tbd;
1295 unsigned long x;
1296
1297 ioaddr = dev->base_addr;
1298 lp = (net_local *)dev->priv;
1299
1300 x = wavelan_splhi();
1301
1302 txblock = lp->tx_first_free;
1303 txpred = txblock - TXBLOCKZ;
1304 if (txpred < OFFSET_CU)
1305 txpred += NTXBLOCKS * TXBLOCKZ;
1306 lp->tx_first_free += TXBLOCKZ;
1307 if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1308 lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
1309
1310
1311
1312
1313
1314
1315 lp->tx_n_in_use++;
1316
1317 tx_addr = txblock;
1318 nop_addr = tx_addr + sizeof(tx);
1319 tbd_addr = nop_addr + sizeof(nop);
1320 buf_addr = tbd_addr + sizeof(tbd);
1321
1322
1323
1324
1325 tx.tx_h.ac_status = 0;
1326 obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status), (unsigned char *)&tx.tx_h.ac_status, sizeof(tx.tx_h.ac_status));
1327
1328
1329
1330
1331 nop.nop_h.ac_status = 0;
1332 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1333 nop.nop_h.ac_link = nop_addr;
1334 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1335
1336
1337
1338
1339 tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & length);
1340 tbd.tbd_next_bd_offset = I82586NULL;
1341 tbd.tbd_bufl = buf_addr;
1342 tbd.tbd_bufh = 0;
1343 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1344
1345
1346
1347
1348 obram_write(ioaddr, buf_addr, buf, length);
1349
1350
1351
1352
1353
1354 nop_addr = txpred + sizeof(tx);
1355 nop.nop_h.ac_status = 0;
1356 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1357 nop.nop_h.ac_link = txblock;
1358 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1359
1360 if (lp->tx_first_in_use == I82586NULL)
1361 lp->tx_first_in_use = txblock;
1362
1363 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1364 dev->tbusy = 0;
1365
1366 dev->trans_start = jiffies;
1367
1368 if (lp->watchdog.next == (timer_list *)0)
1369 wavelan_watchdog((unsigned long)dev);
1370
1371 wavelan_splx(x);
1372
1373 if (wavelan_debug > 4)
1374 {
1375 unsigned char *a;
1376
1377 a = (unsigned char *)buf;
1378
1379 printk
1380 (
1381 "%s: tx: dest %02x:%02x:%02x:%02x:%02x:%02x, length %d, tbd.tbd_bufl 0x%x.\n",
1382 dev->name,
1383 a[0], a[1], a[2], a[3], a[4], a[5],
1384 length,
1385 buf_addr
1386 );
1387 }
1388 }
1389
1390 static
1391 int
1392 wavelan_send_packet(struct sk_buff *skb, device *dev)
1393 {
1394 unsigned short ioaddr;
1395
1396 ioaddr = dev->base_addr;
1397
1398 if (dev->tbusy)
1399 {
1400
1401
1402
1403
1404 int tickssofar;
1405
1406 tickssofar = jiffies - dev->trans_start;
1407
1408
1409
1410
1411
1412
1413
1414
1415 return 1;
1416
1417 wavelan_scb_show(ioaddr);
1418 wavelan_ru_show(dev);
1419 wavelan_cu_show(dev);
1420 wavelan_dev_show(dev);
1421 wavelan_local_show(dev);
1422
1423 printk("%s: transmit timed out -- resetting board.\n", dev->name);
1424
1425 (void)wavelan_hardware_reset(dev);
1426 }
1427
1428
1429
1430
1431
1432
1433 if (skb == (struct sk_buff *)0)
1434 {
1435 dev_tint(dev);
1436 return 0;
1437 }
1438
1439
1440
1441
1442 if (set_bit(0, (void *)&dev->tbusy) == 0)
1443 {
1444 short length;
1445 unsigned char *buf;
1446
1447 length = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
1448 buf = skb->data;
1449
1450 hardware_send_packet(dev, buf, length);
1451 }
1452 else
1453 printk("%s: Transmitter access conflict.\n", dev->name);
1454
1455 dev_kfree_skb(skb, FREE_WRITE);
1456
1457 return 0;
1458 }
1459
1460 #if 0
1461 static
1462 int
1463 addrcmp(unsigned char *a0, unsigned char *a1)
1464 {
1465 int i;
1466
1467 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1468 {
1469 if (a0[i] != a1[i])
1470 return a0[i] - a1[i];
1471 }
1472
1473 return 0;
1474 }
1475 #endif
1476
1477
1478
1479
1480
1481
1482 static
1483 void
1484 wavelan_receive(device *dev)
1485 {
1486 unsigned short ioaddr;
1487 net_local *lp;
1488 int nreaped;
1489
1490 ioaddr = dev->base_addr;
1491 lp = (net_local *)dev->priv;
1492 nreaped = 0;
1493
1494 for (;;)
1495 {
1496 fd_t fd;
1497 rbd_t rbd;
1498 ushort pkt_len;
1499 int sksize;
1500 struct sk_buff *skb;
1501
1502 obram_read(ioaddr, lp->rx_head, (unsigned char *)&fd, sizeof(fd));
1503
1504 if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C)
1505 break;
1506
1507 nreaped++;
1508
1509 if
1510 (
1511 (fd.fd_status & (FD_STATUS_B | FD_STATUS_OK))
1512 !=
1513 (FD_STATUS_B | FD_STATUS_OK)
1514 )
1515 {
1516
1517
1518
1519
1520
1521
1522
1523 if ((fd.fd_status & FD_STATUS_OK) != FD_STATUS_OK)
1524 printk("%s: frame not received successfully.\n", dev->name);
1525 }
1526
1527 if ((fd.fd_status & (FD_STATUS_S6 | FD_STATUS_S7 | FD_STATUS_S8 | FD_STATUS_S9 | FD_STATUS_S10 | FD_STATUS_S11)) != 0)
1528 {
1529 lp->stats.rx_errors++;
1530
1531 if ((fd.fd_status & FD_STATUS_S6) != 0)
1532 printk("%s: no EOF flag.\n", dev->name);
1533
1534 if ((fd.fd_status & FD_STATUS_S7) != 0)
1535 {
1536 lp->stats.rx_length_errors++;
1537 printk("%s: frame too short.\n", dev->name);
1538 }
1539
1540 if ((fd.fd_status & FD_STATUS_S8) != 0)
1541 {
1542 lp->stats.rx_over_errors++;
1543 printk("%s: rx DMA overrun.\n", dev->name);
1544 }
1545
1546 if ((fd.fd_status & FD_STATUS_S9) != 0)
1547 {
1548 lp->stats.rx_fifo_errors++;
1549 printk("%s: ran out of resources.\n", dev->name);
1550 }
1551
1552 if ((fd.fd_status & FD_STATUS_S10) != 0)
1553 {
1554 lp->stats.rx_frame_errors++;
1555 printk("%s: alignment error.\n", dev->name);
1556 }
1557
1558 if ((fd.fd_status & FD_STATUS_S11) != 0)
1559 {
1560 lp->stats.rx_crc_errors++;
1561 printk("%s: CRC error.\n", dev->name);
1562 }
1563 }
1564
1565 if (fd.fd_rbd_offset == I82586NULL)
1566 printk("%s: frame has no data.\n", dev->name);
1567 else
1568 {
1569 obram_read(ioaddr, fd.fd_rbd_offset, (unsigned char *)&rbd, sizeof(rbd));
1570
1571 if ((rbd.rbd_status & RBD_STATUS_EOF) != RBD_STATUS_EOF)
1572 printk("%s: missing EOF flag.\n", dev->name);
1573
1574 if ((rbd.rbd_status & RBD_STATUS_F) != RBD_STATUS_F)
1575 printk("%s: missing F flag.\n", dev->name);
1576
1577 pkt_len = rbd.rbd_status & RBD_STATUS_ACNT;
1578
1579 #if 0
1580 {
1581 unsigned char addr[WAVELAN_ADDR_SIZE];
1582 int i;
1583 static unsigned char toweraddr[WAVELAN_ADDR_SIZE] =
1584 {
1585 0x08, 0x00, 0x0e, 0x20, 0x3e, 0xd3,
1586 };
1587
1588 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1589 if
1590 (
1591
1592
1593
1594
1595 addrcmp(&addr[0], toweraddr) != 0
1596 )
1597 {
1598 printk("%s: foreign MAC source addr=", dev->name);
1599 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1600 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1601 printk("\n");
1602 }
1603 }
1604 #endif
1605
1606 if (wavelan_debug > 5)
1607 {
1608 unsigned char addr[WAVELAN_ADDR_SIZE];
1609 unsigned short ltype;
1610 int i;
1611
1612 #if 0
1613 printk("%s: fd_dest=", dev->name);
1614 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1615 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_dest[i]);
1616 printk("\n");
1617
1618 printk("%s: fd_src=", dev->name);
1619 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1620 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_src[i]);
1621 printk("\n");
1622 printk("%s: fd_length=%d\n", dev->name, fd.fd_length);
1623 #endif
1624
1625 obram_read(ioaddr, rbd.rbd_bufl, &addr[0], sizeof(addr));
1626 printk("%s: dest=", dev->name);
1627 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1628 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1629 printk("\n");
1630
1631 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1632 printk("%s: src=", dev->name);
1633 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1634 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1635 printk("\n");
1636
1637 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr) * 2, (unsigned char *)<ype, sizeof(ltype));
1638 printk("%s: ntohs(length/type)=0x%04x\n", dev->name, ntohs(ltype));
1639 }
1640
1641 sksize = pkt_len;
1642
1643 if ((skb = dev_alloc_skb(sksize)) == (struct sk_buff *)0)
1644 {
1645 printk("%s: could not alloc_skb(%d, GFP_ATOMIC).\n", dev->name, sksize);
1646 lp->stats.rx_dropped++;
1647 }
1648 else
1649 {
1650 skb->dev = dev;
1651
1652 obram_read(ioaddr, rbd.rbd_bufl, skb_put(skb,pkt_len), pkt_len);
1653
1654 if (wavelan_debug > 5)
1655 {
1656 int i;
1657 int maxi;
1658
1659 printk("%s: pkt_len=%d, data=\"", dev->name, pkt_len);
1660
1661 if ((maxi = pkt_len) > 16)
1662 maxi = 16;
1663
1664 for (i = 0; i < maxi; i++)
1665 {
1666 unsigned char c;
1667
1668 c = skb->data[i];
1669 if (c >= ' ' && c <= '~')
1670 printk(" %c", skb->data[i]);
1671 else
1672 printk("%02x", skb->data[i]);
1673 }
1674
1675 if (maxi < pkt_len)
1676 printk("..");
1677
1678 printk("\"\n\n");
1679 }
1680
1681 skb->protocol=eth_type_trans(skb,dev);
1682 netif_rx(skb);
1683
1684 lp->stats.rx_packets++;
1685 }
1686 }
1687
1688 fd.fd_status = 0;
1689 obram_write(ioaddr, fdoff(lp->rx_head, fd_status), (unsigned char *)&fd.fd_status, sizeof(fd.fd_status));
1690
1691 fd.fd_command = FD_COMMAND_EL;
1692 obram_write(ioaddr, fdoff(lp->rx_head, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1693
1694 fd.fd_command = 0;
1695 obram_write(ioaddr, fdoff(lp->rx_last, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1696
1697 lp->rx_last = lp->rx_head;
1698 lp->rx_head = fd.fd_link_offset;
1699 }
1700
1701
1702
1703
1704
1705 }
1706
1707
1708
1709
1710
1711 static
1712 int
1713 wavelan_complete(device *dev, unsigned short ioaddr, net_local *lp)
1714 {
1715 int nreaped;
1716
1717 nreaped = 0;
1718
1719 for (;;)
1720 {
1721 unsigned short tx_status;
1722
1723 if (lp->tx_first_in_use == I82586NULL)
1724 break;
1725
1726 obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status), (unsigned char *)&tx_status, sizeof(tx_status));
1727
1728 if ((tx_status & AC_SFLD_C) == 0)
1729 break;
1730
1731 nreaped++;
1732
1733 --lp->tx_n_in_use;
1734
1735
1736
1737
1738
1739
1740 if (lp->tx_n_in_use <= 0)
1741 lp->tx_first_in_use = I82586NULL;
1742 else
1743 {
1744 lp->tx_first_in_use += TXBLOCKZ;
1745 if (lp->tx_first_in_use >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1746 lp->tx_first_in_use -= NTXBLOCKS * TXBLOCKZ;
1747 }
1748
1749 if (tx_status & AC_SFLD_OK)
1750 {
1751 int ncollisions;
1752
1753 lp->stats.tx_packets++;
1754 ncollisions = tx_status & AC_SFLD_MAXCOL;
1755 lp->stats.collisions += ncollisions;
1756
1757
1758
1759
1760 }
1761 else
1762 {
1763 lp->stats.tx_errors++;
1764 if (tx_status & AC_SFLD_S10)
1765 {
1766 lp->stats.tx_carrier_errors++;
1767 if (wavelan_debug > 0)
1768 printk("%s: tx error: no CS.\n", dev->name);
1769 }
1770 if (tx_status & AC_SFLD_S9)
1771 {
1772 lp->stats.tx_carrier_errors++;
1773 printk("%s: tx error: lost CTS.\n", dev->name);
1774 }
1775 if (tx_status & AC_SFLD_S8)
1776 {
1777 lp->stats.tx_fifo_errors++;
1778 printk("%s: tx error: slow DMA.\n", dev->name);
1779 }
1780 if (tx_status & AC_SFLD_S6)
1781 {
1782 lp->stats.tx_heartbeat_errors++;
1783 if (wavelan_debug > 0)
1784 printk("%s: tx error: heart beat.\n", dev->name);
1785 }
1786 if (tx_status & AC_SFLD_S5)
1787 {
1788 lp->stats.tx_aborted_errors++;
1789 if (wavelan_debug > 0)
1790 printk("%s: tx error: too many collisions.\n", dev->name);
1791 }
1792 }
1793
1794 if (wavelan_debug > 5)
1795 printk("%s: tx completed, tx_status 0x%04x.\n", dev->name, tx_status);
1796 }
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1807 {
1808 dev->tbusy = 0;
1809 mark_bh(NET_BH);
1810 }
1811
1812 return nreaped;
1813 }
1814
1815 static
1816 void
1817 wavelan_watchdog(unsigned long a)
1818 {
1819 device *dev;
1820 net_local *lp;
1821 unsigned short ioaddr;
1822 unsigned long x;
1823 unsigned int nreaped;
1824
1825 x = wavelan_splhi();
1826
1827 dev = (device *)a;
1828 ioaddr = dev->base_addr;
1829 lp = (net_local *)dev->priv;
1830
1831 if (lp->tx_n_in_use <= 0)
1832 {
1833 wavelan_splx(x);
1834 return;
1835 }
1836
1837 lp->watchdog.expires = jiffies+WATCHDOG_JIFFIES;
1838 add_timer(&lp->watchdog);
1839
1840 if (jiffies - dev->trans_start < WATCHDOG_JIFFIES)
1841 {
1842 wavelan_splx(x);
1843 return;
1844 }
1845
1846 nreaped = wavelan_complete(dev, ioaddr, lp);
1847
1848 printk("%s: warning: wavelan_watchdog(): %d reaped, %d remain.\n", dev->name, nreaped, lp->tx_n_in_use);
1849
1850
1851
1852
1853
1854
1855
1856
1857 wavelan_splx(x);
1858 }
1859
1860 static
1861 void
1862 wavelan_interrupt(int irq, struct pt_regs *regs)
1863 {
1864 device *dev;
1865 unsigned short ioaddr;
1866 net_local *lp;
1867 unsigned short hasr;
1868 unsigned short status;
1869 unsigned short ack_cmd;
1870
1871 if ((dev = (device *)(irq2dev_map[irq])) == (device *)0)
1872 {
1873 printk("wavelan_interrupt(): irq %d for unknown device.\n", irq);
1874 return;
1875 }
1876
1877 ioaddr = dev->base_addr;
1878 lp = (net_local *)dev->priv;
1879
1880 dev->interrupt = 1;
1881
1882 if ((hasr = hasr_read(ioaddr)) & HASR_MMC_INTR)
1883 {
1884 unsigned char dce_status;
1885
1886
1887
1888
1889
1890 mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status, sizeof(dce_status));
1891 if (wavelan_debug > 0)
1892 printk("%s: warning: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n", dev->name, dce_status);
1893 }
1894
1895 if ((hasr & HASR_82586_INTR) == 0)
1896 {
1897 dev->interrupt = 0;
1898 if (wavelan_debug > 0)
1899 printk("%s: warning: wavelan_interrupt() but (hasr & HASR_82586_INTR) == 0.\n", dev->name);
1900 return;
1901 }
1902
1903 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&status, sizeof(status));
1904
1905
1906
1907
1908 ack_cmd = status & SCB_ST_INT;
1909
1910 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&ack_cmd, sizeof(ack_cmd));
1911
1912 set_chan_attn(ioaddr, lp->hacr);
1913
1914 if (wavelan_debug > 5)
1915 printk("%s: interrupt, status 0x%04x.\n", dev->name, status);
1916
1917 if ((status & SCB_ST_CX) == SCB_ST_CX)
1918 {
1919
1920
1921
1922 if (wavelan_debug > 5)
1923 printk("%s: command completed.\n", dev->name);
1924 (void)wavelan_complete(dev, ioaddr, lp);
1925 }
1926
1927 if ((status & SCB_ST_FR) == SCB_ST_FR)
1928 {
1929
1930
1931
1932 if (wavelan_debug > 5)
1933 printk("%s: received packet.\n", dev->name);
1934 wavelan_receive(dev);
1935 }
1936
1937 if
1938 (
1939 (status & SCB_ST_CNA) == SCB_ST_CNA
1940 ||
1941 (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) && dev->start)
1942 )
1943 {
1944 printk("%s: warning: CU inactive -- restarting.\n", dev->name);
1945
1946 (void)wavelan_hardware_reset(dev);
1947 }
1948
1949 if
1950 (
1951 (status & SCB_ST_RNR) == SCB_ST_RNR
1952 ||
1953 (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) && dev->start)
1954 )
1955 {
1956 printk("%s: warning: RU not ready -- restarting.\n", dev->name);
1957
1958 (void)wavelan_hardware_reset(dev);
1959 }
1960
1961 dev->interrupt = 0;
1962 }
1963
1964 static
1965 int
1966 wavelan_close(device *dev)
1967 {
1968 unsigned short ioaddr;
1969 net_local *lp;
1970 unsigned short scb_cmd;
1971
1972 if (wavelan_debug > 0)
1973 printk("%s: ->wavelan_close(dev=0x%x)\n", dev->name, (unsigned int)dev);
1974
1975 ioaddr = dev->base_addr;
1976 lp = (net_local *)dev->priv;
1977
1978 dev->tbusy = 1;
1979 dev->start = 0;
1980
1981
1982
1983
1984 scb_cmd = (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC & SCB_CMD_RUC_SUS);
1985 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
1986 set_chan_attn(ioaddr, lp->hacr);
1987
1988 wavelan_ints_off(dev);
1989
1990 free_irq(dev->irq);
1991 irq2dev_map[dev->irq] = (device *)0;
1992
1993
1994
1995
1996 release_region(ioaddr, sizeof(ha_t));
1997
1998 #if defined(MODULE)
1999 MOD_DEC_USE_COUNT;
2000 #endif
2001
2002 if (wavelan_debug > 0)
2003 printk("%s: <-wavelan_close(): 0\n", dev->name);
2004
2005 return 0;
2006 }
2007
2008
2009
2010
2011
2012 static
2013 en_stats *
2014 wavelan_get_stats(device *dev)
2015 {
2016 net_local *lp;
2017
2018 lp = (net_local *)dev->priv;
2019
2020 return &lp->stats;
2021 }
2022
2023 static
2024 void
2025 wavelan_set_multicast_list(device *dev, int num_addrs, void *addrs)
2026 {
2027 net_local *lp;
2028 unsigned long x;
2029
2030 if (wavelan_debug > 0)
2031 printk("%s: ->wavelan_set_multicast_list(dev=0x%x, num_addrs=%d, addrs=0x%x)\n", dev->name, (unsigned int)dev, num_addrs, (unsigned int)addrs);
2032
2033 lp = (net_local *)dev->priv;
2034
2035 switch (num_addrs)
2036 {
2037 case -1:
2038
2039
2040
2041 lp->promiscuous = 1;
2042 x = wavelan_splhi();
2043 (void)wavelan_hardware_reset(dev);
2044 wavelan_splx(x);
2045 break;
2046
2047 case 0:
2048
2049
2050
2051
2052 lp->promiscuous = 0;
2053 x = wavelan_splhi();
2054 (void)wavelan_hardware_reset(dev);
2055 wavelan_splx(x);
2056 break;
2057
2058 default:
2059
2060
2061
2062
2063 break;
2064 }
2065
2066 if (wavelan_debug > 0)
2067 printk("%s: <-wavelan_set_multicast_list()\n", dev->name);
2068 }
2069
2070
2071
2072
2073
2074 static
2075 int
2076 sprintf_stats(char *buffer, device *dev)
2077 {
2078 net_local *lp;
2079 unsigned char v;
2080 mmr_t m;
2081
2082 lp = (net_local *)dev->priv;
2083
2084 if (lp == (net_local *)0)
2085 return sprintf(buffer, "%6s: No statistics available.\n", dev->name);
2086
2087 v = (unsigned char)1;
2088 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
2089
2090 mmc_read(dev->base_addr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, sizeof(m.mmr_dce_status));
2091 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_h), &m.mmr_correct_nwid_h, sizeof(m.mmr_correct_nwid_h));
2092 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_l), &m.mmr_correct_nwid_l, sizeof(m.mmr_correct_nwid_l));
2093 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_h), &m.mmr_wrong_nwid_h, sizeof(m.mmr_wrong_nwid_h));
2094 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, sizeof(m.mmr_wrong_nwid_l));
2095 mmc_read(dev->base_addr, mmroff(0, mmr_signal_lvl), &m.mmr_signal_lvl, sizeof(m.mmr_signal_lvl));
2096 mmc_read(dev->base_addr, mmroff(0, mmr_silence_lvl), &m.mmr_silence_lvl, sizeof(m.mmr_silence_lvl));
2097 mmc_read(dev->base_addr, mmroff(0, mmr_sgnl_qual), &m.mmr_sgnl_qual, sizeof(m.mmr_sgnl_qual));
2098
2099 v = (unsigned char)0;
2100 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
2101
2102 lp->correct_nwid += (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l;
2103 lp->wrong_nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
2104
2105 return sprintf
2106 (
2107 buffer,
2108 "%6s: %02x %08x %08x %02x %02x %02x %02x %u\n",
2109 dev->name,
2110 m.mmr_dce_status,
2111 lp->correct_nwid,
2112 lp->wrong_nwid,
2113 m.mmr_signal_lvl,
2114 m.mmr_silence_lvl,
2115 m.mmr_sgnl_qual,
2116 lp->tx_n_in_use,
2117 lp->nresets
2118 );
2119 }
2120
2121 static int
2122 wavelan_get_info(char *buffer, char **start, off_t offset, int length, int dummy)
2123 {
2124 int len;
2125 off_t begin;
2126 off_t pos;
2127 int size;
2128 unsigned long x;
2129
2130 len = 0;
2131 begin = 0;
2132 pos = 0;
2133
2134 size = sprintf(buffer, "%s", "Iface | dce +nwid -nwid lvl slnc qual ntxq nrst\n");
2135
2136 pos += size;
2137 len += size;
2138
2139 x = wavelan_splhi();
2140
2141 if (first_wavelan != (net_local *)0)
2142 {
2143 net_local *lp;
2144
2145 lp = first_wavelan;
2146 do
2147 {
2148 size = sprintf_stats(buffer + len, lp->dev);
2149
2150 len += size;
2151 pos = begin + len;
2152
2153 if (pos < offset)
2154 {
2155 len = 0;
2156 begin = pos;
2157 }
2158
2159 if (pos > offset + length)
2160 break;
2161 }
2162 while ((lp = lp->next) != first_wavelan);
2163 }
2164
2165 wavelan_splx(x);
2166
2167 *start = buffer + (offset - begin);
2168 len -= (offset - begin);
2169 if (len > length)
2170 len = length;
2171
2172 return len;
2173 }
2174
2175 #if defined(MODULE)
2176 char kernel_version[] = UTS_RELEASE;
2177 static char devicename[9] = { 0, };
2178 static struct device dev_wavelan =
2179 {
2180 devicename,
2181 0, 0, 0, 0,
2182 0, 0,
2183 0, 0, 0, NULL, wavelan_probe
2184 };
2185
2186 int io = 0x390;
2187 int irq = 0;
2188
2189 int
2190 init_module(void)
2191 {
2192 dev_wavelan.base_addr = io;
2193 dev_wavelan.irq = irq;
2194 if (register_netdev(&dev_wavelan) != 0)
2195 return -EIO;
2196
2197 return 0;
2198 }
2199
2200 void
2201 cleanup_module(void)
2202 {
2203 if (MOD_IN_USE)
2204 printk("wavelan: device busy, remove delayed\n");
2205 else
2206 {
2207 proc_net_unregister(PROC_NET_WAVELAN);
2208 unregister_netdev(&dev_wavelan);
2209 kfree_s(dev_wavelan.priv, sizeof(struct net_local));
2210 dev_wavelan.priv = NULL;
2211 }
2212 }
2213 #endif
2214
2215 static
2216 void
2217 wavelan_cu_show_one(device *dev, net_local *lp, int i, unsigned short p)
2218 {
2219 unsigned short ioaddr;
2220 ac_tx_t actx;
2221
2222 ioaddr = dev->base_addr;
2223
2224 printk("%d: 0x%x:", i, p);
2225
2226 obram_read(ioaddr, p, (unsigned char *)&actx, sizeof(actx));
2227 printk(" status=0x%x,", actx.tx_h.ac_status);
2228 printk(" command=0x%x,", actx.tx_h.ac_command);
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239 printk("|");
2240 }
2241
2242 #if 0
2243 static
2244 void
2245 wavelan_psa_show(psa_t *p)
2246 {
2247 printk("psa:");
2248
2249 printk("psa_io_base_addr_1: 0x%02x,", p->psa_io_base_addr_1);
2250 printk("psa_io_base_addr_2: 0x%02x,", p->psa_io_base_addr_2);
2251 printk("psa_io_base_addr_3: 0x%02x,", p->psa_io_base_addr_3);
2252 printk("psa_io_base_addr_4: 0x%02x,", p->psa_io_base_addr_4);
2253 printk("psa_rem_boot_addr_1: 0x%02x,", p->psa_rem_boot_addr_1);
2254 printk("psa_rem_boot_addr_2: 0x%02x,", p->psa_rem_boot_addr_2);
2255 printk("psa_rem_boot_addr_3: 0x%02x,", p->psa_rem_boot_addr_3);
2256 printk("psa_holi_params: 0x%02x,", p->psa_holi_params);
2257 printk("psa_int_req_no: %d,", p->psa_int_req_no);
2258 printk
2259 (
2260 "psa_univ_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2261 p->psa_univ_mac_addr[0],
2262 p->psa_univ_mac_addr[1],
2263 p->psa_univ_mac_addr[2],
2264 p->psa_univ_mac_addr[3],
2265 p->psa_univ_mac_addr[4],
2266 p->psa_univ_mac_addr[5]
2267 );
2268 printk
2269 (
2270 "psa_local_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2271 p->psa_local_mac_addr[0],
2272 p->psa_local_mac_addr[1],
2273 p->psa_local_mac_addr[2],
2274 p->psa_local_mac_addr[3],
2275 p->psa_local_mac_addr[4],
2276 p->psa_local_mac_addr[5]
2277 );
2278 printk("psa_univ_local_sel: %d,", p->psa_univ_local_sel);
2279 printk("psa_comp_number: %d,", p->psa_comp_number);
2280 printk("psa_thr_pre_set: 0x%02x,", p->psa_thr_pre_set);
2281 printk("psa_feature_select/decay_prm: 0x%02x,", p->psa_feature_select);
2282 printk("psa_subband/decay_update_prm: %d,", p->psa_subband);
2283 printk("psa_quality_thr: 0x%02x,", p->psa_quality_thr);
2284 printk("psa_mod_delay: 0x%02x,", p->psa_mod_delay);
2285 printk("psa_nwid: 0x%02x%02x,", p->psa_nwid[0], p->psa_nwid[1]);
2286 printk("psa_undefined: %d,", p->psa_undefined);
2287 printk("psa_encryption_select: %d,", p->psa_encryption_select);
2288 printk
2289 (
2290 "psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x,",
2291 p->psa_encryption_key[0],
2292 p->psa_encryption_key[1],
2293 p->psa_encryption_key[2],
2294 p->psa_encryption_key[3],
2295 p->psa_encryption_key[4],
2296 p->psa_encryption_key[5],
2297 p->psa_encryption_key[6],
2298 p->psa_encryption_key[7]
2299 );
2300 printk("psa_databus_width: %d,", p->psa_databus_width);
2301 printk("psa_call_code/auto_squelch: 0x%02x,", p->psa_call_code);
2302 printk("psa_no_of_retries: %d,", p->psa_no_of_retries);
2303 printk("psa_acr: %d,", p->psa_acr);
2304 printk("psa_dump_count: %d,", p->psa_dump_count);
2305 printk("psa_nwid_prefix: 0x%02x,", p->psa_nwid_prefix);
2306 printk("psa_conf_status: %d,", p->psa_conf_status);
2307 printk("psa_crc: 0x%02x%02x,", p->psa_crc[0], p->psa_crc[1]);
2308 printk("psa_crc_status: 0x%02x,", p->psa_crc_status);
2309
2310 printk("\n");
2311 }
2312
2313 static
2314 void
2315 wavelan_mmc_show(unsigned short ioaddr)
2316 {
2317 mmr_t m;
2318
2319 mmc_read(ioaddr, 0, (unsigned char *)&m, sizeof(m));
2320
2321 printk("mmr:");
2322 printk(" des_status: 0x%x", m.mmr_des_status);
2323 printk(" des_avail: 0x%x", m.mmr_des_avail);
2324 printk(" des_io_invert: 0x%x", m.mmr_des_io_invert);
2325 printk
2326 (
2327 " dce_status: 0x%x[%s%s%s%s]",
2328 m.mmr_dce_status & 0x0F,
2329 (m.mmr_dce_status & MMR_DCE_STATUS_ENERG_DET) ? "energy detected," : "",
2330 (m.mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ? "loop test indicated," : "",
2331 (m.mmr_dce_status & MMR_DCE_STATUS_XMTITR_IND) ? "transmitter on," : "",
2332 (m.mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ? "jabber timer expired," : ""
2333 );
2334 printk(" correct_nwid: %d", m.mmr_correct_nwid_h << 8 | m.mmr_correct_nwid_l);
2335 printk(" wrong_nwid: %d", (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
2336 printk(" thr_pre_set: 0x%x", m.mmr_thr_pre_set);
2337 printk(" signal_lvl: %d", m.mmr_signal_lvl);
2338 printk(" silence_lvl: %d", m.mmr_silence_lvl);
2339 printk(" sgnl_qual: 0x%x", m.mmr_sgnl_qual);
2340 printk(" netw_id_l: %x", m.mmr_netw_id_l);
2341
2342 printk("\n");
2343 }
2344 #endif
2345
2346 static
2347 void
2348 wavelan_scb_show(unsigned short ioaddr)
2349 {
2350 scb_t scb;
2351
2352 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
2353
2354 printk("scb:");
2355
2356 printk(" status:");
2357 printk
2358 (
2359 " stat 0x%x[%s%s%s%s]",
2360 (scb.scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA | SCB_ST_RNR)) >> 12,
2361 (scb.scb_status & SCB_ST_CX) ? "cmd completion interrupt," : "",
2362 (scb.scb_status & SCB_ST_FR) ? "frame received," : "",
2363 (scb.scb_status & SCB_ST_CNA) ? "cmd unit not active," : "",
2364 (scb.scb_status & SCB_ST_RNR) ? "rcv unit not ready," : ""
2365 );
2366 printk
2367 (
2368 " cus 0x%x[%s%s%s]",
2369 (scb.scb_status & SCB_ST_CUS) >> 8,
2370 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_IDLE) ? "idle" : "",
2371 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_SUSP) ? "suspended" : "",
2372 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_ACTV) ? "active" : ""
2373 );
2374 printk
2375 (
2376 " rus 0x%x[%s%s%s%s]",
2377 (scb.scb_status & SCB_ST_RUS) >> 4,
2378 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_IDLE) ? "idle" : "",
2379 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_SUSP) ? "suspended" : "",
2380 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_NRES) ? "no resources" : "",
2381 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_RDY) ? "ready" : ""
2382 );
2383
2384 printk(" command:");
2385 printk
2386 (
2387 " ack 0x%x[%s%s%s%s]",
2388 (scb.scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR | SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12,
2389 (scb.scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "",
2390 (scb.scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "",
2391 (scb.scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "",
2392 (scb.scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : ""
2393 );
2394 printk
2395 (
2396 " cuc 0x%x[%s%s%s%s%s]",
2397 (scb.scb_command & SCB_CMD_CUC) >> 8,
2398 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_NOP) ? "nop" : "",
2399 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_GO) ? "start cbl_offset" : "",
2400 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_RES) ? "resume execution" : "",
2401 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_SUS) ? "suspend execution" : "",
2402 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_ABT) ? "abort execution" : ""
2403 );
2404 printk
2405 (
2406 " ruc 0x%x[%s%s%s%s%s]",
2407 (scb.scb_command & SCB_CMD_RUC) >> 4,
2408 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_NOP) ? "nop" : "",
2409 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_GO) ? "start rfa_offset" : "",
2410 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_RES) ? "resume reception" : "",
2411 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_SUS) ? "suspend reception" : "",
2412 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_ABT) ? "abort reception" : ""
2413 );
2414
2415 printk(" cbl_offset 0x%x", scb.scb_cbl_offset);
2416 printk(" rfa_offset 0x%x", scb.scb_rfa_offset);
2417
2418 printk(" crcerrs %d", scb.scb_crcerrs);
2419 printk(" alnerrs %d", scb.scb_alnerrs);
2420 printk(" rscerrs %d", scb.scb_rscerrs);
2421 printk(" ovrnerrs %d", scb.scb_ovrnerrs);
2422
2423 printk("\n");
2424 }
2425
2426 static
2427 void
2428 wavelan_ru_show(device *dev)
2429 {
2430 net_local *lp;
2431
2432 lp = (net_local *)dev->priv;
2433
2434 printk("ru:");
2435
2436
2437
2438 printk("\n");
2439 }
2440
2441 static
2442 void
2443 wavelan_cu_show(device *dev)
2444 {
2445 net_local *lp;
2446 unsigned int i;
2447 unsigned short p;
2448
2449 lp = (net_local *)dev->priv;
2450
2451 printk("cu:");
2452 printk("\n");
2453
2454 for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++)
2455 {
2456 wavelan_cu_show_one(dev, lp, i, p);
2457
2458 p += TXBLOCKZ;
2459 if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
2460 p -= NTXBLOCKS * TXBLOCKZ;
2461 }
2462 }
2463
2464 static
2465 void
2466 wavelan_dev_show(device *dev)
2467 {
2468 printk("dev:");
2469 printk(" start=%d,", dev->start);
2470 printk(" tbusy=%ld,", dev->tbusy);
2471 printk(" interrupt=%d,", dev->interrupt);
2472 printk(" trans_start=%ld,", dev->trans_start);
2473 printk(" flags=0x%x,", dev->flags);
2474 printk("\n");
2475 }
2476
2477 static
2478 void
2479 wavelan_local_show(device *dev)
2480 {
2481 net_local *lp;
2482
2483 lp = (net_local *)dev->priv;
2484
2485 printk("local:");
2486 printk(" tx_n_in_use=%d,", lp->tx_n_in_use);
2487 printk(" hacr=0x%x,", lp->hacr);
2488 printk(" rx_head=0x%x,", lp->rx_head);
2489 printk(" rx_last=0x%x,", lp->rx_last);
2490 printk(" tx_first_free=0x%x,", lp->tx_first_free);
2491 printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use);
2492 printk("\n");
2493 }
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