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39 #ifndef PCI_H
40 #define PCI_H
41
42
43
44
45
46 #define PCI_VENDOR_ID 0x00
47 #define PCI_DEVICE_ID 0x02
48 #define PCI_COMMAND 0x04
49 #define PCI_COMMAND_IO 0x1
50 #define PCI_COMMAND_MEMORY 0x2
51 #define PCI_COMMAND_MASTER 0x4
52 #define PCI_COMMAND_SPECIAL 0x8
53 #define PCI_COMMAND_INVALIDATE 0x10
54 #define PCI_COMMAND_VGA_PALETTE 0x20
55 #define PCI_COMMAND_PARITY 0x40
56 #define PCI_COMMAND_WAIT 0x80
57 #define PCI_COMMAND_SERR 0x100
58 #define PCI_COMMAND_FAST_BACK 0x200
59
60 #define PCI_STATUS 0x06
61 #define PCI_STATUS_FAST_BACK 0x80
62 #define PCI_STATUS_PARITY 0x100
63 #define PCI_STATUS_DEVSEL_MASK 0x600
64 #define PCI_STATUS_DEVSEL_FAST 0x000
65 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
66 #define PCI_STATUS_DEVSEL_SLOW 0x400
67 #define PCI_STATUS_SIG_TARGET_ABORT 0x800
68 #define PCI_STATUS_REC_TARGET_ABORT 0x1000
69 #define PCI_STATUS_REC_MASTER_ABORT 0x2000
70 #define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000
71 #define PCI_STATUS_DETECTED_PARITY 0x8000
72
73 #define PCI_CLASS_REVISION 0x08
74
75 #define PCI_REVISION_ID 0x08
76 #define PCI_CLASS_PROG 0x09
77 #define PCI_CLASS_DEVICE 0x0a
78
79 #define PCI_CACHE_LINE_SIZE 0x0c
80 #define PCI_LATENCY_TIMER 0x0d
81 #define PCI_HEADER_TYPE 0x0e
82 #define PCI_BIST 0x0f
83 #define PCI_BIST_CODE_MASK 0x0f
84 #define PCI_BIST_START 0x40
85 #define PCI_BIST_CAPABLE 0x80
86
87
88
89
90
91
92
93 #define PCI_BASE_ADDRESS_0 0x10
94 #define PCI_BASE_ADDRESS_1 0x14
95 #define PCI_BASE_ADDRESS_2 0x18
96 #define PCI_BASE_ADDRESS_3 0x1c
97 #define PCI_BASE_ADDRESS_4 0x20
98 #define PCI_BASE_ADDRESS_5 0x24
99 #define PCI_BASE_ADDRESS_SPACE 0x01
100 #define PCI_BASE_ADDRESS_SPACE_IO 0x01
101 #define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
102 #define PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
103 #define PCI_BASE_ADDRESS_MEM_TYPE_32 0x00
104 #define PCI_BASE_ADDRESS_MEM_TYPE_1M 0x02
105 #define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04
106 #define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08
107 #define PCI_BASE_ADDRESS_MEM_MASK (~0x0f)
108 #define PCI_BASE_ADDRESS_IO_MASK (~0x03)
109
110
111
112 #define PCI_ROM_ADDRESS 0x30
113 #define PCI_ROM_ADDRESS_ENABLE 0x01
114
115
116
117 #define PCI_INTERRUPT_LINE 0x3c
118 #define PCI_INTERRUPT_PIN 0x3d
119 #define PCI_MIN_GNT 0x3e
120 #define PCI_MAX_LAT 0x3f
121
122 #define PCI_CLASS_NOT_DEFINED 0x0000
123 #define PCI_CLASS_NOT_DEFINED_VGA 0x0001
124
125 #define PCI_BASE_CLASS_STORAGE 0x01
126 #define PCI_CLASS_STORAGE_SCSI 0x0100
127 #define PCI_CLASS_STORAGE_IDE 0x0101
128 #define PCI_CLASS_STORAGE_FLOPPY 0x0102
129 #define PCI_CLASS_STORAGE_IPI 0x0103
130 #define PCI_CLASS_STORAGE_OTHER 0x0180
131
132 #define PCI_BASE_CLASS_NETWORK 0x02
133 #define PCI_CLASS_NETWORK_ETHERNET 0x0200
134 #define PCI_CLASS_NETWORK_TOKEN_RING 0x0201
135 #define PCI_CLASS_NETWORK_FDDI 0x0202
136 #define PCI_CLASS_NETWORK_OTHER 0x0280
137
138 #define PCI_BASE_CLASS_DISPLAY 0x03
139 #define PCI_CLASS_DISPLAY_VGA 0x0300
140 #define PCI_CLASS_DISPLAY_XGA 0x0301
141 #define PCI_CLASS_DISPLAY_OTHER 0x0380
142
143 #define PCI_BASE_CLASS_MULTIMEDIA 0x04
144 #define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400
145 #define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401
146 #define PCI_CLASS_MULTIMEDIA_OTHER 0x0480
147
148 #define PCI_BASE_CLASS_MEMORY 0x05
149 #define PCI_CLASS_MEMORY_RAM 0x0500
150 #define PCI_CLASS_MEMORY_FLASH 0x0501
151 #define PCI_CLASS_MEMORY_OTHER 0x0580
152
153 #define PCI_BASE_CLASS_BRIDGE 0x06
154 #define PCI_CLASS_BRIDGE_HOST 0x0600
155 #define PCI_CLASS_BRIDGE_ISA 0x0601
156 #define PCI_CLASS_BRIDGE_EISA 0x0602
157 #define PCI_CLASS_BRIDGE_MC 0x0603
158 #define PCI_CLASS_BRIDGE_PCI 0x0604
159 #define PCI_CLASS_BRIDGE_PCMCIA 0x0605
160 #define PCI_CLASS_BRIDGE_OTHER 0x0680
161
162 #define PCI_CLASS_OTHERS 0xff
163
164
165 #define PCI_VENDOR_ID_NCR 0x1000
166 #define PCI_DEVICE_ID_NCR_53C810 0x0001
167 #define PCI_DEVICE_ID_NCR_53C815 0x0004
168 #define PCI_DEVICE_ID_NCR_53C820 0x0002
169 #define PCI_DEVICE_ID_NCR_53C825 0x0003
170
171 #define PCI_VENDOR_ID_ADAPTEC 0x9004
172 #define PCI_DEVICE_ID_ADAPTEC_2940 0x7178
173 #define PCI_DEVICE_ID_ADAPTEC_294x 0x7078
174
175 #define PCI_VENDOR_ID_DPT 0x1044
176 #define PCI_DEVICE_ID_DPT 0xa400
177
178 #define PCI_VENDOR_ID_S3 0x5333
179 #define PCI_DEVICE_ID_S3_864_1 0x88c0
180 #define PCI_DEVICE_ID_S3_864_2 0x88c1
181 #define PCI_DEVICE_ID_S3_868 0x8880
182 #define PCI_DEVICE_ID_S3_928 0x88b0
183 #define PCI_DEVICE_ID_S3_964_1 0x88d0
184 #define PCI_DEVICE_ID_S3_964_2 0x88d1
185 #define PCI_DEVICE_ID_S3_811 0x8811
186 #define PCI_DEVICE_ID_S3_968 0x88f0
187
188 #define PCI_VENDOR_ID_OPTI 0x1045
189 #define PCI_DEVICE_ID_OPTI_82C822 0xc822
190 #define PCI_DEVICE_ID_OPTI_82C621 0xc621
191 #define PCI_DEVICE_ID_OPTI_82C557 0xc557
192 #define PCI_DEVICE_ID_OPTI_82C558 0xc558
193
194 #define PCI_VENDOR_ID_UMC 0x1060
195 #define PCI_DEVICE_ID_UMC_UM8881F 0x8881
196 #define PCI_DEVICE_ID_UMC_UM8891A 0x0891
197 #define PCI_DEVICE_ID_UMC_UM8886F 0x8886
198 #define PCI_DEVICE_ID_UMC_UM8673F 0x0101
199
200 #define PCI_VENDOR_ID_DEC 0x1011
201 #define PCI_DEVICE_ID_DEC_TULIP 0x0002
202 #define PCI_DEVICE_ID_DEC_TULIP_FAST 0x0009
203 #define PCI_DEVICE_ID_DEC_FDDI 0x000F
204 #define PCI_DEVICE_ID_DEC_BRD 0x0001
205
206 #define PCI_VENDOR_ID_MATROX 0x102B
207 #define PCI_DEVICE_ID_MATROX_MGA_2 0x0518
208 #define PCI_DEVICE_ID_MATROX_MGA_IMP 0x0d10
209
210 #define PCI_VENDOR_ID_INTEL 0x8086
211 #define PCI_DEVICE_ID_INTEL_82378 0x0484
212 #define PCI_DEVICE_ID_INTEL_82424 0x0483
213 #define PCI_DEVICE_ID_INTEL_82375 0x0482
214 #define PCI_DEVICE_ID_INTEL_82434 0x04a3
215 #define PCI_DEVICE_ID_INTEL_82430 0x0486
216 #define PCI_DEVICE_ID_INTEL_82437 0x122d
217 #define PCI_DEVICE_ID_INTEL_82371 0x122e
218
219 #define PCI_VENDOR_ID_SMC 0x1042
220 #define PCI_DEVICE_ID_SMC_37C665 0x1000
221
222 #define PCI_VENDOR_ID_ATI 0x1002
223 #define PCI_DEVICE_ID_ATI_M32 0x4158
224 #define PCI_DEVICE_ID_ATI_M64 0x4758
225
226 #define PCI_VENDOR_ID_WEITEK 0x100e
227 #define PCI_DEVICE_ID_WEITEK_P9000 0x9001
228 #define PCI_DEVICE_ID_WEITEK_P9100 0x9100
229
230 #define PCI_VENDOR_ID_CIRRUS 0x1013
231 #define PCI_DEVICE_ID_CIRRUS_5430 0x00A0
232 #define PCI_DEVICE_ID_CIRRUS_5434_4 0x00A4
233 #define PCI_DEVICE_ID_CIRRUS_5434_8 0x00A8
234 #define PCI_DEVICE_ID_CIRRUS_6729 0x1100
235
236 #define PCI_VENDOR_ID_BUSLOGIC 0x104B
237 #define PCI_DEVICE_ID_BUSLOGIC_946C 0x1040
238 #define PCI_DEVICE_ID_BUSLOGIC_946C_2 0x0140
239
240 #define PCI_VENDOR_ID_N9 0x105D
241 #define PCI_DEVICE_ID_N9_I128 0x2309
242
243 #define PCI_VENDOR_ID_AI 0x1025
244 #define PCI_DEVICE_ID_AI_M1435 0x1435
245
246 #define PCI_VENDOR_ID_AL 0x10b9
247 #define PCI_DEVICE_ID_AL_M1445 0x1445
248 #define PCI_DEVICE_ID_AL_M1449 0x1449
249 #define PCI_DEVICE_ID_AL_M1451 0x1451
250 #define PCI_DEVICE_ID_AL_M4803 0x5215
251
252 #define PCI_VENDOR_ID_TSENG 0x100c
253 #define PCI_DEVICE_ID_TSENG_W32P_2 0x3202
254 #define PCI_DEVICE_ID_TSENG_W32P_b 0x3205
255 #define PCI_DEVICE_ID_TSENG_W32P_c 0x3206
256 #define PCI_DEVICE_ID_TSENG_W32P_d 0x3207
257
258 #define PCI_VENDOR_ID_CMD 0x1095
259 #define PCI_DEVICE_ID_CMD_640 0x0640
260
261 #define PCI_VENDOR_ID_VISION 0x1098
262 #define PCI_DEVICE_ID_VISION_QD8500 0x0001
263 #define PCI_DEVICE_ID_VISION_QD8580 0x0002
264
265 #define PCI_VENDOR_ID_AMD 0x1022
266 #define PCI_DEVICE_ID_AMD_LANCE 0x2000
267 #define PCI_DEVICE_ID_AMD_SCSI 0x2020
268
269 #define PCI_VENDOR_ID_VLSI 0x1004
270 #define PCI_DEVICE_ID_VLSI_82C593 0x0006
271 #define PCI_DEVICE_ID_VLSI_82C592 0x0005
272
273 #define PCI_VENDOR_ID_ADL 0x1005
274 #define PCI_DEVICE_ID_ADL_2301 0x2301
275
276 #define PCI_VENDOR_ID_SYMPHONY 0x1c1c
277 #define PCI_DEVICE_ID_SYMPHONY_101 0x0001
278
279 #define PCI_VENDOR_ID_TRIDENT 0x1023
280 #define PCI_DEVICE_ID_TRIDENT_9420 0x9420
281 #define PCI_DEVICE_ID_TRIDENT_9440 0x9440
282
283 #define PCI_VENDOR_ID_CONTAQ 0x1080
284 #define PCI_DEVICE_ID_CONTAQ_82C599 0x0600
285
286 #define PCI_VENDOR_ID_NS 0x100b
287 #define PCI_DEVICE_ID_NS_87410 0xd001
288
289 #define PCI_VENDOR_ID_VIA 0x1106
290 #define PCI_DEVICE_ID_VIA_82C505 0x0505
291 #define PCI_DEVICE_ID_VIA_82C576 0x0576
292 #define PCI_DEVICE_ID_VIA_82C561 0x0561
293
294 #define PCI_VENDOR_ID_SI 0x1039
295 #define PCI_DEVICE_ID_SI_496 0x0496
296 #define PCI_DEVICE_ID_SI_501 0x0406
297 #define PCI_DEVICE_ID_SI_503 0x0008
298 #define PCI_DEVICE_ID_SI_601 0x0601
299
300 #define PCI_VENDOR_ID_LEADTEK 0x107d
301 #define PCI_DEVICE_ID_LEADTEK_805 0x0000
302
303 #define PCI_VENDOR_ID_IMS 0x10e0
304 #define PCI_DEVICE_ID_IMS_8849 0x8849
305
306 #define PCI_VENDOR_ID_ZEINET 0x1193
307 #define PCI_DEVICE_ID_ZEINET_1221 0x0001
308
309 #define PCI_VENDOR_ID_EF 0x111a
310 #define PCI_DEVICE_ID_EF_ATM 0x0000
311
312 #define PCI_VENDOR_ID_HER 0xedd8
313 #define PCI_DEVICE_ID_HER_STING 0xa091
314
315 #define PCI_VENDOR_ID_ATRONICS 0x907f
316 #define PCI_DEVICE_ID_ATRONICS_2015 0x2015
317
318 #define PCI_VENDOR_ID_CT 0x102c
319 #define PCI_DEVICE_ID_CT_65545 0x00d8
320
321 #define PCI_VENDOR_ID_FD 0x1036
322 #define PCI_DEVICE_ID_FD_36C70 0x0000
323
324 #define PCI_VENDOR_ID_WINBOND 0x10ad
325 #define PCI_DEVICE_ID_WINBOND_83769 0x0001
326
327 #define PCI_VENDOR_ID_3COM 0x10b7
328 #define PCI_DEVICE_ID_3COM_3C590 0x5900
329 #define PCI_DEVICE_ID_3COM_3C595TX 0x5950
330 #define PCI_DEVICE_ID_3COM_3C595T4 0x5951
331 #define PCI_DEVICE_ID_3COM_3C595MII 0x5952
332
333 #define PCI_VENDOR_ID_PROMISE 0x105a
334 #define PCI_DEVICE_ID_PROMISE_5300 0x5300
335
336 #define PCI_VENDOR_ID_QLOGIC 0x1077
337 #define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020
338 #define PCI_DEVICE_ID_QLOGIC_ISP1022 0x1022
339
340 #define PCI_VENDOR_ID_X 0x1061
341 #define PCI_DEVICE_ID_X_AGX016 0x0001
342
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349
350
351 #define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
352 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
353 #define PCI_FUNC(devfn) ((devfn) & 0x07)
354
355
356
357
358
359 struct pci_dev {
360 struct pci_bus *bus;
361 struct pci_dev *sibling;
362 struct pci_dev *next;
363
364 void *sysdata;
365
366 unsigned int devfn;
367 unsigned short vendor;
368 unsigned short device;
369 unsigned int class;
370 unsigned int master : 1;
371
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380
381
382 unsigned char irq;
383 };
384
385 struct pci_bus {
386 struct pci_bus *parent;
387 struct pci_bus *children;
388 struct pci_bus *next;
389
390 struct pci_dev *self;
391 struct pci_dev *devices;
392
393 void *sysdata;
394
395 unsigned char number;
396 unsigned char primary;
397 unsigned char secondary;
398 unsigned char subordinate;
399 };
400
401
402
403
404
405 struct pci_dev_info {
406 unsigned short vendor;
407 unsigned short device;
408
409 const char *name;
410 unsigned char bridge_type;
411 };
412
413 extern struct pci_bus pci_root;
414 extern struct pci_dev *pci_devices;
415
416
417 extern unsigned long pci_init (unsigned long mem_start, unsigned long mem_end);
418
419 extern struct pci_dev_info *pci_lookup_dev (unsigned int vendor,
420 unsigned int dev);
421 extern char *pci_strbioserr (int error);
422 extern const char *pci_strclass (unsigned int class);
423 extern const char *pci_strvendor (unsigned int vendor);
424 extern const char *pci_strdev (unsigned int vendor, unsigned int device);
425
426 extern int get_pci_list (char *buf);
427
428 #endif