This source file includes following definitions.
- pi0_preprobe
- random
- wrtscc
- rdscc
- switchbuffers
- hardware_send_packet
- setup_rx_dma
- setup_tx_dma
- tdelay
- free_p
- a_txint
- a_exint
- a_rxint
- b_rxint
- b_txint
- b_exint
- hw_probe
- rts
- pi_header
- pi_rebuild_header
- scc_init
- chipset_init
- pi_init
- valid_dma_page
- pi_set_mac_address
- get_dma_buffer
- pi_probe
- pi_open
- pi_send_packet
- pi_interrupt
- pi_close
- pi_ioctl
- pi_get_stats
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66 #define PI_DMA 3
67
68 #define DEF_A_SPEED 0
69 #define DEF_A_TXDELAY 15
70 #define DEF_A_PERSIST 128
71 #define DEF_A_SLOTIME 15
72 #define DEF_A_SQUELDELAY 1
73 #define DEF_A_CLOCKMODE 0
74
75 #define DEF_B_SPEED 1200
76 #define DEF_B_TXDELAY 40
77 #define DEF_B_PERSIST 128
78 #define DEF_B_SLOTIME 30
79 #define DEF_B_SQUELDELAY 3
80 #define DEF_B_CLOCKMODE 0
81
82 struct device *init_etherdev(struct device *dev, int sizeof_private,
83 unsigned long *mem_startp);
84
85 static const char *version =
86 "PI: V0.8 ALPHA April 23 1995 David Perry (dp@hydra.carleton.ca)\n";
87
88
89
90 #define REALLY_SLOW_IO 1
91
92 #define PI2_MODULE 0
93
94 #if PI2_MODULE > 0
95 #include <linux/modules.h>
96 #endif
97
98 #include <linux/config.h>
99 #include <linux/kernel.h>
100 #include <linux/sched.h>
101 #include <linux/types.h>
102 #include <linux/fcntl.h>
103 #include <linux/interrupt.h>
104 #include <linux/ptrace.h>
105 #include <linux/ioport.h>
106 #include <linux/in.h>
107 #include <linux/malloc.h>
108 #include <linux/string.h>
109 #include <linux/errno.h>
110 #include <asm/system.h>
111 #include <asm/bitops.h>
112 #include <asm/io.h>
113 #include <asm/dma.h>
114 #include <asm/segment.h>
115 #include <linux/inet.h>
116 #include <linux/netdevice.h>
117 #include <linux/etherdevice.h>
118 #include <linux/skbuff.h>
119 #include <linux/timer.h>
120 #include <linux/if_arp.h>
121 #include "pi2.h"
122 #include "z8530.h"
123 #include <net/ax25.h>
124
125
126 struct mbuf {
127 struct mbuf *next;
128 int cnt;
129 char data[0];
130 };
131
132
133
134
135
136
137
138
139
140 static int pi0_preprobe(struct device *dev){return 0;}
141 static struct device pi0a = { "pi0a", 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, pi0_preprobe };
142 static struct device pi0b = { "pi0b", 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, pi0_preprobe };
143
144
145
146 #define PI_TOTAL_SIZE 8
147
148
149
150
151 static int pi_probe(struct device *dev, int card_type);
152 static int pi_open(struct device *dev);
153 static int pi_send_packet(struct sk_buff *skb, struct device *dev);
154 static void pi_interrupt(int reg_ptr, struct pt_regs *regs);
155 static int pi_close(struct device *dev);
156 static int pi_ioctl(struct device *dev, struct ifreq *ifr, int cmd);
157 static struct enet_statistics *pi_get_stats(struct device *dev);
158 static void rts(struct pi_local *lp, int x);
159 static void b_rxint(struct device *dev, struct pi_local *lp);
160 static void b_txint(struct pi_local *lp);
161 static void b_exint(struct pi_local *lp);
162 static void a_rxint(struct device *dev, struct pi_local *lp);
163 static void a_txint(struct pi_local *lp);
164 static void a_exint(struct pi_local *lp);
165 static char *get_dma_buffer(unsigned long *mem_ptr);
166 static int valid_dma_page(unsigned long addr, unsigned long dev_buffsize);
167
168 static char ax25_bcast[7] =
169 {'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1};
170 static char ax25_test[7] =
171 {'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1};
172
173 static int ext2_secrm_seed = 152;
174
175 static inline unsigned char random(void)
176 {
177 return (unsigned char) (ext2_secrm_seed = ext2_secrm_seed
178 * 69069l + 1);
179 }
180
181 static inline void wrtscc(int cbase, int ctl, int sccreg, int val)
182 {
183
184 outb_p(0, cbase + DMAEN);
185 outb_p(sccreg, ctl);
186 outb_p(val, ctl);
187 outb_p(1, cbase + DMAEN);
188 }
189
190 static inline int rdscc(int cbase, int ctl, int sccreg)
191 {
192 int retval;
193
194
195 outb_p(0, cbase + DMAEN);
196 outb_p(sccreg, ctl);
197 retval = inb_p(ctl);
198 outb_p(1, cbase + DMAEN);
199 return retval;
200 }
201
202 static void switchbuffers(struct pi_local *lp)
203 {
204 if (lp->rcvbuf == lp->rxdmabuf1)
205 lp->rcvbuf = lp->rxdmabuf2;
206 else
207 lp->rcvbuf = lp->rxdmabuf1;
208 }
209
210 static void hardware_send_packet(struct pi_local *lp, struct sk_buff *skb)
211 {
212 char kickflag;
213 unsigned long flags;
214
215 lp->stats.tx_packets++;
216
217 save_flags(flags);
218 cli();
219 kickflag = (skb_peek(&lp->sndq) == NULL) && (lp->sndbuf == NULL);
220 restore_flags(flags);
221
222 skb_queue_tail(&lp->sndq, skb);
223 if (kickflag) {
224
225 switch (lp->base & 2) {
226 case 2:
227 a_txint(lp);
228 break;
229 case 0:
230 save_flags(flags);
231 cli();
232 if (lp->tstate == IDLE)
233 b_txint(lp);
234 restore_flags(flags);
235 break;
236 }
237 }
238 }
239
240 static void setup_rx_dma(struct pi_local *lp)
241 {
242 unsigned long flags;
243 int cmd;
244 unsigned long dma_abs;
245 unsigned dmachan;
246
247 save_flags(flags);
248 cli();
249
250 dma_abs = (unsigned long) (lp->rcvbuf->data);
251 dmachan = lp->dmachan;
252 cmd = lp->base + CTL;
253
254 if(!valid_dma_page(dma_abs, DMA_BUFF_SIZE + sizeof(struct mbuf)))
255 panic("PI: RX buffer violates DMA boundary!");
256
257
258 wrtscc(lp->cardbase, cmd, R1, WT_FN_RDYFN | WT_RDY_RT | INT_ERR_Rx | EXT_INT_ENAB);
259
260 disable_dma(dmachan);
261 clear_dma_ff(dmachan);
262
263
264
265
266 set_dma_mode(dmachan, DMA_MODE_READ | 0x10);
267 set_dma_addr(dmachan, dma_abs);
268 set_dma_count(dmachan, lp->bufsiz);
269 enable_dma(dmachan);
270
271
272
273
274 wrtscc(lp->cardbase, cmd, R0, RES_Rx_CRC);
275
276
277 wrtscc(lp->cardbase, cmd, R1,
278 WT_RDY_ENAB | WT_FN_RDYFN | WT_RDY_RT | INT_ERR_Rx | EXT_INT_ENAB);
279
280 restore_flags(flags);
281 }
282
283 static void setup_tx_dma(struct pi_local *lp, int length)
284 {
285 unsigned long dma_abs;
286 unsigned long flags;
287 unsigned long dmachan;
288
289 save_flags(flags);
290 cli();
291
292 dmachan = lp->dmachan;
293 dma_abs = (unsigned long) (lp->txdmabuf);
294
295 if(!valid_dma_page(dma_abs, DMA_BUFF_SIZE + sizeof(struct mbuf)))
296 panic("PI: TX buffer violates DMA boundary!");
297
298 disable_dma(dmachan);
299
300
301
302 set_dma_mode(dmachan, DMA_MODE_WRITE);
303 clear_dma_ff(dmachan);
304 set_dma_addr(dmachan, dma_abs);
305
306 set_dma_count(dmachan, length);
307
308 restore_flags(flags);
309 }
310
311 static void tdelay(struct pi_local *lp, int time)
312 {
313 int port;
314 unsigned int t1;
315 unsigned char sc;
316
317 if (lp->base & 2) {
318 sc = SC1;
319 t1 = time;
320 port = lp->cardbase + TMR1;
321 } else {
322 sc = SC2;
323 t1 = 10 * time;
324 port = lp->cardbase + TMR2;
325 wrtscc(lp->cardbase, lp->base + CTL, R1, INT_ALL_Rx | EXT_INT_ENAB);
326 }
327
328
329 outb_p(sc | LSB_MSB | MODE0, lp->cardbase + TMRCMD);
330
331
332 outb_p((t1 << 1) & 0xFF, port);
333 outb_p((t1 >> 7) & 0xFF, port);
334
335
336 wrtscc(lp->cardbase, lp->base + CTL, R15, CTSIE);
337 wrtscc(lp->cardbase, lp->base + CTL, R0, RES_EXT_INT);
338 }
339
340 static void free_p(struct sk_buff *skb)
341 {
342 dev_kfree_skb(skb, FREE_WRITE);
343 }
344
345 static void a_txint(struct pi_local *lp)
346 {
347 int cmd;
348 unsigned long flags;
349
350 save_flags(flags);
351 cli();
352
353 cmd = CTL + lp->base;
354
355 switch (lp->tstate) {
356 case IDLE:
357
358 if ((lp->sndbuf = skb_dequeue(&lp->sndq)) == NULL) {
359 rts(lp, OFF);
360 restore_flags(flags);
361 return;
362 }
363
364 case DEFER:
365
366
367
368
369 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
370 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
371 if ((rdscc(lp->cardbase, cmd, R0) & DCD) != 0) {
372 lp->tstate = DEFER;
373 tdelay(lp, 100);
374
375 wrtscc(lp->cardbase, cmd, R15, CTSIE | DCDIE);
376 restore_flags(flags);
377 return;
378 }
379 if (random() > lp->persist) {
380 lp->tstate = DEFER;
381 tdelay(lp, lp->slotime);
382 restore_flags(flags);
383 return;
384 }
385
386 wrtscc(lp->cardbase, cmd, R5, TxCRC_ENAB | RTS | Tx8);
387 rts(lp, ON);
388 lp->tstate = ST_TXDELAY;
389 tdelay(lp, lp->txdelay);
390 restore_flags(flags);
391 return;
392 default:
393 break;
394 }
395
396 restore_flags(flags);
397 }
398
399 static void a_exint(struct pi_local *lp)
400 {
401 unsigned long flags;
402 int cmd;
403 char st;
404 int length;
405
406 save_flags(flags);
407 cli();
408
409 st = rdscc(lp->cardbase, lp->base + CTL, R0);
410
411
412 wrtscc(lp->cardbase, CTL + lp->base, R0, RES_EXT_INT);
413 cmd = lp->base + CTL;
414
415 if ((lp->rstate >= ACTIVE) && (st & BRK_ABRT)) {
416 setup_rx_dma(lp);
417 lp->rstate = ACTIVE;
418 }
419 switch (lp->tstate) {
420 case ACTIVE:
421 free_p(lp->sndbuf);
422 lp->sndbuf = NULL;
423 lp->tstate = FLAGOUT;
424 tdelay(lp, lp->squeldelay);
425 break;
426 case FLAGOUT:
427 if ((lp->sndbuf = skb_dequeue(&lp->sndq)) == NULL) {
428
429 lp->tstate = IDLE;
430 rts(lp, OFF);
431 restore_flags(flags);
432 return;
433 }
434
435 case ST_TXDELAY:
436
437 disable_dma(lp->dmachan);
438
439
440 wrtscc(lp->cardbase, cmd, R1, WT_FN_RDYFN | EXT_INT_ENAB);
441
442
443
444
445 length = lp->sndbuf->len - 1;
446 memcpy(lp->txdmabuf, &lp->sndbuf->data[1], length);
447
448
449
450 setup_tx_dma(lp, length);
451
452
453
454 enable_dma(lp->dmachan);
455
456
457 wrtscc(lp->cardbase, cmd, R0, RES_Tx_CRC | RES_Tx_P);
458
459
460 wrtscc(lp->cardbase, cmd, R15, TxUIE);
461
462
463 wrtscc(lp->cardbase, cmd, R1, WT_RDY_ENAB | WT_FN_RDYFN | EXT_INT_ENAB);
464
465
466 wrtscc(lp->cardbase, cmd, R0, RES_EOM_L);
467
468
469
470 lp->tstate = ACTIVE;
471 break;
472 case DEFER:
473
474
475
476 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
477 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
478 if ((rdscc(lp->cardbase, cmd, R0) & DCD) != 0) {
479 lp->tstate = DEFER;
480 tdelay(lp, 100);
481
482 wrtscc(lp->cardbase, CTL + lp->base, R15, CTSIE | DCDIE);
483 restore_flags(flags);
484 return;
485 }
486 if (random() > lp->persist) {
487 lp->tstate = DEFER;
488 tdelay(lp, lp->slotime);
489 restore_flags(flags);
490 return;
491 }
492
493 wrtscc(lp->cardbase, cmd, R5, TxCRC_ENAB | RTS | Tx8);
494 rts(lp, ON);
495 lp->tstate = ST_TXDELAY;
496 tdelay(lp, lp->txdelay);
497 restore_flags(flags);
498 return;
499 }
500
501 restore_flags(flags);
502 }
503
504
505
506 static void a_rxint(struct device *dev, struct pi_local *lp)
507 {
508 unsigned long flags;
509 int cmd;
510 int bytecount;
511 char rse;
512 struct sk_buff *skb;
513 int sksize, pkt_len;
514 struct mbuf *cur_buf;
515 unsigned char *cfix;
516
517 save_flags(flags);
518 cli();
519 cmd = lp->base + CTL;
520
521 rse = rdscc(lp->cardbase, cmd, R1);
522 if (rse & Rx_OVR)
523 lp->rstate = RXERROR;
524
525 if (rse & END_FR) {
526
527
528 clear_dma_ff(lp->dmachan);
529 bytecount = lp->bufsiz - get_dma_residue(lp->dmachan);
530
531 if ((rse & CRC_ERR) || (lp->rstate > ACTIVE) || (bytecount < 10)) {
532 if ((bytecount >= 10) && (rse & CRC_ERR)) {
533 lp->stats.rx_crc_errors++;
534 }
535 if (lp->rstate == RXERROR) {
536 lp->stats.rx_errors++;
537 lp->stats.rx_over_errors++;
538 }
539
540 lp->rstate = ACTIVE;
541 setup_rx_dma(lp);
542 } else {
543
544
545 pkt_len = lp->rcvbuf->cnt = bytecount - 2 + 1;
546
547
548 cur_buf = lp->rcvbuf;
549 switchbuffers(lp);
550 setup_rx_dma(lp);
551
552
553
554 sksize = pkt_len;
555
556 skb = dev_alloc_skb(sksize);
557 if (skb == NULL) {
558 printk("PI: %s: Memory squeeze, dropping packet.\n", dev->name);
559 lp->stats.rx_dropped++;
560 restore_flags(flags);
561 return;
562 }
563 skb->dev = dev;
564
565
566 cfix=skb_put(skb,pkt_len);
567 *cfix++=0;
568
569 memcpy(cfix, (char *) cur_buf->data,
570 pkt_len - 1);
571 skb->protocol=htons(ETH_P_AX25);
572 skb->mac.raw=skb->data;
573 IS_SKB(skb);
574 netif_rx(skb);
575 lp->stats.rx_packets++;
576 }
577 }
578 wrtscc(lp->cardbase, lp->base + CTL, R0, ERR_RES);
579 restore_flags(flags);
580 }
581
582 static void b_rxint(struct device *dev, struct pi_local *lp)
583 {
584 unsigned long flags;
585 int cmd;
586 char rse;
587 struct sk_buff *skb;
588 int sksize;
589 int pkt_len;
590 unsigned char *cfix;
591
592 save_flags(flags);
593 cli();
594 cmd = CTL + lp->base;
595
596 rse = rdscc(lp->cardbase, cmd, R1);
597
598 if ((rdscc(lp->cardbase, cmd, R0)) & Rx_CH_AV) {
599
600
601
602 if (rse & Rx_OVR) {
603
604
605 lp->rcp = lp->rcvbuf->data;
606 lp->rcvbuf->cnt = 0;
607
608 lp->rstate = RXERROR;
609 lp->stats.rx_errors++;
610 lp->stats.rx_over_errors++;
611 } else if (lp->rcvbuf->cnt >= lp->bufsiz) {
612
613
614 lp->rcp = lp->rcvbuf->data;
615 lp->rcvbuf->cnt = 0;
616 lp->rstate = TOOBIG;
617 }
618
619 if (lp->rstate == ACTIVE) {
620 *lp->rcp++ = rdscc(lp->cardbase, cmd, R8);
621 lp->rcvbuf->cnt++;
622 } else {
623
624 (void) rdscc(lp->cardbase, cmd, R8);
625 wrtscc(lp->cardbase, cmd, R0, ERR_RES);
626 lp->rstate = ACTIVE;
627 }
628 }
629 if (rse & END_FR) {
630
631 if (lp->rcvbuf->cnt > 0) {
632 if ((rse & CRC_ERR) || (lp->rstate > ACTIVE) || (lp->rcvbuf->cnt < 10)) {
633 if ((lp->rcvbuf->cnt >= 10) && (rse & CRC_ERR)) {
634 lp->stats.rx_crc_errors++;
635 }
636 lp->rcp = lp->rcvbuf->data;
637 lp->rcvbuf->cnt = 0;
638 } else {
639
640 pkt_len = lp->rcvbuf->cnt -= 2;
641 pkt_len += 1;
642
643
644 sksize = pkt_len;
645 skb = dev_alloc_skb(sksize);
646 if (skb == NULL) {
647 printk("PI: %s: Memory squeeze, dropping packet.\n", dev->name);
648 lp->stats.rx_dropped++;
649 restore_flags(flags);
650 return;
651 }
652 skb->dev = dev;
653
654
655 cfix=skb_put(skb,pkt_len);
656 *cfix++=0;
657
658 memcpy(cfix, lp->rcvbuf->data, pkt_len - 1);
659 skb->protocol=ntohs(ETH_P_AX25);
660 IS_SKB(skb);
661 netif_rx(skb);
662 lp->stats.rx_packets++;
663
664 lp->rcp = lp->rcvbuf->data;
665 lp->rcvbuf->cnt = 0;
666
667 }
668 }
669 lp->rstate = ACTIVE;
670 }
671 restore_flags(flags);
672 }
673
674
675 static void b_txint(struct pi_local *lp)
676 {
677 unsigned long flags;
678 int cmd;
679 unsigned char c;
680
681 save_flags(flags);
682 cli();
683 cmd = CTL + lp->base;
684
685 switch (lp->tstate) {
686 case CRCOUT:
687 lp->tstate = FLAGOUT;
688 tdelay(lp, lp->squeldelay);
689 restore_flags(flags);
690 return;
691 case IDLE:
692
693 if ((lp->sndbuf = skb_dequeue(&lp->sndq)) == NULL) {
694
695
696
697 rts(lp, OFF);
698
699 restore_flags(flags);
700 return;
701 }
702 lp->txptr = lp->sndbuf->data;
703 lp->txptr++;
704 lp->txcnt = (int) lp->sndbuf->len - 1;
705
706 case DEFER:
707
708
709 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
710 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
711 if ((rdscc(lp->cardbase, cmd, R0) & DCD) != 0) {
712 lp->tstate = DEFER;
713 tdelay(lp, 100);
714
715 wrtscc(lp->cardbase, cmd, R15, CTSIE | DCDIE);
716 restore_flags(flags);
717 return;
718 }
719 if (random() > lp->persist) {
720 lp->tstate = DEFER;
721 tdelay(lp, lp->slotime);
722 restore_flags(flags);
723 return;
724 }
725 rts(lp, ON);
726 lp->tstate = ST_TXDELAY;
727 tdelay(lp, lp->txdelay);
728 restore_flags(flags);
729 return;
730
731 case ACTIVE:
732
733 if (lp->txcnt--) {
734 c = *lp->txptr++;
735
736 wrtscc(lp->cardbase, cmd, R8, c);
737
738 } else {
739
740 free_p(lp->sndbuf);
741 lp->sndbuf = NULL;
742 if ((rdscc(lp->cardbase, cmd, R0) & 0x40)) {
743
744
745 lp->stats.tx_errors++;
746 lp->stats.tx_fifo_errors++;
747 wrtscc(lp->cardbase, cmd, R0, SEND_ABORT);
748 lp->tstate = FLAGOUT;
749 tdelay(lp, lp->squeldelay);
750 restore_flags(flags);
751 return;
752 }
753 lp->tstate = UNDERRUN;
754
755 if (lp->speed) {
756 wrtscc(lp->cardbase, cmd, R10, CRCPS | NRZI);
757 } else {
758 wrtscc(lp->cardbase, cmd, R10, CRCPS);
759 }
760 wrtscc(lp->cardbase, cmd, R0, RES_Tx_P);
761 }
762 restore_flags(flags);
763 return;
764 }
765 restore_flags(flags);
766 }
767
768
769
770
771
772
773
774
775 static void b_exint(struct pi_local *lp)
776 {
777 unsigned long flags;
778 char st;
779 int cmd;
780 char c;
781
782 cmd = CTL + lp->base;
783 save_flags(flags);
784 cli();
785 st = rdscc(lp->cardbase, cmd, R0);
786
787 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
788
789
790 switch (lp->tstate) {
791 case ACTIVE:
792 free_p(lp->sndbuf);
793 lp->sndbuf = NULL;
794 wrtscc(lp->cardbase, cmd, R0, SEND_ABORT);
795 lp->tstate = FLAGOUT;
796 lp->stats.tx_errors++;
797 lp->stats.tx_fifo_errors++;
798 tdelay(lp, lp->squeldelay);
799 restore_flags(flags);
800 return;
801 case UNDERRUN:
802 lp->tstate = CRCOUT;
803 restore_flags(flags);
804 return;
805 case FLAGOUT:
806
807 if ((lp->sndbuf = skb_dequeue(&lp->sndq)) == NULL) {
808
809
810
811 rts(lp, OFF);
812 lp->tstate = IDLE;
813 restore_flags(flags);
814 return;
815 }
816 lp->txptr = lp->sndbuf->data;
817 lp->txptr++;
818 lp->txcnt = (int) lp->sndbuf->len - 1;
819
820 lp->txcnt--;
821 c = *lp->txptr++;
822 wrtscc(lp->cardbase, cmd, R0, RES_Tx_CRC);
823
824
825 if (lp->speed) {
826 wrtscc(lp->cardbase, cmd, R10, CRCPS | NRZI | ABUNDER);
827 } else {
828 wrtscc(lp->cardbase, cmd, R10, CRCPS | ABUNDER);
829 }
830
831 wrtscc(lp->cardbase, cmd, R8, c);
832 wrtscc(lp->cardbase, cmd, R0, RES_EOM_L);
833
834 #ifdef STUFF2
835
836 if (lp->txcnt) {
837 lp->txcnt--;
838 c = *lp->txptr++;
839
840 while((rdscc(lp->cardbase, cmd, R0) & 0x04) == 0)
841 ;
842 wrtscc(lp->cardbase, cmd, R8, c);
843 }
844 #endif
845
846
847
848 wrtscc(lp->cardbase, cmd, R15, TxUIE);
849 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
850 wrtscc(lp->cardbase, cmd, R1, TxINT_ENAB | EXT_INT_ENAB);
851
852 lp->tstate = ACTIVE;
853 restore_flags(flags);
854 return;
855
856 case DEFER:
857
858
859
860 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
861 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
862 if ((rdscc(lp->cardbase, cmd, R0) & DCD) != 0) {
863 lp->tstate = DEFER;
864 tdelay(lp, 100);
865
866 wrtscc(lp->cardbase, cmd, R15, CTSIE | DCDIE);
867 restore_flags(flags);
868 return;
869 }
870 if (random() > lp->persist) {
871 lp->tstate = DEFER;
872 tdelay(lp, lp->slotime);
873 restore_flags(flags);
874 return;
875 }
876 rts(lp, ON);
877 lp->tstate = ST_TXDELAY;
878 tdelay(lp, lp->txdelay);
879 restore_flags(flags);
880 return;
881
882 case ST_TXDELAY:
883
884
885 lp->txcnt--;
886 c = *lp->txptr++;
887 wrtscc(lp->cardbase, cmd, R0, RES_Tx_CRC);
888
889
890 if (lp->speed) {
891 wrtscc(lp->cardbase, cmd, R10, CRCPS | NRZI | ABUNDER);
892 } else {
893 wrtscc(lp->cardbase, cmd, R10, CRCPS | ABUNDER);
894 }
895
896 wrtscc(lp->cardbase, cmd, R8, c);
897 wrtscc(lp->cardbase, cmd, R0, RES_EOM_L);
898
899 #ifdef STUFF2
900
901 if (lp->txcnt) {
902 lp->txcnt--;
903 c = *lp->txptr++;
904
905 while((rdscc(lp->cardbase, cmd, R0) & 0x04) == 0)
906 ;
907 wrtscc(lp->cardbase, cmd, R8, c);
908 }
909 #endif
910
911
912
913 wrtscc(lp->cardbase, cmd, R15, TxUIE);
914 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
915
916 wrtscc(lp->cardbase, cmd, R1, TxINT_ENAB | EXT_INT_ENAB);
917
918 lp->tstate = ACTIVE;
919 restore_flags(flags);
920 return;
921 }
922
923
924
925
926
927
928 if ((lp->rstate == ACTIVE) && (st & BRK_ABRT)) {
929 (void) rdscc(lp->cardbase, cmd, R8);
930 (void) rdscc(lp->cardbase, cmd, R8);
931 (void) rdscc(lp->cardbase, cmd, R8);
932 lp->rcp = lp->rcvbuf->data;
933 lp->rcvbuf->cnt = 0;
934 }
935 restore_flags(flags);
936 }
937
938
939
940
941 static int hw_probe(int ioaddr)
942 {
943 int time = 1000;
944 unsigned long start_time, end_time;
945
946 int base, tmr0, tmr1, tmrcmd;
947 int a = 1;
948 int b = 1;
949
950 base = ioaddr & 0x3f0;
951 tmr0 = TMR0 + base;
952 tmr1 = TMR1 + base;
953 tmrcmd = TMRCMD + base;
954
955
956
957 outb_p(SC0 | LSB_MSB | MODE3, tmrcmd);
958 outb_p(922 & 0xFF, tmr0);
959 outb_p(922 >> 8, tmr0);
960
961
962 outb_p(SC1 | LSB_MSB | MODE0, tmrcmd);
963 outb_p((time << 1) & 0xFF, tmr1);
964 outb_p((time >> 7) & 0XFF, tmr1);
965
966
967 do {
968
969 outb_p(SC1, tmrcmd);
970 a = inb_p(tmr1);
971 b = inb_p(tmr1);
972 } while (b == 0);
973 start_time = jiffies;
974 while (b != 0) {
975
976 outb_p(SC1, tmrcmd);
977 a = inb_p(tmr1);
978 b = inb_p(tmr1);
979 end_time = jiffies;
980
981 if ((end_time - start_time) > 200)
982 return 0;
983 }
984 end_time = jiffies;
985
986 if ((end_time - start_time) > 65) {
987 return (1);
988 } else {
989
990
991
992 outb_p(SC0 | LSB_MSB | MODE3, tmrcmd);
993 outb_p(1844 & 0xFF, tmr0);
994 outb_p(1844 >> 8, tmr0);
995 return (2);
996 }
997 }
998
999 static void rts(struct pi_local *lp, int x)
1000 {
1001 int tc;
1002 long br;
1003 int cmd;
1004 int dummy;
1005
1006
1007 cmd = CTL + lp->base;
1008
1009
1010 if (x == ON) {
1011
1012 wrtscc(lp->cardbase, cmd, R15, 0);
1013 wrtscc(lp->cardbase, cmd, R3, Rx8);
1014 lp->rstate = IDLE;
1015 if (cmd & 2) {
1016
1017 wrtscc(lp->cardbase, cmd, R1, WT_FN_RDYFN | EXT_INT_ENAB);
1018 } else {
1019 wrtscc(lp->cardbase, cmd, R1, 0);
1020 }
1021
1022 if (!lp->clockmode) {
1023 if (lp->speed) {
1024 br = lp->speed;
1025 tc = (lp->xtal / br) - 2;
1026 wrtscc(lp->cardbase, cmd, R12, tc & 0xFF);
1027 wrtscc(lp->cardbase, cmd, R13, (tc >> 8) & 0xFF);
1028 }
1029 }
1030 wrtscc(lp->cardbase, cmd, R5, TxCRC_ENAB | RTS | TxENAB | Tx8 | DTR);
1031
1032 } else {
1033 lp->tstate = IDLE;
1034 wrtscc(lp->cardbase, cmd, R5, Tx8 | DTR);
1035
1036 if (!lp->clockmode) {
1037 if (lp->speed) {
1038
1039
1040 wrtscc(lp->cardbase, cmd, R14, BRSRC);
1041 br = lp->speed;
1042
1043 tc = ((lp->xtal / 32) / br) - 2;
1044 wrtscc(lp->cardbase, cmd, R12, tc & 0xFF);
1045 wrtscc(lp->cardbase, cmd, R13, (tc >> 8) & 0xFF);
1046
1047 wrtscc(lp->cardbase, cmd, R14, BRSRC | SEARCH);
1048
1049 wrtscc(lp->cardbase, cmd, R14, BRSRC | BRENABL);
1050 }
1051 }
1052
1053 wrtscc(lp->cardbase, cmd, R3, Rx8);
1054 wrtscc(lp->cardbase, cmd, R0, ERR_RES);
1055 dummy = rdscc(lp->cardbase, cmd, R1);
1056 (void) rdscc(lp->cardbase, cmd, R8);
1057 (void) rdscc(lp->cardbase, cmd, R8);
1058
1059 (void) rdscc(lp->cardbase, cmd, R8);
1060
1061
1062 wrtscc(lp->cardbase, cmd, R3, RxENABLE | Rx8);
1063 lp->rstate = ACTIVE;
1064
1065 if (cmd & 2) {
1066 setup_rx_dma(lp);
1067 } else {
1068
1069 lp->rcp = lp->rcvbuf->data;
1070 lp->rcvbuf->cnt = 0;
1071 wrtscc(lp->cardbase, cmd, R1, (INT_ALL_Rx | EXT_INT_ENAB));
1072 }
1073 wrtscc(lp->cardbase, cmd, R15, BRKIE);
1074 }
1075 }
1076
1077
1078 static int pi_header(struct sk_buff *skb, struct device *dev, unsigned short type,
1079 void *daddr, void *saddr, unsigned len)
1080 {
1081 return ax25_encapsulate(skb, dev, type, daddr, saddr, len);
1082 }
1083
1084
1085 static int pi_rebuild_header(void *buff, struct device *dev, unsigned long raddr,
1086 struct sk_buff *skb)
1087 {
1088 return ax25_rebuild_header(buff, dev, raddr, skb);
1089 }
1090
1091 static void scc_init(struct device *dev)
1092 {
1093 unsigned long flags;
1094 struct pi_local *lp = (struct pi_local *) dev->priv;
1095
1096 int tc;
1097 long br;
1098 register int cmd;
1099
1100
1101
1102 cmd = CTL + lp->base;
1103 save_flags(flags);
1104 cli();
1105
1106 switch (cmd & CHANA) {
1107 case CHANA:
1108 wrtscc(lp->cardbase, cmd, R9, CHRA);
1109 wrtscc(lp->cardbase, cmd, R2, 0xff);
1110 break;
1111 default:
1112 wrtscc(lp->cardbase, cmd, R9, CHRB);
1113 break;
1114 }
1115
1116
1117 wrtscc(lp->cardbase, cmd, R1, 0);
1118
1119
1120 wrtscc(lp->cardbase, cmd, R15, 0);
1121
1122
1123 wrtscc(lp->cardbase, cmd, R4, SDLC | X1CLK);
1124
1125
1126 if (lp->speed) {
1127 wrtscc(lp->cardbase, cmd, R10, CRCPS | NRZI);
1128 if (!lp->clockmode)
1129
1130 wrtscc(lp->cardbase, cmd, R11, TCBR | RCDPLL | TRxCDP | TRxCOI);
1131 else
1132
1133 wrtscc(lp->cardbase, cmd, R11, TCDPLL | RCDPLL | TRxCBR | TRxCOI);
1134 } else {
1135 wrtscc(lp->cardbase, cmd, R10, CRCPS);
1136
1137 wrtscc(lp->cardbase, cmd, R11, TCTRxCP);
1138 }
1139
1140
1141 wrtscc(lp->cardbase, cmd, R6, 0);
1142
1143
1144 wrtscc(lp->cardbase, cmd, R7, FLAG);
1145
1146
1147
1148
1149 wrtscc(lp->cardbase, cmd, R5, Tx8 | DTR);
1150
1151
1152 wrtscc(lp->cardbase, cmd, R3, Rx8);
1153
1154
1155 wrtscc(lp->cardbase, cmd, R14, BRSRC);
1156
1157
1158
1159 if (lp->speed) {
1160 br = lp->speed;
1161 tc = ((lp->xtal / 32) / br) - 2;
1162 } else {
1163 tc = 14;
1164 }
1165
1166 wrtscc(lp->cardbase, cmd, R12, tc & 0xFF);
1167 wrtscc(lp->cardbase, cmd, R13, (tc >> 8) & 0xFF);
1168
1169
1170 rts(lp, OFF);
1171
1172 if (lp->speed) {
1173
1174 wrtscc(lp->cardbase, cmd, R14, BRSRC | SSBR);
1175 } else {
1176
1177 wrtscc(lp->cardbase, cmd, R14, BRSRC | SSRTxC);
1178 }
1179 wrtscc(lp->cardbase, cmd, R14, BRSRC | SEARCH);
1180 wrtscc(lp->cardbase, cmd, R14, BRSRC | BRENABL);
1181
1182 if (!(cmd & 2))
1183 wrtscc(lp->cardbase, cmd, R1, (INT_ALL_Rx | EXT_INT_ENAB));
1184
1185 wrtscc(lp->cardbase, cmd, R15, BRKIE);
1186
1187
1188 wrtscc(lp->cardbase, cmd, R3, RxENABLE | RxCRC_ENAB | Rx8);
1189
1190 restore_flags(flags);
1191 }
1192
1193 static void chipset_init(struct device *dev)
1194 {
1195 int cardbase;
1196 unsigned long flags;
1197
1198 cardbase = dev->base_addr & 0x3f0;
1199
1200 save_flags(flags);
1201 cli();
1202 wrtscc(cardbase, dev->base_addr + CTL, R9, FHWRES);
1203
1204 wrtscc(cardbase, dev->base_addr + CTL, R9, 0);
1205 restore_flags(flags);
1206
1207 }
1208
1209
1210 unsigned long pi_init(unsigned long mem_start, unsigned long mem_end)
1211 {
1212 int *port;
1213 int ioaddr = 0;
1214 int card_type = 0;
1215 int ports[] =
1216 {0x380, 0x300, 0x320, 0x340, 0x360, 0x3a0, 0};
1217
1218 printk(version);
1219
1220
1221 for (port = &ports[0]; *port && !card_type; port++) {
1222 ioaddr = *port;
1223
1224 if (check_region(ioaddr, PI_TOTAL_SIZE) == 0) {
1225 printk("PI: Probing for card at address %#3x\n",ioaddr);
1226 card_type = hw_probe(ioaddr);
1227 }
1228 }
1229
1230 switch (card_type) {
1231 case 1:
1232 printk("PI: Found a PI card at address %#3x\n", ioaddr);
1233 break;
1234 case 2:
1235 printk("PI: Found a PI2 card at address %#3x\n", ioaddr);
1236 break;
1237 default:
1238 printk("PI: ERROR: No card found\n");
1239 return mem_start;
1240 }
1241
1242
1243
1244
1245
1246
1247
1248 register_netdev(&pi0a);
1249
1250 pi0a.priv=(void *)mem_start;
1251 mem_start+=sizeof(struct pi_local) + (DMA_BUFF_SIZE + sizeof(struct mbuf)) * 4
1252 + 8;
1253
1254 pi0a.dma = PI_DMA;
1255 pi0a.base_addr = ioaddr + 2;
1256 pi0a.irq = 0;
1257
1258
1259 register_netdev(&pi0b);
1260 pi0b.base_addr = ioaddr;
1261 pi0b.irq = 0;
1262 pi0b.priv=(void *)mem_start;
1263 mem_start+=sizeof(struct pi_local) + (DMA_BUFF_SIZE + sizeof(struct mbuf)) * 4
1264 + 8;
1265
1266
1267 pi_probe(&pi0a, card_type);
1268 pi_probe(&pi0b, card_type);
1269
1270 pi0b.irq = pi0a.irq;
1271
1272 return mem_start;
1273 }
1274
1275 static int valid_dma_page(unsigned long addr, unsigned long dev_buffsize)
1276 {
1277 if (((addr & 0xffff) + dev_buffsize) <= 0x10000)
1278 return 1;
1279 else
1280 return 0;
1281 }
1282
1283 static int pi_set_mac_address(struct device *dev, void *addr)
1284 {
1285 memcpy(dev->dev_addr, addr, 7);
1286 return 0;
1287 }
1288
1289
1290 static char *
1291 get_dma_buffer(unsigned long *mem_ptr)
1292 {
1293 char *ret;
1294
1295 ret = (char *)*mem_ptr;
1296
1297 if(!valid_dma_page(*mem_ptr, DMA_BUFF_SIZE + sizeof(struct mbuf))){
1298 *mem_ptr += (DMA_BUFF_SIZE + sizeof(struct mbuf));
1299 ret = (char *)*mem_ptr;
1300 }
1301 *mem_ptr += (DMA_BUFF_SIZE + sizeof(struct mbuf));
1302 return (ret);
1303 }
1304
1305 static int pi_probe(struct device *dev, int card_type)
1306 {
1307 short ioaddr;
1308 struct pi_local *lp;
1309 int i;
1310 unsigned long flags;
1311 unsigned long mem_ptr;
1312
1313 ioaddr = dev->base_addr;
1314
1315
1316
1317
1318 dev->priv = (void *) (((int) dev->priv + 7) & ~7);
1319 lp = (struct pi_local *) dev->priv;
1320
1321 memset(dev->priv, 0, sizeof(struct pi_local));
1322
1323
1324 mem_ptr = (unsigned long) dev->priv + sizeof(struct pi_local);
1325 lp->txdmabuf = get_dma_buffer(&mem_ptr);
1326 lp->rxdmabuf1 = (struct mbuf *) get_dma_buffer(&mem_ptr);
1327 lp->rxdmabuf2 = (struct mbuf *) get_dma_buffer(&mem_ptr);
1328
1329
1330 lp->rcvbuf = lp->rxdmabuf1;
1331 lp->rcp = lp->rcvbuf->data;
1332 lp->rcvbuf->cnt = 0;
1333
1334
1335 skb_queue_head_init(&lp->sndq);
1336
1337
1338 if (card_type == 1)
1339 lp->xtal = (unsigned long) SINGLE / 2;
1340 else
1341 lp->xtal = (unsigned long) DOUBLE / 2;
1342 lp->base = dev->base_addr;
1343 lp->cardbase = dev->base_addr & 0x3f0;
1344 if (dev->base_addr & CHANA) {
1345 lp->speed = DEF_A_SPEED;
1346
1347 lp->txdelay = DEF_A_TXDELAY;
1348 lp->persist = DEF_A_PERSIST;
1349 lp->slotime = DEF_A_SLOTIME;
1350 lp->squeldelay = DEF_A_SQUELDELAY;
1351 lp->clockmode = DEF_A_CLOCKMODE;
1352
1353 } else {
1354 lp->speed = DEF_B_SPEED;
1355
1356 lp->txdelay = DEF_B_TXDELAY;
1357 lp->persist = DEF_B_PERSIST;
1358 lp->slotime = DEF_B_SLOTIME;
1359 lp->squeldelay = DEF_B_SQUELDELAY;
1360 lp->clockmode = DEF_B_CLOCKMODE;
1361 }
1362 lp->bufsiz = DMA_BUFF_SIZE;
1363 lp->tstate = IDLE;
1364
1365 chipset_init(dev);
1366
1367 if (dev->base_addr & CHANA) {
1368
1369
1370 lp->dmachan = dev->dma;
1371 if (lp->dmachan < 1 || lp->dmachan > 3)
1372 printk("PI: DMA channel %d out of range\n", lp->dmachan);
1373
1374
1375
1376 if (dev->irq < 2) {
1377 autoirq_setup(0);
1378 save_flags(flags);
1379 cli();
1380 wrtscc(lp->cardbase, CTL + lp->base, R1, EXT_INT_ENAB);
1381
1382 wrtscc(lp->cardbase, CTL + lp->base, R9, MIE | NV);
1383 restore_flags(flags);
1384
1385 tdelay(lp, 1);
1386
1387 dev->irq = autoirq_report(20);
1388 if (!dev->irq) {
1389 printk(". Failed to detect IRQ line.\n");
1390 }
1391 save_flags(flags);
1392 cli();
1393 wrtscc(lp->cardbase, dev->base_addr + CTL, R9, FHWRES);
1394
1395 wrtscc(lp->cardbase, dev->base_addr + CTL, R9, 0);
1396 restore_flags(flags);
1397 }
1398
1399 printk("PI: Autodetected IRQ %d, assuming DMA %d.\n",
1400 dev->irq, dev->dma);
1401
1402
1403
1404
1405 {
1406 int irqval = request_irq(dev->irq, &pi_interrupt,0, "pi2");
1407 if (irqval) {
1408 printk("PI: unable to get IRQ %d (irqval=%d).\n",
1409 dev->irq, irqval);
1410 return EAGAIN;
1411 }
1412 }
1413
1414
1415 snarf_region(ioaddr & 0x3f0, PI_TOTAL_SIZE);
1416
1417
1418 }
1419 dev->open = pi_open;
1420 dev->stop = pi_close;
1421 dev->do_ioctl = pi_ioctl;
1422 dev->hard_start_xmit = pi_send_packet;
1423 dev->get_stats = pi_get_stats;
1424
1425
1426 for (i = 0; i < DEV_NUMBUFFS; i++)
1427 skb_queue_head_init(&dev->buffs[i]);
1428
1429
1430 dev->hard_header = pi_header;
1431 dev->rebuild_header = pi_rebuild_header;
1432 dev->set_mac_address = pi_set_mac_address;
1433
1434 dev->type = ARPHRD_AX25;
1435 dev->hard_header_len = 73;
1436 dev->mtu = 1500;
1437 dev->addr_len = 7;
1438 memcpy(dev->broadcast, ax25_bcast, 7);
1439 memcpy(dev->dev_addr, ax25_test, 7);
1440
1441
1442 dev->flags = 0;
1443 dev->family = AF_INET;
1444 dev->pa_addr = 0;
1445 dev->pa_brdaddr = 0;
1446 dev->pa_mask = 0;
1447 dev->pa_alen = 4;
1448
1449 return 0;
1450 }
1451
1452
1453
1454
1455
1456
1457
1458
1459 static int pi_open(struct device *dev)
1460 {
1461 unsigned long flags;
1462 static first_time = 1;
1463
1464 struct pi_local *lp = (struct pi_local *) dev->priv;
1465
1466 if (dev->base_addr & 2) {
1467 if (first_time) {
1468 if (request_dma(dev->dma,"pi2")) {
1469 free_irq(dev->irq);
1470 return -EAGAIN;
1471 }
1472 irq2dev_map[dev->irq] = dev;
1473 }
1474
1475 chipset_init(dev);
1476 }
1477 lp->tstate = IDLE;
1478
1479 if (dev->base_addr & 2) {
1480 scc_init(dev);
1481 scc_init(dev->next);
1482 }
1483
1484 save_flags(flags);
1485 cli();
1486 wrtscc(lp->cardbase, CTL + lp->base, R9, MIE | NV);
1487 restore_flags(flags);
1488
1489 lp->open_time = jiffies;
1490
1491 dev->tbusy = 0;
1492 dev->interrupt = 0;
1493 dev->start = 1;
1494 first_time = 0;
1495 return 0;
1496 }
1497
1498 static int pi_send_packet(struct sk_buff *skb, struct device *dev)
1499 {
1500 struct pi_local *lp = (struct pi_local *) dev->priv;
1501
1502
1503
1504
1505 if (skb == NULL) {
1506 dev_tint(dev);
1507 return 0;
1508 }
1509 hardware_send_packet(lp, skb);
1510 dev->trans_start = jiffies;
1511
1512 return 0;
1513 }
1514
1515
1516
1517 static void pi_interrupt(int reg_ptr, struct pt_regs *regs)
1518 {
1519
1520 struct pi_local *lp;
1521 int st;
1522 unsigned long flags;
1523
1524
1525
1526 #if 0
1527 if (dev_a == NULL) {
1528 printk("PI: pi_interrupt(): irq %d for unknown device.\n", irq);
1529 return;
1530 }
1531 #endif
1532
1533
1534
1535 lp = (struct pi_local *) pi0a.priv;
1536 while ((st = rdscc(lp->cardbase, pi0a.base_addr | CHANA | CTL, R3)) != 0) {
1537 if (st & CHBTxIP) {
1538
1539 lp = (struct pi_local *) pi0b.priv;
1540 b_txint(lp);
1541 } else if (st & CHARxIP) {
1542
1543 lp = (struct pi_local *) pi0a.priv;
1544 a_rxint(&pi0a, lp);
1545 } else if (st & CHATxIP) {
1546
1547 lp = (struct pi_local *) pi0a.priv;
1548 a_txint(lp);
1549 } else if (st & CHAEXT) {
1550
1551 lp = (struct pi_local *) pi0a.priv;
1552 a_exint(lp);
1553 } else if (st & CHBRxIP) {
1554
1555 lp = (struct pi_local *) pi0b.priv;
1556 b_rxint(&pi0b, lp);
1557 } else if (st & CHBEXT) {
1558
1559 lp = (struct pi_local *) pi0b.priv;
1560 b_exint(lp);
1561 }
1562
1563 save_flags(flags);
1564 cli();
1565 wrtscc(lp->cardbase, lp->base + CTL, R0, RES_H_IUS);
1566 restore_flags(flags);
1567 }
1568 return;
1569 }
1570
1571
1572 static int pi_close(struct device *dev)
1573 {
1574 unsigned long flags;
1575 struct pi_local *lp;
1576 struct sk_buff *ptr;
1577
1578 save_flags(flags);
1579 cli();
1580
1581 lp = (struct pi_local *) dev->priv;
1582 ptr = NULL;
1583
1584 chipset_init(dev);
1585 disable_dma(lp->dmachan);
1586
1587 lp->open_time = 0;
1588
1589 dev->tbusy = 1;
1590 dev->start = 0;
1591
1592
1593 while ((ptr = skb_dequeue(&lp->sndq)) != NULL)
1594 free_p(ptr);
1595
1596 restore_flags(flags);
1597 return 0;
1598 }
1599
1600 static int pi_ioctl(struct device *dev, struct ifreq *ifr, int cmd)
1601 {
1602 unsigned long flags;
1603 struct pi_req rq;
1604 struct pi_local *lp = (struct pi_local *) dev->priv;
1605
1606 int ret = verify_area(VERIFY_WRITE, ifr->ifr_data, sizeof(struct pi_req));
1607 if (ret)
1608 return ret;
1609
1610 if(cmd!=SIOCDEVPRIVATE)
1611 return -EINVAL;
1612
1613 memcpy_fromfs(&rq, ifr->ifr_data, sizeof(struct pi_req));
1614
1615 switch (rq.cmd) {
1616 case SIOCSPIPARAM:
1617
1618 if (!suser())
1619 return -EPERM;
1620 save_flags(flags);
1621 cli();
1622 lp->txdelay = rq.txdelay;
1623 lp->persist = rq.persist;
1624 lp->slotime = rq.slotime;
1625 lp->squeldelay = rq.squeldelay;
1626 lp->clockmode = rq.clockmode;
1627 lp->speed = rq.speed;
1628 pi_open(&pi0a);
1629 restore_flags(flags);
1630 ret = 0;
1631 break;
1632
1633 case SIOCSPIDMA:
1634
1635 if (!suser())
1636 return -EPERM;
1637 ret = 0;
1638 if (dev->base_addr & 2) {
1639 if (rq.dmachan < 1 || rq.dmachan > 3)
1640 return -EINVAL;
1641 save_flags(flags);
1642 cli();
1643 pi_close(dev);
1644 free_dma(lp->dmachan);
1645 dev->dma = lp->dmachan = rq.dmachan;
1646 if (request_dma(lp->dmachan,"pi2"))
1647 ret = -EAGAIN;
1648 pi_open(dev);
1649 restore_flags(flags);
1650 }
1651 break;
1652
1653 case SIOCSPIIRQ:
1654 ret = -EINVAL;
1655 break;
1656
1657 case SIOCGPIPARAM:
1658 case SIOCGPIDMA:
1659 case SIOCGPIIRQ:
1660
1661 rq.speed = lp->speed;
1662 rq.txdelay = lp->txdelay;
1663 rq.persist = lp->persist;
1664 rq.slotime = lp->slotime;
1665 rq.squeldelay = lp->squeldelay;
1666 rq.clockmode = lp->clockmode;
1667 rq.dmachan = lp->dmachan;
1668 rq.irq = dev->irq;
1669 memcpy_tofs(ifr->ifr_data, &rq, sizeof(struct pi_req));
1670 ret = 0;
1671 break;
1672
1673 default:
1674 ret = -EINVAL;
1675 }
1676 return ret;
1677 }
1678
1679
1680
1681 static struct netstats *
1682 pi_get_stats(struct device *dev)
1683 {
1684 struct pi_local *lp = (struct pi_local *) dev->priv;
1685
1686 return &lp->stats;
1687 }
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697