tag | line | file | source code |
cor3 | 1390 | drivers/char/cyclades.c | info->cor3 = (info->default_threshold |
cor3 | 1468 | drivers/char/cyclades.c | base_addr[CyCOR3<<index] = info->cor3; |
cor3 | 2019 | drivers/char/cyclades.c | info->cor3 &= ~CyREC_FIFO; |
cor3 | 2020 | drivers/char/cyclades.c | info->cor3 |= value & CyREC_FIFO; |
cor3 | 2021 | drivers/char/cyclades.c | base_addr[CyCOR3<<index] = info->cor3; |
cor3 | 2846 | drivers/char/cyclades.c | info->cor3 = 0x08; /* _very_ small receive threshold */ |
cor3 | 3090 | drivers/char/cyclades.c | info->cor1, info->cor2, info->cor3, info->cor4, info->cor5); |
cor3 | 2002 | drivers/char/stallion.c | unsigned char cor1, cor2, cor3; |
cor3 | 2010 | drivers/char/stallion.c | cor3 = 0; |
cor3 | 2086 | drivers/char/stallion.c | cor3 |= FIFO_RXTHRESHOLD; |
cor3 | 2141 | drivers/char/stallion.c | cor3 |= (COR3_FCT | COR3_SCD12); |
cor3 | 2158 | drivers/char/stallion.c | printk(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n", cor1, cor2, cor3, cor4, cor5); |
cor3 | 2174 | drivers/char/stallion.c | if (stl_updatereg(portp, COR3, cor3)) |
cor3 | 60 | include/linux/cyclades.h | int cor1,cor2,cor3,cor4,cor5; |