drivers/scsi/eata

/* */
This source file includes following definitions.
eata_scsi_done
eata_fake_int_handler
eata_release
eata_int_handler
eata_send_command
eata_send_immediate
eata_queue
eata_abort
eata_reset
get_board_data
check_blink_state
get_conf_PIO
print_config
register_HBA
find_EISA
find_ISA
find_PCI
eata_detect
   1 /************************************************************
   2  *                                                          *
   3  *                  Linux EATA SCSI driver                  *
   4  *                                                          *
   5  *  based on the CAM document CAM/89-004 rev. 2.0c,         *
   6  *  DPT's driver kit, some internal documents and source,   *
   7  *  and several other Linux scsi drivers and kernel docs.   *
   8  *                                                          *
   9  *  The driver currently:                                   *
  10  *      -supports all ISA based EATA-DMA boards             *
  11  *      -supports all EISA based EATA-DMA boards            *
  12  *      -supports all PCI based EATA-DMA boards             *
  13  *      -supports multiple HBAs with & without IRQ sharing  *
  14  *      -supports all SCSI channels on multi channel boards *
  15  *      -needs identical IDs on all channels of a HBA       * 
  16  *      -can be loaded as module                            *
  17  *      -displays statistical and hardware information      *
  18  *       in /proc/scsi/eata_dma                             *
  19  *      -provides rudimentary latency measurement           * 
  20  *       possibilities via /proc/scsi/eata_dma/<hostnum>    *
  21  *                                                          *
  22  *  (c)1993,94,95 Michael Neuffer                           *
  23  *                neuffer@goofy.zdv.uni-mainz.de            *
  24  *                                                          *
  25  *  This program is free software; you can redistribute it  *
  26  *  and/or modify it under the terms of the GNU General     *
  27  *  Public License as published by the Free Software        *
  28  *  Foundation; either version 2 of the License, or         *
  29  *  (at your option) any later version.                     *
  30  *                                                          *
  31  *  This program is distributed in the hope that it will be *
  32  *  useful, but WITHOUT ANY WARRANTY; without even the      *
  33  *  implied warranty of MERCHANTABILITY or FITNESS FOR A    *
  34  *  PARTICULAR PURPOSE.  See the GNU General Public License *
  35  *  for more details.                                       *
  36  *                                                          *
  37  *  You should have received a copy of the GNU General      *
  38  *  Public License along with this kernel; if not, write to *
  39  *  the Free Software Foundation, Inc., 675 Mass Ave,       *
  40  *  Cambridge, MA 02139, USA.                               *
  41  *                                                          *
  42  * I have to thank DPT for their excellent support. I took  *
  43  * me almost a year and a stopover at their HQ, on my first *
  44  * trip to the USA, to get it, but since then they've been  *
  45  * very helpful and tried to give me all the infos and      *
  46  * support I need.                                          *
  47  *                                                          *
  48  * Thanks also to Greg Hosler who did a lot of testing and  *
  49  * found quite a number of bugs during the development.     *
  50  ************************************************************
  51  *  last change: 95/09/17                 OS: Linux 1.3.28  *
  52  ************************************************************/
  53 
  54 /* Look in eata_dma.h for configuration and revision information */
  55 
  56 #ifdef MODULE
  57 #include <linux/module.h>
  58 #include <linux/version.h>
  59 #endif
  60  
  61 #include <linux/kernel.h>
  62 #include <linux/sched.h>
  63 #include <linux/string.h>
  64 #include <linux/ioport.h>
  65 #include <linux/malloc.h>
  66 #include <linux/in.h>
  67 #include <linux/bios32.h>
  68 #include <linux/pci.h>
  69 #include <linux/proc_fs.h>
  70 #include <asm/byteorder.h>
  71 #include <asm/types.h>
  72 #include <asm/io.h>
  73 #include <asm/dma.h>
  74 #include "../block/blk.h"
  75 #include "scsi.h"
  76 #include "sd.h"
  77 #include "hosts.h"
  78 #include <linux/scsicam.h>
  79 #include "eata_dma.h"
  80 #include "eata_dma_proc.h" 
  81 
  82 #include<linux/stat.h>
  83 
  84 struct proc_dir_entry proc_scsi_eata_dma = {
  85     PROC_SCSI_EATA, 8, "eata_dma",
  86     S_IFDIR | S_IRUGO | S_IXUGO, 2
  87 };
  88 
  89 static u32 ISAbases[] =
  90 {0x1F0, 0x170, 0x330, 0x230};
  91 static unchar EISAbases[] =
  92 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
  93 static uint registered_HBAs = 0;
  94 static struct Scsi_Host *last_HBA = NULL;
  95 static struct Scsi_Host *first_HBA = NULL;
  96 static unchar reg_IRQ[] =
  97 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
  98 static unchar reg_IRQL[] =
  99 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
 100 static struct eata_sp *status = 0;   /* Statuspacket array   */
 101 static void *dma_scratch = 0;
 102 
 103 static u32 fake_int_base;
 104 static int fake_int_result;
 105 static int fake_int_happened;
 106 
 107 static ulong int_counter = 0;
 108 static ulong queue_counter = 0;
 109 
 110 void eata_scsi_done (Scsi_Cmnd * scmd)
     /*  */
 111 {
 112     scmd->request.rq_status = RQ_SCSI_DONE;
 113 
 114     if (scmd->request.sem != NULL)
 115         up(scmd->request.sem);
 116     
 117     return;
 118 }   
 119 
 120 void eata_fake_int_handler(s32 irq, struct pt_regs * regs)
     /*  */
 121 {
 122     fake_int_result = inb(fake_int_base + HA_RSTATUS);
 123     fake_int_happened = TRUE;
 124     DBG(DBG_INTR3, printk("eata_fake_int_handler called irq%d base %#x"
 125                           " res %#x\n", irq, fake_int_base, fake_int_result));
 126     return;
 127 }
 128 
 129 #include "eata_dma_proc.c"
 130 
 131 #ifdef MODULE
 132 int eata_release(struct Scsi_Host *sh)
     /*  */
 133 {
 134     uint i;
 135     if (sh->irq && reg_IRQ[sh->irq] == 1) free_irq(sh->irq);
 136     else reg_IRQ[sh->irq]--;
 137     
 138     scsi_init_free((void *)status, 512);
 139     scsi_init_free((void *)dma_scratch, 512);
 140     for (i = 0; i < sh->can_queue; i++){ /* Free all SG arrays */
 141         if(SD(sh)->ccb[i].sg_list != NULL)
 142             scsi_init_free((void *) SD(sh)->ccb[i].sg_list, 
 143                            sh->sg_tablesize * sizeof(struct eata_sg_list));
 144     }
 145     
 146     if (SD(sh)->channel == 0) {
 147         if (sh->dma_channel != 0xff) free_dma(sh->dma_channel);
 148         if (sh->io_port && sh->n_io_port)
 149             release_region(sh->io_port, sh->n_io_port);
 150     }
 151     return(TRUE);
 152 }
 153 #endif
 154 
 155 
 156 void eata_int_handler(int irq, struct pt_regs * regs)
     /*  */
 157 {
 158     uint i, result = 0;
 159     uint hba_stat, scsi_stat, eata_stat;
 160     Scsi_Cmnd *cmd;
 161     struct eata_ccb *cp;
 162     struct eata_sp *sp;
 163     uint base;
 164     ulong flags;
 165     uint x;
 166     struct Scsi_Host *sh;
 167 
 168     save_flags(flags);
 169     cli();
 170 
 171     for (x = 1, sh = first_HBA; x <= registered_HBAs; x++, sh = SD(sh)->prev) {
 172         if (sh->irq != irq)
 173             continue;
 174         if (!(inb((uint)sh->base + HA_RAUXSTAT) & HA_AIRQ))
 175             continue;
 176         
 177         int_counter++;
 178         
 179         sp=&SD(sh)->sp;
 180         
 181         cp = sp->ccb; /* Has been passed thru, no conversion needed */
 182         cmd = cp->cmd;
 183         base = (uint) cmd->host->base;
 184         
 185         hba_stat = sp->hba_stat;
 186         
 187         scsi_stat = (sp->scsi_stat >> 1) & 0x1f; 
 188        
 189         if (sp->EOC == FALSE) {
 190             eata_stat = inb(base + HA_RSTATUS);
 191             printk("eata_dma: int_handler, board: %x cmd %lx returned "
 192                    "unfinished.\nEATA: %x HBA: %x SCSI: %x spadr %lx spadrirq "
 193                    "%lx, irq%d\n", base, (long)cp, eata_stat, hba_stat, 
 194                    scsi_stat,(long)&status, (long)&status[irq], irq);
 195             DBG(DBG_DELAY, DEL2(800));
 196             restore_flags(flags);
 197             return;
 198         } 
 199         
 200         if (cp->status == LOCKED) {
 201             cp->status = FREE;
 202             eata_stat = inb(base + HA_RSTATUS);
 203             printk("eata_dma: int_handler, freeing locked queueslot\n");
 204             DBG(DBG_INTR && DBG_DELAY, DEL2(800));
 205             restore_flags(flags);
 206             return;
 207         }
 208         
 209         eata_stat = inb(base + HA_RSTATUS); 
 210         DBG(DBG_INTR, printk("IRQ %d received, base %#.4x, pid %ld, target: "
 211                              "%x, lun: %x, ea_s: %#.2x, hba_s: %#.2x \n", 
 212                              irq, base, cmd->pid, cmd->target, cmd->lun, 
 213                              eata_stat, hba_stat));
 214 
 215         switch (hba_stat) {
 216         case HA_NO_ERROR:       /* NO Error */
 217             if (scsi_stat == CONDITION_GOOD
 218                 && cmd->device->type == TYPE_DISK
 219                 && (HD(cmd)->t_state[cp->cp_channel][cp->cp_id] == RESET))
 220                 result = DID_BUS_BUSY << 16;        
 221             else if (scsi_stat == GOOD) {
 222                 HD(cmd)->t_state[cp->cp_channel][cp->cp_id] = OK;
 223                 if(HD(cmd)->do_latency == TRUE && cp->timestamp) {
 224                     uint time;
 225                     time = jiffies - cp->timestamp;
 226                     if((cp->rw_latency) == TRUE) { /* was WRITE */
 227                         if(HD(cmd)->writes_lat[cp->sizeindex][1] > time)
 228                             HD(cmd)->writes_lat[cp->sizeindex][1] = time;
 229                         if(HD(cmd)->writes_lat[cp->sizeindex][2] < time)
 230                             HD(cmd)->writes_lat[cp->sizeindex][2] = time;
 231                         HD(cmd)->writes_lat[cp->sizeindex][3] += time;
 232                         HD(cmd)->writes_lat[cp->sizeindex][0]++;
 233                     } else {
 234                         if(HD(cmd)->reads_lat[cp->sizeindex][1] > time)
 235                             HD(cmd)->reads_lat[cp->sizeindex][1] = time;
 236                         if(HD(cmd)->reads_lat[cp->sizeindex][2] < time)
 237                             HD(cmd)->reads_lat[cp->sizeindex][2] = time;
 238                         HD(cmd)->reads_lat[cp->sizeindex][3] += time;
 239                         HD(cmd)->reads_lat[cp->sizeindex][0]++;
 240                     }
 241                 }
 242             }
 243             else if (scsi_stat == CHECK_CONDITION
 244                      && cmd->device->type == TYPE_DISK
 245                      && (cmd->sense_buffer[2] & 0xf) == RECOVERED_ERROR)
 246                 result = DID_BUS_BUSY << 16;
 247             else
 248                 result = DID_OK << 16;
 249             HD(cmd)->t_timeout[cp->cp_channel][cp->cp_id] = OK;
 250             break;
 251         case HA_ERR_SEL_TO:     /* Selection Timeout */
 252             result = DID_BAD_TARGET << 16;  
 253             break;
 254         case HA_ERR_CMD_TO:     /* Command Timeout   */
 255             if (HD(cmd)->t_timeout[cp->cp_channel][cp->cp_id] > 1)
 256                 result = DID_ERROR << 16;
 257             else {
 258                 result = DID_TIME_OUT << 16;
 259                 HD(cmd)->t_timeout[cp->cp_channel][cp->cp_id]++;
 260             }
 261             break;
 262         case HA_ERR_RESET:              /* SCSI Bus Reset Received */
 263         case HA_INIT_POWERUP:           /* Initial Controller Power-up */
 264             if (cmd->device->type != TYPE_TAPE)
 265                 result = DID_BUS_BUSY << 16;
 266             else
 267                 result = DID_ERROR << 16;
 268             
 269             for (i = 0; i < MAXTARGET; i++)
 270                 HD(cmd)->t_state[cp->cp_channel][i] = RESET;
 271             break;
 272         case HA_UNX_BUSPHASE:       /* Unexpected Bus Phase */
 273         case HA_UNX_BUS_FREE:       /* Unexpected Bus Free */
 274         case HA_BUS_PARITY:         /* Bus Parity Error */
 275         case HA_SCSI_HUNG:          /* SCSI Hung */
 276         case HA_UNX_MSGRJCT:        /* Unexpected Message Reject */
 277         case HA_RESET_STUCK:        /* SCSI Bus Reset Stuck */
 278         case HA_RSENSE_FAIL:        /* Auto Request-Sense Failed */
 279         case HA_PARITY_ERR:         /* Controller Ram Parity */
 280         default:
 281             result = DID_ERROR << 16;
 282             break;
 283         }
 284         cmd->result = result | (scsi_stat << 1); 
 285         
 286 #if DBG_INTR2
 287         if (scsi_stat || result || hba_stat || eata_stat != 0x50 
 288             || cmd->scsi_done == NULL || cmd->device->id == 7) 
 289             printk("HBA: %d, channel %d, id: %d, lun %d, pid %ld:\n" 
 290                    "eata_stat %#x, hba_stat %#.2x, scsi_stat %#.2x, "
 291                    "sense_key: %#x, result: %#.8x\n", 
 292                    x, cmd->device->channel, cmd->device->id, cmd->device->lun,
 293                    cmd->pid, eata_stat, hba_stat, scsi_stat, 
 294                    cmd->sense_buffer[2] & 0xf, cmd->result); 
 295         DBG(DBG_INTR&&DBG_DELAY,DEL2(800));
 296 #endif
 297         
 298         cp->status = FREE;          /* now we can release the slot  */
 299         cmd->scsi_done(cmd);
 300     }
 301     restore_flags(flags);
 302     
 303     return;
 304 }
 305 
 306 inline int eata_send_command(u32 addr, u32 base, u8 command)
     /*  */
 307 {
 308     long loop = R_LIMIT;
 309     
 310     while (inb(base + HA_RAUXSTAT) & HA_ABUSY)
 311         if (--loop == 0)
 312             return(FALSE);
 313 
 314     /* And now the address in nice little byte chunks */
 315     outb( addr & 0x000000ff,        base + HA_WDMAADDR);
 316     outb((addr & 0x0000ff00) >> 8,  base + HA_WDMAADDR + 1);
 317     outb((addr & 0x00ff0000) >> 16, base + HA_WDMAADDR + 2);
 318     outb((addr & 0xff000000) >> 24, base + HA_WDMAADDR + 3);
 319     outb(command, base + HA_WCOMMAND);
 320     return(TRUE);
 321 }
 322 
 323 #if 0 
 324 inline int eata_send_immediate(u32 addr, u32 base, u8 cmnd, u8 cmnd2, u8 id, 
     /*  */
 325                                u8 lun)
 326 {
 327     if(addr){
 328         outb( addr & 0x000000ff,        base + HA_WDMAADDR);
 329         outb((addr & 0x0000ff00) >> 8,  base + HA_WDMAADDR + 1);
 330         outb((addr & 0x00ff0000) >> 16, base + HA_WDMAADDR + 2);
 331         outb((addr & 0xff000000) >> 24, base + HA_WDMAADDR + 3);
 332     } else {
 333         outb(id,  base + HA_WSUBCODE);
 334         outb(lun, base + HA_WSUBLUN);
 335     }
 336     
 337     outb(cmnd2, base + HA_WCOMMAND2);
 338     outb(cmnd,  base + HA_WCOMMAND);
 339     return(TRUE);
 340 }
 341 #endif
 342 
 343 int eata_queue(Scsi_Cmnd * cmd, void (* done) (Scsi_Cmnd *))
     /*  */
 344 {
 345     unsigned int i, x, y;
 346     u32 flags;
 347     hostdata *hd;
 348     struct Scsi_Host *sh;
 349     struct eata_ccb *cp;
 350     struct scatterlist *sl;
 351     
 352     save_flags(flags);
 353     cli();
 354     
 355     queue_counter++;
 356 
 357     hd = HD(cmd);
 358     sh = cmd->host;
 359     
 360     /* check for free slot */
 361     for (y = hd->last_ccb + 1, x = 0; x < sh->can_queue; x++, y++) { 
 362         if (y >= sh->can_queue)
 363             y = 0;
 364         if (hd->ccb[y].status == FREE)
 365             break;
 366     }
 367     
 368     hd->last_ccb = y;
 369 
 370     if (x >= sh->can_queue) { 
 371         uint z;
 372         
 373         printk(KERN_EMERG "eata_dma: run out of queue slots cmdno:%ld"
 374                " intrno: %ld, can_queue: %d, x: %d, y: %d\n", 
 375                queue_counter, int_counter, sh->can_queue, x, y);
 376         printk(KERN_EMERG "List of free queueslots:");
 377         for(z = 0; z < sh->can_queue; z +=2) {
 378             switch(hd->ccb[z].status) {
 379             case FREE:
 380                 printk(KERN_EMERG "Slot %2d is FREE  \t", z);
 381                 break;
 382             case USED:
 383                 printk(KERN_EMERG "Slot %2d is USED  \t", z);
 384                 break;
 385             case LOCKED:
 386                 printk(KERN_EMERG "Slot %2d is LOCKED\t", z);
 387                 break;
 388             default:
 389                 printk(KERN_EMERG "Slot %2d is UNKNOWN\t", z);
 390             }
 391             panic("\nSystem halted.\n");
 392         }
 393     }
 394     cp = &hd->ccb[y];
 395     
 396     memset(cp, 0, sizeof(struct eata_ccb) - sizeof(struct eata_sg_list *));
 397     
 398     cp->status = USED;                  /* claim free slot */
 399     
 400     DBG(DBG_QUEUE, printk("eata_queue pid %ld, target: %x, lun: %x, y %d\n",
 401                           cmd->pid, cmd->target, cmd->lun, y));
 402     DBG(DBG_QUEUE && DBG_DELAY, DEL2(250));
 403     
 404     if(hd->do_latency == TRUE) {
 405         int x, z;
 406         short *sho;
 407         long *lon;
 408         x = 0;  /* just to keep GCC quiet */ 
 409         if (cmd->cmnd[0] == WRITE_6 || cmd->cmnd[0] == WRITE_10 || 
 410             cmd->cmnd[0] == WRITE_12 || cmd->cmnd[0] == READ_6 || 
 411             cmd->cmnd[0] == READ_10 || cmd->cmnd[0] == READ_12) {
 412             
 413             cp->timestamp = jiffies;    /* For latency measurements */
 414             switch(cmd->cmnd[0]) {
 415             case WRITE_6:   
 416             case READ_6:    
 417                 x = cmd->cmnd[4]/2; 
 418                 break;
 419             case WRITE_10:   
 420             case READ_10:
 421                 sho = (short *) &cmd->cmnd[7];
 422                 x = ntohs(*sho)/2;            
 423                 break;
 424             case WRITE_12:   
 425             case READ_12:
 426                 lon = (long *) &cmd->cmnd[6];
 427                 x = ntohl(*lon)/2;            
 428                 break;
 429             }
 430 
 431             for(z = 0; (x > (1 << z)) && (z <= 11); z++) 
 432                 /* nothing */;
 433             cp->sizeindex = z;
 434             if (cmd->cmnd[0] == WRITE_6 || cmd->cmnd[0] == WRITE_10 || 
 435                 cmd->cmnd[0] == WRITE_12){
 436                 cp->rw_latency = TRUE;
 437             }
 438         }
 439     }
 440     cmd->scsi_done = (void *)done;
 441     
 442     switch (cmd->cmnd[0]) {
 443     case CHANGE_DEFINITION: case COMPARE:         case COPY:
 444     case COPY_VERIFY:       case LOG_SELECT:      case MODE_SELECT:
 445     case MODE_SELECT_10:    case SEND_DIAGNOSTIC: case WRITE_BUFFER:
 446     case FORMAT_UNIT:       case REASSIGN_BLOCKS: case RESERVE:
 447     case SEARCH_EQUAL:      case SEARCH_HIGH:     case SEARCH_LOW:
 448     case WRITE_6:           case WRITE_10:        case WRITE_VERIFY:
 449     case UPDATE_BLOCK:      case WRITE_LONG:      case WRITE_SAME:      
 450     case SEARCH_HIGH_12:    case SEARCH_EQUAL_12: case SEARCH_LOW_12:
 451     case WRITE_12:          case WRITE_VERIFY_12: case SET_WINDOW: 
 452     case MEDIUM_SCAN:       case SEND_VOLUME_TAG:            
 453     case 0xea:      /* alternate number for WRITE LONG */
 454         cp->DataOut = TRUE;     /* Output mode */
 455         break;
 456     case TEST_UNIT_READY:
 457     default:
 458         cp->DataIn = TRUE;      /* Input mode  */
 459     }
 460 
 461     /* FIXME: This will will have to be changed once the midlevel driver 
 462      *        allows different HBA IDs on every channel.
 463      */
 464     if (cmd->target == sh->this_id) 
 465         cp->Interpret = TRUE;   /* Interpret command */
 466 
 467     if (cmd->use_sg) {
 468         cp->scatter = TRUE;     /* SG mode     */
 469         if (cp->sg_list == NULL) {
 470             cp->sg_list = kmalloc(SG_SIZE_BIG*sizeof(struct eata_sg_list),
 471                                   GFP_ATOMIC | GFP_DMA);
 472         }
 473         if (cp->sg_list == NULL)
 474             panic("eata_dma: Run out of DMA memory for SG lists !\n");
 475         cp->cp_dataDMA = htonl(virt_to_bus(cp->sg_list)); 
 476         
 477         cp->cp_datalen = htonl(cmd->use_sg * sizeof(struct eata_sg_list));
 478         sl=(struct scatterlist *)cmd->request_buffer;
 479         for(i = 0; i < cmd->use_sg; i++, sl++){
 480             cp->sg_list[i].data = htonl(virt_to_bus(sl->address));
 481             cp->sg_list[i].len = htonl((u32) sl->length);
 482         }
 483     } else {
 484         cp->scatter = FALSE;
 485         cp->cp_datalen = htonl(cmd->request_bufflen);
 486         cp->cp_dataDMA = htonl(virt_to_bus(cmd->request_buffer));
 487     }
 488     
 489     cp->Auto_Req_Sen = TRUE;
 490     cp->cp_reqDMA = htonl(virt_to_bus(cmd->sense_buffer));
 491     cp->reqlen = sizeof(cmd->sense_buffer);
 492     
 493     cp->cp_id = cmd->target;
 494     cp->cp_channel = cmd->channel;
 495     cp->cp_lun = cmd->lun;
 496     cp->cp_dispri = TRUE;
 497     cp->cp_identify = TRUE;
 498     memcpy(cp->cp_cdb, cmd->cmnd, cmd->cmd_len);
 499     
 500     cp->cp_statDMA = htonl(virt_to_bus(&(hd->sp)));
 501     
 502     cp->cp_viraddr = cp; /* This will be passed thru, so we don't need to convert it */
 503     cp->cmd = cmd;
 504     cmd->host_scribble = (char *)&hd->ccb[y];   
 505     
 506     if(eata_send_command((u32) cp, (u32) sh->base, EATA_CMD_DMA_SEND_CP) == FALSE) {
 507         cmd->result = DID_BUS_BUSY << 16;
 508         printk("eata_queue target %d, pid %ld, HBA busy, returning DID_BUS_BUSY\n", 
 509                cmd->target, cmd->pid);
 510         done(cmd);
 511         cp->status = FREE;     /* Hmmm..... */
 512         restore_flags(flags);
 513         return(0);
 514     }
 515     DBG(DBG_QUEUE,printk("Queued base %#.4x pid: %ld target: %x lun: %x "
 516                          "slot %d irq %d\n", (s32)sh->base, cmd->pid, 
 517                          cmd->target, cmd->lun, y, sh->irq));
 518     DBG(DBG_QUEUE && DBG_DELAY, DEL2(200));
 519     restore_flags(flags);
 520     return(0);
 521 }
 522 
 523 
 524 int eata_abort(Scsi_Cmnd * cmd)
     /*  */
 525 {
 526     ulong flags;
 527     ulong loop = R_LIMIT;
 528 
 529     save_flags(flags);
 530     cli();
 531 
 532     DBG(DBG_ABNORM, printk("eata_abort called pid: %ld target: %x lun: %x"
 533                            " reason %x\n", cmd->pid, cmd->target, cmd->lun, 
 534                            cmd->abort_reason));
 535     DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 536     
 537     
 538     while (inb((u32)(cmd->host->base) + HA_RAUXSTAT) & HA_ABUSY)
 539         if (--loop == 0) {
 540             printk("eata_dma: abort, timeout error.\n");
 541             restore_flags(flags);
 542             DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 543             return (SCSI_ABORT_ERROR);
 544         }
 545     if (CD(cmd)->status == USED) {
 546         DBG(DBG_ABNORM, printk("Returning: SCSI_ABORT_BUSY\n"));
 547         restore_flags(flags);
 548         return (SCSI_ABORT_BUSY);  /* SNOOZE */ 
 549     }
 550     if (CD(cmd)->status == FREE) {
 551         DBG(DBG_ABNORM, printk("Returning: SCSI_ABORT_NOT_RUNNING\n")); 
 552         restore_flags(flags);
 553         return (SCSI_ABORT_NOT_RUNNING);
 554     }
 555     if (CD(cmd)->status == RESET) {
 556         restore_flags(flags);
 557         printk("eata_dma: abort, command reset error.\n");
 558         DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 559         return (SCSI_ABORT_ERROR);
 560     }
 561     if (CD(cmd)->status == LOCKED) {
 562         restore_flags(flags);
 563         DBG(DBG_ABNORM, printk("eata_dma: abort, queue slot locked.\n"));
 564         DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 565         return (SCSI_ABORT_NOT_RUNNING);
 566     }
 567     restore_flags(flags);
 568     panic("eata_dma: abort: invalid slot status\n");
 569 }
 570 
 571 int eata_reset(Scsi_Cmnd * cmd)
     /*  */
 572 {
 573     ushort x, z; 
 574     ulong time, limit = 0;
 575     ulong loop = R_LIMIT;
 576     ulong flags;
 577     unchar success = FALSE;
 578     Scsi_Cmnd *sp; 
 579     
 580     save_flags(flags);
 581     cli();
 582     
 583     DBG(DBG_ABNORM, printk("eata_reset called pid:%ld target: %x lun: %x"
 584                            " reason %x\n", cmd->pid, cmd->target, cmd->lun, 
 585                            cmd->abort_reason));
 586         
 587     if (HD(cmd)->state == RESET) {
 588         printk("eata_reset: exit, already in reset.\n");
 589         restore_flags(flags);
 590         DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 591         return (SCSI_RESET_ERROR);
 592     }
 593     
 594     while (inb((u32)(cmd->host->base) + HA_RAUXSTAT) & HA_ABUSY)
 595         if (--loop == 0) {
 596             printk("eata_reset: exit, timeout error.\n");
 597             restore_flags(flags);
 598             DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 599             return (SCSI_RESET_ERROR);
 600         }
 601  
 602     for (x = 0; x < MAXCHANNEL; x++) {
 603         for (z = 0; z < MAXTARGET; z++) {
 604             HD(cmd)->t_state[x][z] = RESET;
 605             HD(cmd)->t_timeout[x][z] = NO_TIMEOUT;
 606         }
 607     }
 608 
 609     for (x = 0; x < cmd->host->can_queue; x++) {
 610         if (HD(cmd)->ccb[x].status == FREE)
 611             continue;
 612         
 613         if (HD(cmd)->ccb[x].status == LOCKED) {
 614             HD(cmd)->ccb[x].status = FREE;
 615             printk("eata_reset: locked slot %d forced free.\n", x);
 616             DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 617             continue;
 618         }
 619         sp = HD(cmd)->ccb[x].cmd;
 620         HD(cmd)->ccb[x].status = RESET;
 621         printk("eata_reset: slot %d in reset, pid %ld.\n", x, sp->pid);
 622         DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 623         
 624         if (sp == NULL)
 625             panic("eata_reset: slot %d, sp==NULL.\n", x);
 626         DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 627         
 628         if (sp == cmd)
 629             success = TRUE;
 630     }
 631     
 632     /* hard reset the HBA  */
 633     inb((u32) (cmd->host->base) + HA_RSTATUS);  /* This might cause trouble */
 634     eata_send_command(0, (u32) cmd->host->base, EATA_CMD_RESET);
 635     
 636     DBG(DBG_ABNORM, printk("eata_reset: board reset done, enabling interrupts.\n"));
 637     HD(cmd)->state = RESET;
 638     
 639     restore_flags(flags);
 640     
 641     time = jiffies;
 642     while (jiffies < (time + (3 * HZ)) || limit++ < 10000000)
 643         /* As time goes by... */;
 644     
 645     save_flags(flags);
 646     cli();
 647     
 648     DBG(DBG_ABNORM, printk("eata_reset: interrupts disabled, loops %ld.\n", 
 649                            limit));
 650     DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 651     
 652     for (x = 0; x < cmd->host->can_queue; x++) {
 653         
 654         /* Skip slots already set free by interrupt */
 655         if (HD(cmd)->ccb[x].status != RESET)
 656             continue;
 657         
 658         sp = HD(cmd)->ccb[x].cmd;
 659         sp->result = DID_RESET << 16;
 660         
 661         /* This mailbox is still waiting for its interrupt */
 662         HD(cmd)->ccb[x].status = LOCKED;
 663         
 664         printk("eata_reset: slot %d locked, DID_RESET, pid %ld done.\n",
 665                x, sp->pid);
 666         DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 667         restore_flags(flags);
 668         sp->scsi_done(sp);
 669         cli();
 670     }
 671     
 672     HD(cmd)->state = FALSE;
 673     restore_flags(flags);
 674     
 675     if (success) {
 676         DBG(DBG_ABNORM, printk("eata_reset: exit, success.\n"));
 677         DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 678         return (SCSI_RESET_SUCCESS);
 679     } else {
 680         DBG(DBG_ABNORM, printk("eata_reset: exit, wakeup.\n"));
 681         DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
 682         return (SCSI_RESET_PUNT);
 683     }
 684 }
 685 
 686 char * get_board_data(u32 base, u32 irq, u32 id)
     /*  */
 687 {
 688     struct eata_ccb *cp;
 689     struct eata_sp  *sp;
 690     static char *buff;
 691     ulong i;
 692     ulong limit = 0;
 693 
 694     cp = (struct eata_ccb *) scsi_init_malloc(sizeof(struct eata_ccb),
 695                                               GFP_ATOMIC | GFP_DMA);
 696     sp = (struct eata_sp *) scsi_init_malloc(sizeof(struct eata_sp), 
 697                                              GFP_ATOMIC | GFP_DMA);
 698 
 699     buff = dma_scratch;
 700  
 701     memset(cp, 0, sizeof(struct eata_ccb));
 702     memset(sp, 0, sizeof(struct eata_sp));
 703     memset(buff, 0, 256);
 704 
 705     cp->DataIn = TRUE;     
 706     cp->Interpret = TRUE;   /* Interpret command */
 707     cp->cp_dispri = TRUE;
 708     cp->cp_identify = TRUE;
 709  
 710     cp->cp_datalen = htonl(56);  
 711     cp->cp_dataDMA = htonl(virt_to_bus(buff));
 712     cp->cp_statDMA = htonl(virt_to_bus(sp));
 713     cp->cp_viraddr = cp;
 714     
 715     cp->cp_id = id;
 716     cp->cp_lun = 0;
 717 
 718     cp->cp_cdb[0] = INQUIRY;
 719     cp->cp_cdb[1] = 0;
 720     cp->cp_cdb[2] = 0;
 721     cp->cp_cdb[3] = 0;
 722     cp->cp_cdb[4] = 56;
 723     cp->cp_cdb[5] = 0;
 724 
 725     fake_int_base = base;
 726     fake_int_result = FALSE;
 727     fake_int_happened = FALSE;
 728 
 729     eata_send_command((u32) cp, (u32) base, EATA_CMD_DMA_SEND_CP);
 730     
 731     i = jiffies + (3 * HZ);
 732     while (fake_int_happened == FALSE && jiffies <= i) 
 733         barrier();
 734     
 735     DBG(DBG_INTR3, printk("fake_int_result: %#x hbastat %#x scsistat %#x,"
 736                           " buff %p sp %p\n",
 737                           fake_int_result, (u32) (sp->hba_stat /*& 0x7f*/), 
 738                           (u32) sp->scsi_stat, buff, sp));
 739 
 740     scsi_init_free((void *)cp, sizeof(struct eata_ccb));
 741     scsi_init_free((void *)sp, sizeof(struct eata_sp));
 742     
 743     if ((fake_int_result & HA_SERROR) || jiffies > i){
 744         /* hard reset the HBA  */
 745         inb((u32) (base) + HA_RSTATUS);
 746         eata_send_command(0, base, EATA_CMD_RESET);
 747         i = jiffies;
 748         while (jiffies < (i + (3 * HZ)) && limit++ < 10000000) 
 749             barrier();
 750         return (NULL);
 751     } else
 752         return (buff);
 753 }
 754     
 755 int check_blink_state(long base)
     /*  */
 756 {
 757     ushort loops = 10;
 758     u32 blinkindicator;
 759     u32 state = 0x12345678;
 760     u32 oldstate = 0;
 761 
 762     blinkindicator = htonl(0x54504442);
 763     while ((loops--) && (state != oldstate)) {
 764         oldstate = state;
 765         state = inl((uint) base + 1);
 766     }
 767 
 768     DBG(DBG_BLINK, printk("Did Blink check. Status: %d\n",
 769               (state == oldstate) && (state == blinkindicator)));
 770 
 771     if ((state == oldstate) && (state == blinkindicator))
 772         return(TRUE);
 773     else
 774         return (FALSE);
 775 }
 776 
 777 int get_conf_PIO(u32 base, struct get_conf *buf)
     /*  */
 778 {
 779     ulong loop = R_LIMIT;
 780     u16 *p;
 781 
 782     if(check_region(base, 9)) 
 783         return (FALSE);
 784      
 785     memset(buf, 0, sizeof(struct get_conf));
 786 
 787     while (inb(base + HA_RSTATUS) & HA_SBUSY)
 788         if (--loop == 0) 
 789             return (FALSE);
 790        
 791     DBG(DBG_PIO && DBG_PROBE,
 792         printk("Issuing PIO READ CONFIG to HBA at %#x\n", base));
 793     eata_send_command(0, base, EATA_CMD_PIO_READ_CONFIG);
 794 
 795     loop = R_LIMIT;
 796     for (p = (u16 *) buf; 
 797          (long)p <= ((long)buf + (sizeof(struct get_conf) / 2)); p++) {
 798         while (!(inb(base + HA_RSTATUS) & HA_SDRQ))
 799             if (--loop == 0)
 800                 return (FALSE);
 801 
 802         loop = R_LIMIT;
 803         *p = inw(base + HA_RDATA);
 804     }
 805 
 806     if (!(inb(base + HA_RSTATUS) & HA_SERROR)) {            /* Error ? */
 807         if (htonl(EATA_SIGNATURE) == buf->signature) {
 808             DBG(DBG_PIO&&DBG_PROBE, printk("EATA Controller found at %x "
 809                                            "EATA Level: %x\n", (uint) base, 
 810                                            (uint) (buf->version)));
 811             
 812             while (inb(base + HA_RSTATUS) & HA_SDRQ) 
 813                 inw(base + HA_RDATA);
 814             return (TRUE);
 815         } 
 816     } else {
 817         DBG(DBG_PROBE, printk("eata_dma: get_conf_PIO, error during transfer "
 818                   "for HBA at %lx\n", (long)base));
 819     }
 820     return (FALSE);
 821 }
 822 
 823 void print_config(struct get_conf *gc)
     /*  */
 824 {
 825     printk("Please check values: (read config data)\n");
 826     printk("LEN: %d ver:%d OCS:%d TAR:%d TRNXFR:%d MORES:%d DMAS:%d\n",
 827            (u32) ntohl(gc->len), gc->version,
 828            gc->OCS_enabled, gc->TAR_support, gc->TRNXFR, gc->MORE_support,
 829            gc->DMA_support);
 830     printk("DMAV:%d HAAV:%d SCSIID0:%d ID1:%d ID2:%d QUEUE:%d SG:%d SEC:%d\n",
 831            gc->DMA_valid, gc->HAA_valid, gc->scsi_id[3], gc->scsi_id[2],
 832            gc->scsi_id[1], ntohs(gc->queuesiz), ntohs(gc->SGsiz), gc->SECOND);
 833     printk("IRQ:%d IRQT:%d DMAC:%d FORCADR:%d SG_64K:%d SG_UAE:%d MID:%d "
 834            "MCH:%d MLUN:%d\n",
 835            gc->IRQ, gc->IRQ_TR, (8 - gc->DMA_channel) & 7, gc->FORCADR, 
 836            gc->SG_64K, gc->SG_UAE, gc->MAX_ID, gc->MAX_CHAN, gc->MAX_LUN); 
 837     printk("RIDQ:%d PCI:%d EISA:%d\n",
 838            gc->ID_qest, gc->is_PCI, gc->is_EISA);
 839     DBG(DPT_DEBUG, DELAY(14));
 840 }
 841 
 842 short register_HBA(u32 base, struct get_conf *gc, Scsi_Host_Template * tpnt, 
     /*  */
 843                    u8 bustype)
 844 {
 845     ulong size = 0;
 846     unchar dma_channel = 0;
 847     char *buff = 0;
 848     unchar bugs = 0;
 849     struct Scsi_Host *sh;
 850     hostdata *hd;
 851     int x;
 852     
 853     
 854     DBG(DBG_REGISTER, print_config(gc));
 855 
 856     if (gc->DMA_support == FALSE) {
 857         printk("The EATA HBA at %#.4x does not support DMA.\n" 
 858                "Please use the EATA-PIO driver.\n", base);
 859         return (FALSE);
 860     }
 861     if(gc->HAA_valid == FALSE || ntohl(gc->len) < 0x22) 
 862         gc->MAX_CHAN = 0;
 863     
 864     if (reg_IRQ[gc->IRQ] == FALSE) {    /* Interrupt already registered ? */
 865         if (!request_irq(gc->IRQ, (void *) eata_fake_int_handler, SA_INTERRUPT,
 866                          "eata_dma")){
 867             reg_IRQ[gc->IRQ]++;
 868             if (!gc->IRQ_TR)
 869                 reg_IRQL[gc->IRQ] = TRUE;   /* IRQ is edge triggered */
 870         } else {
 871             printk("Couldn't allocate IRQ %d, Sorry.", gc->IRQ);
 872             return (FALSE);
 873         }
 874     } else {            /* More than one HBA on this IRQ */
 875         if (reg_IRQL[gc->IRQ] == TRUE) {
 876             printk("Can't support more than one HBA on this IRQ,\n"
 877                    "  if the IRQ is edge triggered. Sorry.\n");
 878             return (FALSE);
 879         } else
 880             reg_IRQ[gc->IRQ]++;
 881     }
 882     
 883     /* if gc->DMA_valid it must be an ISA HBA and we have to register it */
 884     dma_channel = 0xff;
 885     if (gc->DMA_valid) {
 886         if (request_dma(dma_channel = (8 - gc->DMA_channel) & 7, "eata_dma")) {
 887             printk("Unable to allocate DMA channel %d for ISA HBA at %#.4x.\n",
 888                    dma_channel, base);
 889             reg_IRQ[gc->IRQ]--;
 890             if (reg_IRQ[gc->IRQ] == 0)
 891                 free_irq(gc->IRQ);
 892             if (gc->IRQ_TR == FALSE)
 893                 reg_IRQL[gc->IRQ] = FALSE; 
 894             return (FALSE);
 895         }
 896     }
 897  
 898 #if !(NEWSTUFF)
 899     if (bustype != IS_EISA && bustype != IS_ISA)
 900 #endif
 901         buff = get_board_data(base, gc->IRQ, gc->scsi_id[3]);
 902 
 903     if (buff == NULL) {
 904 #if !(NEWSTUFF)
 905         if (bustype == IS_EISA || bustype == IS_ISA) {
 906             bugs = bugs || BROKEN_INQUIRY;
 907         } else {
 908 #endif
 909             if (gc->DMA_support == FALSE)
 910                 printk("HBA at %#.4x doesn't support DMA. Sorry\n", base);
 911             else
 912                 printk("HBA at %#.4x does not react on INQUIRY. Sorry.\n", 
 913                        base);
 914             if (gc->DMA_valid) 
 915                 free_dma(dma_channel);
 916             reg_IRQ[gc->IRQ]--;
 917             if (reg_IRQ[gc->IRQ] == 0)
 918                 free_irq(gc->IRQ);
 919             if (gc->IRQ_TR == FALSE)
 920                 reg_IRQL[gc->IRQ] = FALSE; 
 921             return (FALSE);
 922 #if !(NEWSTUFF)
 923         }
 924 #endif
 925     }
 926     
 927     if (gc->DMA_support == FALSE && buff != NULL)  
 928         printk("HBA %.12sat %#.4x doesn't set the DMA_support flag correctly.\n",
 929                &buff[16], base);
 930     
 931     request_region(base, 9, "eata_dma"); /* We already checked the 
 932                                           * availability, so this
 933                                           * should not fail.
 934                                           */
 935     
 936     if(ntohs(gc->queuesiz) == 0) {
 937         gc->queuesiz = ntohs(64);
 938         printk("Warning: Queue size has to be corrected. Assuming 64 queueslots\n"
 939                "         This might be a PM2012B with a defective Firmware\n");
 940     }
 941 
 942     size = sizeof(hostdata) + ((sizeof(struct eata_ccb) + sizeof(long)) 
 943                                * ntohs(gc->queuesiz));
 944 
 945     DBG(DBG_REGISTER, printk("scsi_register size: %ld\n", size));
 946 
 947     sh = scsi_register(tpnt, size);
 948     
 949     if(sh == NULL) {
 950         if (gc->DMA_valid) 
 951             free_dma(dma_channel);
 952         
 953         reg_IRQ[gc->IRQ]--;
 954         if (reg_IRQ[gc->IRQ] == 0)
 955             free_irq(gc->IRQ);
 956         if (gc->IRQ_TR == FALSE)
 957             reg_IRQL[gc->IRQ] = FALSE; 
 958         return (FALSE);
 959     }
 960     
 961     hd = SD(sh);                   
 962     
 963     memset(hd->ccb, 0, sizeof(struct eata_ccb) * ntohs(gc->queuesiz));
 964     memset(hd->reads, 0, sizeof(u32) * 26); 
 965 
 966     hd->broken_INQUIRY = (bugs & BROKEN_INQUIRY);
 967 
 968     if(hd->broken_INQUIRY == TRUE) {
 969         strcpy(SD(sh)->vendor, "DPT");
 970         strcpy(SD(sh)->name, "??????????");
 971         strcpy(SD(sh)->revision, "???.?");
 972     } else {    
 973         strncpy(SD(sh)->vendor, &buff[8], 8);
 974         SD(sh)->vendor[8] = 0;
 975         strncpy(SD(sh)->name, &buff[16], 17);
 976         SD(sh)->name[17] = 0;
 977         SD(sh)->revision[0] = buff[32];
 978         SD(sh)->revision[1] = buff[33];
 979         SD(sh)->revision[2] = buff[34];
 980         SD(sh)->revision[3] = '.';
 981         SD(sh)->revision[4] = buff[35];
 982         SD(sh)->revision[5] = 0;
 983     }
 984 
 985     switch (ntohl(gc->len)) {
 986     case 0x1c:
 987         SD(sh)->EATA_revision = 'a';
 988         break;
 989     case 0x1e:
 990         SD(sh)->EATA_revision = 'b';
 991         break;
 992     case 0x22:
 993         SD(sh)->EATA_revision = 'c';
 994         break;
 995     case 0x24:
 996         SD(sh)->EATA_revision = 'z';            
 997     default:
 998         SD(sh)->EATA_revision = '?';
 999     }
1000 
1001     if(ntohl(gc->len) >= 0x22) {
1002         if (gc->is_PCI == TRUE)
1003             hd->bustype = IS_PCI;
1004         else if (gc->is_EISA == TRUE)
1005             hd->bustype = IS_EISA;
1006         else
1007             hd->bustype = IS_ISA;
1008     } else if(hd->broken_INQUIRY == FALSE) {
1009         if (buff[21] == '4')
1010             hd->bustype = IS_PCI;
1011         else if (buff[21] == '2')
1012             hd->bustype = IS_EISA;
1013         else
1014             hd->bustype = IS_ISA;
1015     } else 
1016         hd->bustype = bustype;
1017     
1018     if(ntohl(gc->len) >= 0x22) {
1019         sh->max_id = gc->MAX_ID + 1;
1020         sh->max_lun = gc->MAX_LUN + 1;
1021     } else {
1022         sh->max_id = 8;
1023         sh->max_lun = 8;
1024     }
1025 
1026     hd->channel = gc->MAX_CHAN;     
1027     sh->max_channel = gc->MAX_CHAN; 
1028     sh->base = (char *) base;
1029     sh->io_port = (u16) base;
1030     sh->n_io_port = 9;
1031     sh->irq = gc->IRQ;
1032     sh->dma_channel = dma_channel;
1033     
1034     /* FIXME:
1035      * SCSI midlevel code should support different HBA ids on every channel
1036      */
1037     sh->this_id = gc->scsi_id[3];
1038     sh->can_queue = ntohs(gc->queuesiz);
1039     
1040     if (gc->OCS_enabled == TRUE) {
1041         if(hd->bustype != IS_ISA)
1042             sh->cmd_per_lun = sh->can_queue/C_P_L_DIV; 
1043         else
1044             sh->cmd_per_lun = 8; /* We artificially limit this to conserve memory, 
1045                                   * which would be needed for ISA bounce buffers */
1046     } else 
1047         sh->cmd_per_lun = 1;
1048     
1049     /* FIXME:
1050      * SG should be allocated more dynamically 
1051      */
1052     /*
1053      * If we are using a ISA board, we can't use extended SG,
1054      * because we would need exessive amounts of memory for
1055      * bounce buffers.
1056      */
1057     if (gc->SG_64K == TRUE && ntohs(gc->SGsiz) == 64 && hd->bustype != IS_ISA){
1058         sh->sg_tablesize = SG_SIZE_BIG;
1059         sh->use_clustering = FALSE;
1060     } else {
1061         sh->sg_tablesize = ntohs(gc->SGsiz);
1062         sh->use_clustering = TRUE;
1063         if (sh->sg_tablesize > SG_SIZE || sh->sg_tablesize == 0) {
1064             sh->sg_tablesize = SG_SIZE;
1065             if (ntohs(gc->SGsiz) == 0)
1066                 printk("Warning: SG size had to be corrected.\n"
1067                        "This might be a PM2012 with a defective Firmware\n");
1068         }
1069     }
1070     
1071     if (gc->SECOND)
1072         hd->primary = FALSE;
1073     else
1074         hd->primary = TRUE;
1075     
1076     sh->wish_block = FALSE;        
1077     
1078     if (hd->bustype != IS_ISA) {
1079         sh->unchecked_isa_dma = FALSE;
1080     } else {
1081         sh->unchecked_isa_dma = TRUE;   /* We're doing ISA DMA */
1082     }
1083     
1084     for(x = 0; x <= 11; x++){            /* Initialize min. latency */
1085         hd->writes_lat[x][1] = 0xffffffff;
1086         hd->reads_lat[x][1] = 0xffffffff;
1087     }
1088 
1089     hd->next = NULL;    /* build a linked list of all HBAs */
1090     hd->prev = last_HBA;
1091     if(hd->prev != NULL)
1092         SD(hd->prev)->next = sh;
1093     last_HBA = sh;
1094     if (first_HBA == NULL)
1095         first_HBA = sh;
1096     registered_HBAs++;
1097     
1098     return (TRUE);
1099 }
1100 
1101 
1102 void find_EISA(struct get_conf *buf, Scsi_Host_Template * tpnt)
     /*  */
1103 {
1104     u32 base;
1105     int i;
1106     
1107 #if CHECKPAL
1108     u8 pal1, pal2, pal3;
1109 #endif
1110     
1111     for (i = 0; i < MAXEISA; i++) {
1112         if (EISAbases[i] == TRUE) { /* Still a possibility ?          */
1113             
1114             base = 0x1c88 + (i * 0x1000);
1115 #if CHECKPAL
1116             pal1 = inb((u16)base - 8);
1117             pal2 = inb((u16)base - 7);
1118             pal3 = inb((u16)base - 6);
1119             
1120             if (((pal1 == 0x12) && (pal2 == 0x14)) ||
1121                 ((pal1 == 0x38) && (pal2 == 0xa3) && (pal3 == 0x82)) ||
1122                 ((pal1 == 0x06) && (pal2 == 0x94) && (pal3 == 0x24))) {
1123                 DBG(DBG_PROBE, printk("EISA EATA id tags found: %x %x %x \n",
1124                                       (int)pal1, (int)pal2, (int)pal3));
1125 #endif
1126                 if (get_conf_PIO(base, buf) == TRUE) {
1127                     if (buf->IRQ) {  
1128                         DBG(DBG_EISA, printk("Registering EISA HBA\n"));
1129                         register_HBA(base, buf, tpnt, IS_EISA);
1130                     } else
1131                         printk("eata_dma: No valid IRQ. HBA removed from list\n");
1132                 } else {
1133                     if (check_blink_state(base)) 
1134                         printk("HBA is in BLINK state. Consult your HBAs "
1135                                " Manual to correct this.\n");
1136                 } 
1137                 /* Nothing found here so we take it from the list */
1138                 EISAbases[i] = 0;  
1139 #if CHECKPAL
1140             } 
1141 #endif
1142         }
1143     }
1144     return; 
1145 }
1146 
1147 void find_ISA(struct get_conf *buf, Scsi_Host_Template * tpnt)
     /*  */
1148 {
1149     int i;
1150     
1151     for (i = 0; i < MAXISA; i++) {  
1152         if (ISAbases[i]) {  
1153             if (get_conf_PIO(ISAbases[i],buf) == TRUE){
1154                 DBG(DBG_ISA, printk("Registering ISA HBA\n"));
1155                 register_HBA(ISAbases[i], buf, tpnt, IS_ISA);
1156             } else {
1157                 if (check_blink_state(ISAbases[i])) 
1158                     printk("HBA is in BLINK state. Consult your HBAs "
1159                            "Manual to correct this.\n");
1160             }
1161             ISAbases[i] = 0;
1162         }
1163     }
1164     return;
1165 }
1166 
1167 void find_PCI(struct get_conf *buf, Scsi_Host_Template * tpnt)
     /*  */
1168 {
1169 
1170 #ifndef CONFIG_PCI
1171     printk("eata_dma: kernel PCI support not enabled. Skipping scan for PCI HBAs.\n");
1172 #else
1173     
1174     u8 pci_bus, pci_device_fn;
1175     static s16 pci_index = 0;   /* Device index to PCI BIOS calls */
1176     u32 base = 0;
1177     u16 com_adr;
1178     u16 rev_device;
1179     u32 error, i, x;
1180     u8 pal1, pal2, pal3;
1181 
1182     if (pcibios_present()) {
1183         for (i = 0; i <= MAXPCI; ++i, ++pci_index) {
1184             if (pcibios_find_device(PCI_VENDOR_ID_DPT, PCI_DEVICE_ID_DPT, 
1185                                     pci_index, &pci_bus, &pci_device_fn))
1186                 break;
1187             DBG(DBG_PROBE && DBG_PCI, 
1188                 printk("eata_dma: HBA at bus %d, device %d,"
1189                        " function %d, index %d\n", (s32)pci_bus, 
1190                        (s32)((pci_device_fn & 0xf8) >> 3),
1191                        (s32)(pci_device_fn & 7), pci_index));
1192             
1193             if (!(error = pcibios_read_config_word(pci_bus, pci_device_fn, 
1194                                        PCI_CLASS_DEVICE, &rev_device))) {
1195                 if (rev_device == PCI_CLASS_STORAGE_SCSI) {
1196                     if (!(error = pcibios_read_config_word(pci_bus, 
1197                                                pci_device_fn, PCI_COMMAND, 
1198                                                (u16 *) & com_adr))) {
1199                         if (!((com_adr & PCI_COMMAND_IO) && 
1200                               (com_adr & PCI_COMMAND_MASTER))) {
1201                             printk("eata_dma: HBA has IO or BUSMASTER mode disabled\n");
1202                             continue;
1203                         }
1204                     } else
1205                         printk("eata_dma: error %x while reading "
1206                                "PCI_COMMAND\n", error);
1207                 } else
1208                     printk("eata_dma: DEVICECLASSID %x didn't match\n", 
1209                            rev_device);
1210             } else {
1211                 printk("eata_dma: error %x while reading PCI_CLASS_BASE\n", 
1212                        error);
1213                 continue;
1214             }
1215             
1216             if (!(error = pcibios_read_config_dword(pci_bus, pci_device_fn,
1217                                        PCI_BASE_ADDRESS_0, (int *) &base))){
1218                 
1219                 /* Check if the address is valid */
1220                 if (base & 0x01) {
1221                     base &= 0xfffffffe;
1222                     /* EISA tag there ? */
1223                     pal1 = inb(base);
1224                     pal2 = inb(base + 1);
1225                     pal3 = inb(base + 2);
1226                     if (((pal1 == 0x12) && (pal2 == 0x14)) ||
1227                         ((pal1 == 0x38) && (pal2 == 0xa3) && (pal3 == 0x82)) ||
1228                         ((pal1 == 0x06) && (pal2 == 0x94) && (pal3 == 0x24)))
1229                         base += 0x08;
1230                     else
1231                         base += 0x10;   /* Now, THIS is the real address */
1232 
1233                     if (base != 0x1f8) {
1234                         /* We didn't find it in the primary search */
1235                         if (get_conf_PIO(base, buf) == TRUE) {
1236 
1237                             /* OK. We made it till here, so we can go now  
1238                              * and register it. We  only have to check and 
1239                              * eventually remove it from the EISA and ISA list 
1240                              */
1241                             DBG(DBG_PCI, printk("Registering PCI HBA\n"));
1242                             register_HBA(base, buf, tpnt, IS_PCI);
1243                             
1244                             if (base < 0x1000) {
1245                                 for (x = 0; x < MAXISA; ++x) {
1246                                     if (ISAbases[x] == base) {
1247                                         ISAbases[x] = 0;
1248                                         break;
1249                                     }
1250                                 }
1251                             } else if ((base & 0x0fff) == 0x0c88) 
1252                                 EISAbases[(base >> 12) & 0x0f] = 0;
1253                             continue;  /* break; */
1254                         } else if (check_blink_state(base) == TRUE) {
1255                             printk("eata_dma: HBA is in BLINK state.\n"
1256                                    "Consult your HBAs Manual to correct this.\n");
1257                         }
1258                     }
1259                 }
1260             } else {
1261                 printk("eata_dma: error %x while reading "
1262                        "PCI_BASE_ADDRESS_0\n", error);
1263             }
1264         }
1265     } else {
1266         printk("eata_dma: No BIOS32 extensions present. This driver release "
1267                "still depends on it.\n"
1268                "          Skipping scan for PCI HBAs. \n");
1269     }
1270 #endif /* #ifndef CONFIG_PCI */
1271     return;
1272 }
1273 
1274 int eata_detect(Scsi_Host_Template * tpnt)
     /*  */
1275 {
1276     struct Scsi_Host *HBA_ptr;
1277     struct get_conf gc;
1278     int i;
1279     
1280     DBG((DBG_PROBE && DBG_DELAY) || DPT_DEBUG,
1281         printk("Using lots of delays to let you read the debugging output\n"));
1282 
1283     tpnt->proc_dir = &proc_scsi_eata_dma;
1284 
1285     status = scsi_init_malloc(512, GFP_ATOMIC | GFP_DMA);
1286     dma_scratch = scsi_init_malloc(512, GFP_ATOMIC | GFP_DMA);
1287 
1288     if(status == NULL || dma_scratch == NULL) {
1289         printk("eata_dma: can't allocate enough memory to probe for hosts !\n");
1290         return(0);
1291     }
1292 
1293     find_PCI(&gc, tpnt);
1294     
1295     find_EISA(&gc, tpnt);
1296     
1297     find_ISA(&gc, tpnt);
1298     
1299     for (i = 0; i <= MAXIRQ; i++) { /* Now that we know what we have, we     */
1300         if (reg_IRQ[i]){            /* exchange the interrupt handler which  */
1301             free_irq(i);            /* we used for probing with the real one */
1302             request_irq(i, (void *)(eata_int_handler), SA_INTERRUPT, "eata_dma");
1303         }
1304     }
1305     HBA_ptr = first_HBA;
1306     
1307     if (registered_HBAs != 0) {
1308         printk("EATA (Extended Attachment) driver version: %d.%d%s\n"
1309                "developed in co-operation with DPT\n"             
1310                "(c) 1993-95 Michael Neuffer, neuffer@goofy.zdv.uni-mainz.de\n",
1311                VER_MAJOR, VER_MINOR, VER_SUB);
1312         printk("Registered HBAs:");
1313         printk("\nHBA no. Boardtype: Revis: EATA: Bus: BaseIO: IRQ: DMA: Ch: "
1314                "ID: Pr: QS: SG: CPL:\n");
1315         for (i = 1; i <= registered_HBAs; i++) {
1316             printk("scsi%-2d: %.10s v%s 2.0%c  %s %#.4x   %2d",
1317                    HBA_ptr->host_no, SD(HBA_ptr)->name, SD(HBA_ptr)->revision,
1318                    SD(HBA_ptr)->EATA_revision, (SD(HBA_ptr)->bustype == 'P')? 
1319                    "PCI ":(SD(HBA_ptr)->bustype == 'E')?"EISA":"ISA ",
1320                    (u32) HBA_ptr->base, HBA_ptr->irq);
1321             if(HBA_ptr->dma_channel != 0xff)
1322                 printk("   %2x ", HBA_ptr->dma_channel);
1323             else
1324                 printk("  %s", "BMST");
1325             printk("  %d   %d   %c  %2d  %2d   %2d\n", SD(HBA_ptr)->channel, 
1326                    HBA_ptr->this_id, (SD(HBA_ptr)->primary == TRUE)?'Y':'N', 
1327                    HBA_ptr->can_queue, HBA_ptr->sg_tablesize, HBA_ptr->cmd_per_lun);
1328             HBA_ptr = SD(HBA_ptr)->next;
1329         }
1330     } else {
1331         scsi_init_free((void *)status, 512);
1332     }
1333 
1334     scsi_init_free((void *)dma_scratch, 512);
1335 
1336     DBG(DPT_DEBUG, DELAY(12));
1337 
1338     return(registered_HBAs);
1339 }
1340 
1341 #ifdef MODULE
1342 /* Eventually this will go into an include file, but this will be later */
1343 Scsi_Host_Template driver_template = EATA_DMA;
1344 #include "scsi_module.c"
1345 #endif
1346 
1347 /*
1348  * Overrides for Emacs so that we almost follow Linus's tabbing style.
1349  * Emacs will notice this stuff at the end of the file and automatically
1350  * adjust the settings for this buffer only.  This must remain at the end
1351  * of the file.
1352  * ---------------------------------------------------------------------------
1353  * Local variables:
1354  * c-indent-level: 4
1355  * c-brace-imaginary-offset: 0
1356  * c-brace-offset: -4
1357  * c-argdecl-indent: 4
1358  * c-label-offset: -4
1359  * c-continued-statement-offset: 4
1360  * c-continued-brace-offset: 0
1361  * tab-width: 8
1362  * End:
1363  */
/* */
root/drivers/scsi/eata_dma.c

DEFINITIONS
