This source file includes following definitions.
- lance_init
- lance_probe1
- lance_open
- lance_purge_tx_ring
- lance_init_ring
- lance_restart
- lance_start_xmit
- lance_interrupt
- lance_rx
- lance_close
- lance_get_stats
- set_multicast_list
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18 static const char *version = "lance.c:v1.08 4/10/95 dplatt@3do.com\n";
19
20 #include <linux/config.h>
21 #include <linux/kernel.h>
22 #include <linux/sched.h>
23 #include <linux/string.h>
24 #include <linux/ptrace.h>
25 #include <linux/errno.h>
26 #include <linux/ioport.h>
27 #include <linux/malloc.h>
28 #include <linux/interrupt.h>
29 #include <linux/pci.h>
30 #include <linux/bios32.h>
31 #include <asm/bitops.h>
32 #include <asm/io.h>
33 #include <asm/dma.h>
34
35 #include <linux/netdevice.h>
36 #include <linux/etherdevice.h>
37 #include <linux/skbuff.h>
38
39 static unsigned int lance_portlist[] = {0x300, 0x320, 0x340, 0x360, 0};
40 unsigned long lance_probe1(int ioaddr, unsigned long mem_start);
41
42 #ifdef HAVE_DEVLIST
43 struct netdev_entry lance_drv =
44 {"lance", lance_probe1, LANCE_TOTAL_SIZE, lance_portlist};
45 #endif
46
47 #ifdef LANCE_DEBUG
48 int lance_debug = LANCE_DEBUG;
49 #else
50 int lance_debug = 1;
51 #endif
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143 #ifndef LANCE_LOG_TX_BUFFERS
144 #define LANCE_LOG_TX_BUFFERS 4
145 #define LANCE_LOG_RX_BUFFERS 4
146 #endif
147
148 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
149 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
150 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
151
152 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
153 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
154 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
155
156 #define PKT_BUF_SZ 1544
157
158
159 #define LANCE_DATA 0x10
160 #define LANCE_ADDR 0x12
161 #define LANCE_RESET 0x14
162 #define LANCE_BUS_IF 0x16
163 #define LANCE_TOTAL_SIZE 0x18
164
165
166 struct lance_rx_head {
167 int base;
168 short buf_length;
169 short msg_length;
170 };
171
172 struct lance_tx_head {
173 int base;
174 short length;
175 short misc;
176 };
177
178
179 struct lance_init_block {
180 unsigned short mode;
181 unsigned char phys_addr[6];
182 unsigned filter[2];
183
184 unsigned rx_ring;
185 unsigned tx_ring;
186 };
187
188 struct lance_private {
189
190
191
192 struct lance_rx_head rx_ring[RX_RING_SIZE];
193 struct lance_tx_head tx_ring[TX_RING_SIZE];
194 struct lance_init_block init_block;
195 const char *name;
196
197 struct sk_buff* tx_skbuff[TX_RING_SIZE];
198 long rx_buffs;
199
200 char (*tx_bounce_buffs)[PKT_BUF_SZ];
201 int cur_rx, cur_tx;
202 int dirty_rx, dirty_tx;
203 int dma;
204 struct enet_statistics stats;
205 unsigned char chip_version;
206 char tx_full;
207 char lock;
208 };
209
210 #define LANCE_MUST_PAD 0x00000001
211 #define LANCE_ENABLE_AUTOSELECT 0x00000002
212 #define LANCE_MUST_REINIT_RING 0x00000004
213 #define LANCE_MUST_UNRESET 0x00000008
214 #define LANCE_HAS_MISSED_FRAME 0x00000010
215
216
217
218
219 static struct lance_chip_type {
220 int id_number;
221 const char *name;
222 int flags;
223 } chip_table[] = {
224 {0x0000, "LANCE 7990",
225 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
226 {0x0003, "PCnet/ISA 79C960",
227 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
228 LANCE_HAS_MISSED_FRAME},
229 {0x2260, "PCnet/ISA+ 79C961",
230 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
231 LANCE_HAS_MISSED_FRAME},
232 {0x2420, "PCnet/PCI 79C970",
233 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
234 LANCE_HAS_MISSED_FRAME},
235
236
237 {0x2430, "PCnet32",
238 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
239 LANCE_HAS_MISSED_FRAME},
240 {0x0, "PCnet (unknown)",
241 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
242 LANCE_HAS_MISSED_FRAME},
243 };
244
245 enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, LANCE_UNKNOWN=5};
246
247
248 static unsigned char pci_irq_line = 0;
249
250
251
252 static unsigned char lance_need_isa_bounce_buffers = 1;
253
254 static int lance_open(struct device *dev);
255 static void lance_init_ring(struct device *dev);
256 static int lance_start_xmit(struct sk_buff *skb, struct device *dev);
257 static int lance_rx(struct device *dev);
258 static void lance_interrupt(int irq, struct pt_regs *regs);
259 static int lance_close(struct device *dev);
260 static struct enet_statistics *lance_get_stats(struct device *dev);
261 #ifdef HAVE_MULTICAST
262 static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
263 #endif
264
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270
271
272
273 unsigned long lance_init(unsigned long mem_start, unsigned long mem_end)
274 {
275 int *port;
276
277 if (mem_end <= 16*1024*1024)
278 lance_need_isa_bounce_buffers = 0;
279
280 #if defined(CONFIG_PCI)
281 if (pcibios_present()) {
282 int pci_index;
283 printk("lance.c: PCI bios is present, checking for devices...\n");
284 for (pci_index = 0; pci_index < 8; pci_index++) {
285 unsigned char pci_bus, pci_device_fn;
286 unsigned int pci_ioaddr;
287 unsigned short pci_command;
288
289 if (pcibios_find_device (PCI_VENDOR_ID_AMD,
290 PCI_DEVICE_ID_AMD_LANCE, pci_index,
291 &pci_bus, &pci_device_fn) != 0)
292 break;
293 pcibios_read_config_byte(pci_bus, pci_device_fn,
294 PCI_INTERRUPT_LINE, &pci_irq_line);
295 pcibios_read_config_dword(pci_bus, pci_device_fn,
296 PCI_BASE_ADDRESS_0, &pci_ioaddr);
297
298 pci_ioaddr &= ~3;
299
300
301
302
303 pcibios_read_config_word(pci_bus, pci_device_fn,
304 PCI_COMMAND, &pci_command);
305 if ( ! (pci_command & PCI_COMMAND_MASTER)) {
306 printk("PCI Master Bit has not been set. Setting...\n");
307 pci_command |= PCI_COMMAND_MASTER;
308 pcibios_write_config_word(pci_bus, pci_device_fn,
309 PCI_COMMAND, pci_command);
310 }
311 printk("Found PCnet/PCI at %#x, irq %d (mem_start is %#lx).\n",
312 pci_ioaddr, pci_irq_line, mem_start);
313 mem_start = lance_probe1(pci_ioaddr, mem_start);
314 pci_irq_line = 0;
315 }
316 }
317 #endif
318
319 for (port = lance_portlist; *port; port++) {
320 int ioaddr = *port;
321
322 if ( check_region(ioaddr, LANCE_TOTAL_SIZE) == 0) {
323
324
325 char offset15, offset14 = inb(ioaddr + 14);
326
327 if ((offset14 == 0x52 || offset14 == 0x57) &&
328 ((offset15 = inb(ioaddr + 15)) == 0x57 || offset15 == 0x44))
329 mem_start = lance_probe1(ioaddr, mem_start);
330 }
331 }
332
333 return mem_start;
334 }
335
336 unsigned long lance_probe1(int ioaddr, unsigned long mem_start)
337 {
338 struct device *dev;
339 struct lance_private *lp;
340 short dma_channels;
341 int i, reset_val, lance_version;
342 const char *chipname;
343
344 unsigned char hpJ2405A = 0;
345 int hp_builtin = 0;
346 static int did_version = 0;
347
348
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351
352
353 if ( *((unsigned short *) 0x000f0102) == 0x5048) {
354 static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
355 int hp_port = ( *((unsigned char *) 0x000f00f1) & 1) ? 0x499 : 0x99;
356
357 if ((inb(hp_port) & 0xc0) == 0x80
358 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
359 hp_builtin = hp_port;
360 }
361
362 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
363 && inb(ioaddr+2) == 0x09);
364
365
366 reset_val = inw(ioaddr+LANCE_RESET);
367
368
369
370 if (!hpJ2405A)
371 outw(reset_val, ioaddr+LANCE_RESET);
372
373 outw(0x0000, ioaddr+LANCE_ADDR);
374 if (inw(ioaddr+LANCE_DATA) != 0x0004)
375 return mem_start;
376
377
378 outw(88, ioaddr+LANCE_ADDR);
379 if (inw(ioaddr+LANCE_ADDR) != 88) {
380 lance_version = 0;
381 } else {
382 int chip_version = inw(ioaddr+LANCE_DATA);
383 outw(89, ioaddr+LANCE_ADDR);
384 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
385 if (lance_debug > 2)
386 printk(" LANCE chip version is %#x.\n", chip_version);
387 if ((chip_version & 0xfff) != 0x003)
388 return mem_start;
389 chip_version = (chip_version >> 12) & 0xffff;
390 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
391 if (chip_table[lance_version].id_number == chip_version)
392 break;
393 }
394 }
395
396 dev = init_etherdev(0, 7
397 + ((sizeof(struct lance_private) + 7) & ~7)
398 + PKT_BUF_SZ*RX_RING_SIZE
399 + (lance_need_isa_bounce_buffers
400 ? PKT_BUF_SZ*TX_RING_SIZE
401 : 0),
402 &mem_start);
403
404 chipname = chip_table[lance_version].name;
405 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
406
407
408
409 for (i = 0; i < 6; i++)
410 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
411
412 dev->base_addr = ioaddr;
413 request_region(ioaddr, LANCE_TOTAL_SIZE, chip_table[lance_version].name);
414
415
416 dev->priv = (void *)(((int)dev->priv + 7) & ~7);
417 lp = (struct lance_private *)dev->priv;
418 lp->name = chipname;
419 lp->rx_buffs = (long)lp + ((sizeof(struct lance_private) + 7) & ~7);
420 lp->tx_bounce_buffs = (char (*)[PKT_BUF_SZ])
421 (lp->rx_buffs + PKT_BUF_SZ*RX_RING_SIZE);
422
423 lp->chip_version = lance_version;
424
425 lp->init_block.mode = 0x0003;
426 for (i = 0; i < 6; i++)
427 lp->init_block.phys_addr[i] = dev->dev_addr[i];
428 lp->init_block.filter[0] = 0x00000000;
429 lp->init_block.filter[1] = 0x00000000;
430 lp->init_block.rx_ring = (int)lp->rx_ring | RX_RING_LEN_BITS;
431 lp->init_block.tx_ring = (int)lp->tx_ring | TX_RING_LEN_BITS;
432
433 outw(0x0001, ioaddr+LANCE_ADDR);
434 inw(ioaddr+LANCE_ADDR);
435 outw((short) (int) &lp->init_block, ioaddr+LANCE_DATA);
436 outw(0x0002, ioaddr+LANCE_ADDR);
437 inw(ioaddr+LANCE_ADDR);
438 outw(((int)&lp->init_block) >> 16, ioaddr+LANCE_DATA);
439 outw(0x0000, ioaddr+LANCE_ADDR);
440 inw(ioaddr+LANCE_ADDR);
441
442 if (pci_irq_line) {
443 dev->dma = 4;
444 dev->irq = pci_irq_line;
445 } else if (hp_builtin) {
446 static const char dma_tbl[4] = {3, 5, 6, 0};
447 static const char irq_tbl[4] = {3, 4, 5, 9};
448 unsigned char port_val = inb(hp_builtin);
449 dev->dma = dma_tbl[(port_val >> 4) & 3];
450 dev->irq = irq_tbl[(port_val >> 2) & 3];
451 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
452 } else if (hpJ2405A) {
453 static const char dma_tbl[4] = {3, 5, 6, 7};
454 static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
455 short reset_val = inw(ioaddr+LANCE_RESET);
456 dev->dma = dma_tbl[(reset_val >> 2) & 3];
457 dev->irq = irq_tbl[(reset_val >> 4) & 7];
458 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
459 } else if (lance_version == PCNET_ISAP) {
460 short bus_info;
461 outw(8, ioaddr+LANCE_ADDR);
462 bus_info = inw(ioaddr+LANCE_BUS_IF);
463 dev->dma = bus_info & 0x07;
464 dev->irq = (bus_info >> 4) & 0x0F;
465 } else {
466
467 if (dev->mem_start & 0x07)
468 dev->dma = dev->mem_start & 0x07;
469 }
470
471 if (dev->dma == 0) {
472
473
474 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
475 (inb(DMA2_STAT_REG) & 0xf0);
476 }
477 if (dev->irq >= 2)
478 printk(" assigned IRQ %d", dev->irq);
479 else {
480
481
482
483 autoirq_setup(0);
484
485
486 outw(0x0041, ioaddr+LANCE_DATA);
487
488 dev->irq = autoirq_report(1);
489 if (dev->irq)
490 printk(", probed IRQ %d", dev->irq);
491 else {
492 printk(", failed to detect IRQ line.\n");
493 return mem_start;
494 }
495
496
497
498 if (inw(ioaddr+LANCE_DATA) & 0x0100)
499 dev->dma = 4;
500 }
501
502 if (dev->dma == 4) {
503 printk(", no DMA needed.\n");
504 } else if (dev->dma) {
505 if (request_dma(dev->dma, chipname)) {
506 printk("DMA %d allocation failed.\n", dev->dma);
507 return mem_start;
508 } else
509 printk(", assigned DMA %d.\n", dev->dma);
510 } else {
511 for (i = 0; i < 4; i++) {
512 static const char dmas[] = { 5, 6, 7, 3 };
513 int dma = dmas[i];
514 int boguscnt;
515
516
517
518 if (test_bit(dma, &dma_channels))
519 continue;
520 outw(0x7f04, ioaddr+LANCE_DATA);
521 if (request_dma(dma, chipname))
522 continue;
523 set_dma_mode(dma, DMA_MODE_CASCADE);
524 enable_dma(dma);
525
526
527 outw(0x0001, ioaddr+LANCE_DATA);
528 for (boguscnt = 100; boguscnt > 0; --boguscnt)
529 if (inw(ioaddr+LANCE_DATA) & 0x0900)
530 break;
531 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
532 dev->dma = dma;
533 printk(", DMA %d.\n", dev->dma);
534 break;
535 } else {
536 disable_dma(dma);
537 free_dma(dma);
538 }
539 }
540 if (i == 4) {
541 printk("DMA detection failed.\n");
542 return mem_start;
543 }
544 }
545
546 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
547
548
549 outw(0x0002, ioaddr+LANCE_ADDR);
550 outw(0x0002, ioaddr+LANCE_BUS_IF);
551 }
552
553 if (lance_debug > 0 && did_version++ == 0)
554 printk(version);
555
556
557 dev->open = &lance_open;
558 dev->hard_start_xmit = &lance_start_xmit;
559 dev->stop = &lance_close;
560 dev->get_stats = &lance_get_stats;
561 dev->set_multicast_list = &set_multicast_list;
562
563 return mem_start;
564 }
565
566
567 static int
568 lance_open(struct device *dev)
569 {
570 struct lance_private *lp = (struct lance_private *)dev->priv;
571 int ioaddr = dev->base_addr;
572 int i;
573
574 if (dev->irq == 0 ||
575 request_irq(dev->irq, &lance_interrupt, 0, lp->name)) {
576 return -EAGAIN;
577 }
578
579
580
581
582 irq2dev_map[dev->irq] = dev;
583
584
585 inw(ioaddr+LANCE_RESET);
586
587
588 if (dev->dma != 4) {
589 enable_dma(dev->dma);
590 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
591 }
592
593
594 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
595 outw(0, ioaddr+LANCE_RESET);
596
597 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
598
599 outw(0x0002, ioaddr+LANCE_ADDR);
600 outw(0x0002, ioaddr+LANCE_BUS_IF);
601 }
602
603 if (lance_debug > 1)
604 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
605 dev->name, dev->irq, dev->dma, (int) lp->tx_ring, (int) lp->rx_ring,
606 (int) &lp->init_block);
607
608 lance_init_ring(dev);
609
610 outw(0x0001, ioaddr+LANCE_ADDR);
611 outw((short) (int) &lp->init_block, ioaddr+LANCE_DATA);
612 outw(0x0002, ioaddr+LANCE_ADDR);
613 outw(((int)&lp->init_block) >> 16, ioaddr+LANCE_DATA);
614
615 outw(0x0004, ioaddr+LANCE_ADDR);
616 outw(0x0915, ioaddr+LANCE_DATA);
617
618 outw(0x0000, ioaddr+LANCE_ADDR);
619 outw(0x0001, ioaddr+LANCE_DATA);
620
621 dev->tbusy = 0;
622 dev->interrupt = 0;
623 dev->start = 1;
624 i = 0;
625 while (i++ < 100)
626 if (inw(ioaddr+LANCE_DATA) & 0x0100)
627 break;
628
629
630
631
632 outw(0x0042, ioaddr+LANCE_DATA);
633
634 if (lance_debug > 2)
635 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
636 dev->name, i, (int) &lp->init_block, inw(ioaddr+LANCE_DATA));
637
638 return 0;
639 }
640
641
642
643
644
645
646
647
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649
650
651
652
653 static void
654 lance_purge_tx_ring(struct device *dev)
655 {
656 struct lance_private *lp = (struct lance_private *)dev->priv;
657 int i;
658
659 for (i = 0; i < TX_RING_SIZE; i++) {
660 if (lp->tx_skbuff[i]) {
661 dev_kfree_skb(lp->tx_skbuff[i],FREE_WRITE);
662 lp->tx_skbuff[i] = NULL;
663 }
664 }
665 }
666
667
668
669 static void
670 lance_init_ring(struct device *dev)
671 {
672 struct lance_private *lp = (struct lance_private *)dev->priv;
673 int i;
674
675 lp->lock = 0, lp->tx_full = 0;
676 lp->cur_rx = lp->cur_tx = 0;
677 lp->dirty_rx = lp->dirty_tx = 0;
678
679 for (i = 0; i < RX_RING_SIZE; i++) {
680 lp->rx_ring[i].base = (lp->rx_buffs + i*PKT_BUF_SZ) | 0x80000000;
681 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
682 }
683
684
685 for (i = 0; i < TX_RING_SIZE; i++) {
686 lp->tx_ring[i].base = 0;
687 }
688
689 lp->init_block.mode = 0x0000;
690 for (i = 0; i < 6; i++)
691 lp->init_block.phys_addr[i] = dev->dev_addr[i];
692 lp->init_block.filter[0] = 0x00000000;
693 lp->init_block.filter[1] = 0x00000000;
694 lp->init_block.rx_ring = (int)lp->rx_ring | RX_RING_LEN_BITS;
695 lp->init_block.tx_ring = (int)lp->tx_ring | TX_RING_LEN_BITS;
696 }
697
698 static void
699 lance_restart(struct device *dev, unsigned int csr0_bits, int must_reinit)
700 {
701 struct lance_private *lp = (struct lance_private *)dev->priv;
702
703 if (must_reinit ||
704 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
705 lance_purge_tx_ring(dev);
706 lance_init_ring(dev);
707 }
708 outw(0x0000, dev->base_addr + LANCE_ADDR);
709 outw(csr0_bits, dev->base_addr + LANCE_DATA);
710 }
711
712 static int
713 lance_start_xmit(struct sk_buff *skb, struct device *dev)
714 {
715 struct lance_private *lp = (struct lance_private *)dev->priv;
716 int ioaddr = dev->base_addr;
717 int entry;
718 unsigned long flags;
719
720
721 if (dev->tbusy) {
722 int tickssofar = jiffies - dev->trans_start;
723 if (tickssofar < 20)
724 return 1;
725 outw(0, ioaddr+LANCE_ADDR);
726 printk("%s: transmit timed out, status %4.4x, resetting.\n",
727 dev->name, inw(ioaddr+LANCE_DATA));
728 outw(0x0004, ioaddr+LANCE_DATA);
729 lp->stats.tx_errors++;
730 #ifndef final_version
731 {
732 int i;
733 printk(" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
734 lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
735 lp->cur_rx);
736 for (i = 0 ; i < RX_RING_SIZE; i++)
737 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
738 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
739 lp->rx_ring[i].msg_length);
740 for (i = 0 ; i < TX_RING_SIZE; i++)
741 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
742 lp->tx_ring[i].base, -lp->tx_ring[i].length,
743 lp->tx_ring[i].misc);
744 printk("\n");
745 }
746 #endif
747 lance_restart(dev, 0x0043, 1);
748
749 dev->tbusy=0;
750 dev->trans_start = jiffies;
751
752 return 0;
753 }
754
755 if (skb == NULL) {
756 dev_tint(dev);
757 return 0;
758 }
759
760 if (skb->len <= 0)
761 return 0;
762
763 if (lance_debug > 3) {
764 outw(0x0000, ioaddr+LANCE_ADDR);
765 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
766 inw(ioaddr+LANCE_DATA));
767 outw(0x0000, ioaddr+LANCE_DATA);
768 }
769
770
771
772 if (set_bit(0, (void*)&dev->tbusy) != 0) {
773 printk("%s: Transmitter access conflict.\n", dev->name);
774 return 1;
775 }
776
777 if (set_bit(0, (void*)&lp->lock) != 0) {
778 if (lance_debug > 0)
779 printk("%s: tx queue lock!.\n", dev->name);
780
781 return 1;
782 }
783
784
785
786
787 entry = lp->cur_tx & TX_RING_MOD_MASK;
788
789
790
791
792
793 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
794 lp->tx_ring[entry].length =
795 -(ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN);
796 } else
797 lp->tx_ring[entry].length = -skb->len;
798
799 lp->tx_ring[entry].misc = 0x0000;
800
801
802
803 if ((int)(skb->data) + skb->len > 0x01000000) {
804 if (lance_debug > 5)
805 printk("%s: bouncing a high-memory packet (%#x).\n",
806 dev->name, (int)(skb->data));
807 memcpy(&lp->tx_bounce_buffs[entry], skb->data, skb->len);
808 lp->tx_ring[entry].base =
809 (int)(lp->tx_bounce_buffs + entry) | 0x83000000;
810 dev_kfree_skb (skb, FREE_WRITE);
811 } else {
812 lp->tx_skbuff[entry] = skb;
813 lp->tx_ring[entry].base = (int)(skb->data) | 0x83000000;
814 }
815 lp->cur_tx++;
816
817
818 outw(0x0000, ioaddr+LANCE_ADDR);
819 outw(0x0048, ioaddr+LANCE_DATA);
820
821 dev->trans_start = jiffies;
822
823 save_flags(flags);
824 cli();
825 lp->lock = 0;
826 if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base == 0)
827 dev->tbusy=0;
828 else
829 lp->tx_full = 1;
830 restore_flags(flags);
831
832 return 0;
833 }
834
835
836 static void
837 lance_interrupt(int irq, struct pt_regs * regs)
838 {
839 struct device *dev = (struct device *)(irq2dev_map[irq]);
840 struct lance_private *lp;
841 int csr0, ioaddr, boguscnt=10;
842 int must_restart;
843
844 if (dev == NULL) {
845 printk ("lance_interrupt(): irq %d for unknown device.\n", irq);
846 return;
847 }
848
849 ioaddr = dev->base_addr;
850 lp = (struct lance_private *)dev->priv;
851 if (dev->interrupt)
852 printk("%s: Re-entering the interrupt handler.\n", dev->name);
853
854 dev->interrupt = 1;
855
856 outw(0x00, dev->base_addr + LANCE_ADDR);
857 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
858 && --boguscnt >= 0) {
859
860 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
861
862 must_restart = 0;
863
864 if (lance_debug > 5)
865 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
866 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
867
868 if (csr0 & 0x0400)
869 lance_rx(dev);
870
871 if (csr0 & 0x0200) {
872 int dirty_tx = lp->dirty_tx;
873
874 while (dirty_tx < lp->cur_tx) {
875 int entry = dirty_tx & TX_RING_MOD_MASK;
876 int status = lp->tx_ring[entry].base;
877
878 if (status < 0)
879 break;
880
881 lp->tx_ring[entry].base = 0;
882
883 if (status & 0x40000000) {
884
885 int err_status = lp->tx_ring[entry].misc;
886 lp->stats.tx_errors++;
887 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
888 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
889 if (err_status & 0x1000) lp->stats.tx_window_errors++;
890 if (err_status & 0x4000) {
891
892 lp->stats.tx_fifo_errors++;
893
894 printk("%s: Tx FIFO error! Status %4.4x.\n",
895 dev->name, csr0);
896
897 must_restart = 1;
898 }
899 } else {
900 if (status & 0x18000000)
901 lp->stats.collisions++;
902 lp->stats.tx_packets++;
903 }
904
905
906
907 if (lp->tx_skbuff[entry]) {
908 dev_kfree_skb(lp->tx_skbuff[entry],FREE_WRITE);
909 lp->tx_skbuff[entry] = 0;
910 }
911 dirty_tx++;
912 }
913
914 #ifndef final_version
915 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
916 printk("out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
917 dirty_tx, lp->cur_tx, lp->tx_full);
918 dirty_tx += TX_RING_SIZE;
919 }
920 #endif
921
922 if (lp->tx_full && dev->tbusy
923 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
924
925 lp->tx_full = 0;
926 dev->tbusy = 0;
927 mark_bh(NET_BH);
928 }
929
930 lp->dirty_tx = dirty_tx;
931 }
932
933
934 if (csr0 & 0x4000) lp->stats.tx_errors++;
935 if (csr0 & 0x1000) lp->stats.rx_errors++;
936 if (csr0 & 0x0800) {
937 printk("%s: Bus master arbitration failure, status %4.4x.\n",
938 dev->name, csr0);
939
940 must_restart = 1;
941 }
942
943 if (must_restart) {
944
945 outw(0x0000, dev->base_addr + LANCE_ADDR);
946 outw(0x0004, dev->base_addr + LANCE_DATA);
947 lance_restart(dev, 0x0002, 0);
948 }
949 }
950
951
952 outw(0x0000, dev->base_addr + LANCE_ADDR);
953 outw(0x7940, dev->base_addr + LANCE_DATA);
954
955 if (lance_debug > 4)
956 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
957 dev->name, inw(ioaddr + LANCE_ADDR),
958 inw(dev->base_addr + LANCE_DATA));
959
960 dev->interrupt = 0;
961 return;
962 }
963
964 static int
965 lance_rx(struct device *dev)
966 {
967 struct lance_private *lp = (struct lance_private *)dev->priv;
968 int entry = lp->cur_rx & RX_RING_MOD_MASK;
969 int i;
970
971
972 while (lp->rx_ring[entry].base >= 0) {
973 int status = lp->rx_ring[entry].base >> 24;
974
975 if (status != 0x03) {
976
977
978
979
980 if (status & 0x01)
981 lp->stats.rx_errors++;
982 if (status & 0x20) lp->stats.rx_frame_errors++;
983 if (status & 0x10) lp->stats.rx_over_errors++;
984 if (status & 0x08) lp->stats.rx_crc_errors++;
985 if (status & 0x04) lp->stats.rx_fifo_errors++;
986 lp->rx_ring[entry].base &= 0x03ffffff;
987 } else {
988
989 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
990 struct sk_buff *skb;
991
992 skb = dev_alloc_skb(pkt_len+2);
993 if (skb == NULL) {
994 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
995 for (i=0; i < RX_RING_SIZE; i++)
996 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
997 break;
998
999 if (i > RX_RING_SIZE -2) {
1000 lp->stats.rx_dropped++;
1001 lp->rx_ring[entry].base |= 0x80000000;
1002 lp->cur_rx++;
1003 }
1004 break;
1005 }
1006 skb->dev = dev;
1007 skb_reserve(skb,2);
1008 skb_put(skb,pkt_len);
1009 eth_copy_and_sum(skb,
1010 (unsigned char *)(lp->rx_ring[entry].base & 0x00ffffff),
1011 pkt_len,0);
1012 skb->protocol=eth_type_trans(skb,dev);
1013 netif_rx(skb);
1014 lp->stats.rx_packets++;
1015 }
1016
1017
1018
1019 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1020 lp->rx_ring[entry].base |= 0x80000000;
1021 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1022 }
1023
1024
1025
1026
1027 return 0;
1028 }
1029
1030 static int
1031 lance_close(struct device *dev)
1032 {
1033 int ioaddr = dev->base_addr;
1034 struct lance_private *lp = (struct lance_private *)dev->priv;
1035
1036 dev->start = 0;
1037 dev->tbusy = 1;
1038
1039 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1040 outw(112, ioaddr+LANCE_ADDR);
1041 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1042 }
1043 outw(0, ioaddr+LANCE_ADDR);
1044
1045 if (lance_debug > 1)
1046 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1047 dev->name, inw(ioaddr+LANCE_DATA));
1048
1049
1050
1051 outw(0x0004, ioaddr+LANCE_DATA);
1052
1053 if (dev->dma != 4)
1054 disable_dma(dev->dma);
1055
1056 free_irq(dev->irq);
1057
1058 irq2dev_map[dev->irq] = 0;
1059
1060 return 0;
1061 }
1062
1063 static struct enet_statistics *
1064 lance_get_stats(struct device *dev)
1065 {
1066 struct lance_private *lp = (struct lance_private *)dev->priv;
1067 short ioaddr = dev->base_addr;
1068 short saved_addr;
1069 unsigned long flags;
1070
1071 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1072 save_flags(flags);
1073 cli();
1074 saved_addr = inw(ioaddr+LANCE_ADDR);
1075 outw(112, ioaddr+LANCE_ADDR);
1076 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1077 outw(saved_addr, ioaddr+LANCE_ADDR);
1078 restore_flags(flags);
1079 }
1080
1081 return &lp->stats;
1082 }
1083
1084
1085
1086
1087
1088
1089
1090 static void
1091 set_multicast_list(struct device *dev, int num_addrs, void *addrs)
1092 {
1093 short ioaddr = dev->base_addr;
1094
1095 outw(0, ioaddr+LANCE_ADDR);
1096 outw(0x0004, ioaddr+LANCE_DATA);
1097
1098 if (num_addrs >= 0) {
1099 short multicast_table[4];
1100 int i;
1101
1102 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1103 for (i = 0; i < 4; i++) {
1104 outw(8 + i, ioaddr+LANCE_ADDR);
1105 outw(multicast_table[i], ioaddr+LANCE_DATA);
1106 }
1107 outw(15, ioaddr+LANCE_ADDR);
1108 outw(0x0000, ioaddr+LANCE_DATA);
1109 } else {
1110
1111 printk("%s: Promiscuous mode enabled.\n", dev->name);
1112 outw(15, ioaddr+LANCE_ADDR);
1113 outw(0x8000, ioaddr+LANCE_DATA);
1114 }
1115
1116 lance_restart(dev, 0x0142, 0);
1117
1118 }
1119
1120
1121
1122
1123
1124
1125
1126
1127