1 /* 2 * linux/drivers/block/triton.c Version 1.01 Aug 28, 1995 3 * 4 * Copyright (c) 1995 Mark Lord 5 * May be copied or modified under the terms of the GNU General Public License 6 */ 7 8 /* 9 * This module provides support for the Bus Master IDE DMA function 10 * of the Intel PCI Triton chipset (82371FB). 11 * 12 * DMA is currently supported only for hard disk drives (not cdroms). 13 * 14 * Support for cdroms will likely be added at a later date, 15 * after broader experience has been obtained with hard disks. 16 * 17 * Up to four drives may be enabled for DMA, and the Triton chipset will 18 * (hopefully) arbitrate the PCI bus among them. Note that the 82371FB chip 19 * provides a single "line buffer" for the BM IDE function, so performance of 20 * multiple (two) drives doing DMA simultaneously will suffer somewhat, 21 * as they contest for that resource bottleneck. This is handled transparently 22 * inside the 82371FB chip. 23 * 24 * By default, DMA support is prepared for use, but is currently enabled only 25 * for drives which support multi-word DMA mode2 (mword2), or which are 26 * recognized as "good" (see table below). Drives with only mode0 or mode1 27 * (single or multi) DMA should also work with this chipset/driver (eg. MC2112A) 28 * but are not enabled by default. Use "hdparm -i" to view modes supported 29 * by a given drive. 30 * 31 * The hdparm-2.4 (or later) utility can be used for manually enabling/disabling 32 * DMA support, but must be (re-)compiled against this kernel version or later. 33 * 34 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting. 35 * If problems arise, ide.c will disable DMA operation after a few retries. 36 * This error recovery mechanism works and has been extremely well exercised. 37 * 38 * IDE drives, depending on their vintage, may support several different modes 39 * of DMA operation. The boot-time modes are indicated with a "*" in 40 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of 41 * the "hdparm -X" feature. There is seldom a need to do this, as drives 42 * normally power-up with their "best" PIO/DMA modes enabled. 43 * 44 * Testing was done with an ASUS P55TP4XE/100 system and the following drives: 45 * 46 * Quantum Fireball 1080A (1Gig w/83kB buffer), DMA mode2, PIO mode4. 47 * - DMA mode2 works well (7.4MB/sec), despite the tiny on-drive buffer. 48 * - This drive also does PIO mode4, at about the same speed as DMA mode2. 49 * An awesome drive for the price! 50 * 51 * Fujitsu M1606TA (1Gig w/256kB buffer), DMA mode2, PIO mode4. 52 * - DMA mode2 gives horrible performance (1.6MB/sec), despite the good 53 * size of the on-drive buffer and a boasted 10ms average access time. 54 * - PIO mode4 was better, but peaked at a mere 4.5MB/sec. 55 * 56 * Micropolis MC2112A (1Gig w/508kB buffer), drive pre-dates EIDE and ATA2. 57 * - DMA works fine (2.2MB/sec), probably due to the large on-drive buffer. 58 * - This older drive can also be tweaked for fastPIO (3.7MB/sec) by using 59 * maximum clock settings (5,4) and setting all flags except prefetch. 60 * 61 * Western Digital AC31000H (1Gig w/128kB buffer), DMA mode1, PIO mode3. 62 * - DMA does not work reliably. The drive appears to be somewhat tardy 63 * in deasserting DMARQ at the end of a sector. This is evident in 64 * the observation that WRITEs work most of the time, depending on 65 * cache-buffer occupancy, but multi-sector reads seldom work. 66 * 67 * Drives like the AC31000H could likely be made to work if all DMA were done 68 * one sector at a time, but that would likely negate any advantage over PIO. 69 * 70 * If you have any drive models to add, email your results to: mlord@bnr.ca 71 * Keep an eye on /var/adm/messages for "DMA disabled" messages. 72 */ 73 #define _TRITON_C 74 #include <linux/config.h> 75 #ifndef CONFIG_BLK_DEV_TRITON 76 #define CONFIG_BLK_DEV_TRITON y 77 #endif 78 #include <linux/types.h> 79 #include <linux/kernel.h> 80 #include <linux/timer.h> 81 #include <linux/mm.h> 82 #include <linux/ioport.h> 83 #include <linux/interrupt.h> 84 #include <linux/blkdev.h> 85 #include <linux/hdreg.h> 86 #include <linux/pci.h> 87 #include <linux/bios32.h> 88 #include <asm/io.h> 89 90 #include "ide.h" 91 92 /* 93 * good_dma_drives() lists the model names (from "hdparm -i") 94 * of drives which do not support mword2 DMA but which are 95 * known to work fine with this interface under Linux. 96 */ 97 const char *good_dma_drives[] = {"Micropolis 2112A"}; 98 99 /* 100 * Our Physical Region Descriptor (PRD) table should be large enough 101 * to handle the biggest I/O request we are likely to see. Since requests 102 * can have no more than 256 sectors, and since the typical blocksize is 103 * two sectors, we can get by with a limit of 128 entries here for the 104 * usual worst case. Most requests seem to include some contiguous blocks, 105 * further reducing the number of table entries required. 106 * 107 * Note that the driver reverts to PIO mode for individual requests that exceed 108 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling 109 * 100% of all crazy scenarios here is not necessary. 110 */ 111 #define PRD_ENTRIES 128 /* max memory area count per DMA */ 112 113 /* 114 * dma_intr() is the handler for disk read/write DMA interrupts 115 */ 116 static void dma_intr (ide_drive_t *drive) /* */ 117 { 118 byte stat, dma_stat; 119 int i; 120 struct request *rq = HWGROUP(drive)->rq; 121 unsigned short dma_base = HWIF(drive)->dma_base; 122 123 dma_stat = inb(dma_base+2); /* get DMA status */ 124 outb(inb(dma_base)&~1, dma_base); /* stop DMA operation */ 125 stat = GET_STAT(); /* get drive status */ 126 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) { 127 if ((dma_stat & 7) == 4) { /* verify good DMA status */ 128 rq = HWGROUP(drive)->rq; 129 for (i = rq->nr_sectors; i > 0;) { 130 i -= rq->current_nr_sectors; 131 ide_end_request(1, HWGROUP(drive)); 132 } 133 IDE_DO_REQUEST; 134 return; 135 } 136 printk("%s: bad DMA status: 0x%02x\n", drive->name, dma_stat); 137 } 138 sti(); 139 if (!ide_error(drive, "dma_intr", stat)) 140 IDE_DO_REQUEST; 141 } 142 143 /* 144 * build_dmatable() prepares a dma request. 145 * Returns 0 if all went okay, returns 1 otherwise. 146 */ 147 static int build_dmatable (ide_drive_t *drive) /* */ 148 { 149 struct request *rq = HWGROUP(drive)->rq; 150 struct buffer_head *bh = rq->bh; 151 unsigned long size, addr, *table = HWIF(drive)->dmatable; 152 unsigned int count = 0; 153 154 do { 155 /* 156 * Determine addr and size of next buffer area. We assume that 157 * individual virtual buffers are always composed linearly in 158 * physical memory. For example, we assume that any 8kB buffer 159 * is always composed of two adjacent physical 4kB pages rather 160 * than two possibly non-adjacent physical 4kB pages. 161 */ 162 if (bh == NULL) { /* paging requests have (rq->bh == NULL) */ 163 addr = virt_to_bus (rq->buffer); 164 size = rq->nr_sectors << 9; 165 } else { 166 /* group sequential buffers into one large buffer */ 167 addr = virt_to_bus (bh->b_data); 168 size = bh->b_size; 169 while ((bh = bh->b_reqnext) != NULL) { 170 if ((addr + size) != virt_to_bus (bh->b_data)) 171 break; 172 size += bh->b_size; 173 } 174 } 175 176 /* 177 * Fill in the dma table, without crossing any 64kB boundaries. 178 * We assume 16-bit alignment of all blocks. 179 */ 180 while (size) { 181 if (++count >= PRD_ENTRIES) { 182 printk("%s: DMA table too small\n", drive->name); 183 return 1; /* revert to PIO for this request */ 184 } else { 185 unsigned long bcount = 0x10000 - (addr & 0xffff); 186 if (bcount > size) 187 bcount = size; 188 *table++ = addr; 189 *table++ = bcount; 190 addr += bcount; 191 size -= bcount; 192 } 193 } 194 } while (bh != NULL); 195 if (count) { 196 *--table |= 0x80000000; /* set End-Of-Table (EOT) bit */ 197 return 0; 198 } 199 printk("%s: empty DMA table?\n", drive->name); 200 return 1; /* let the PIO routines handle this weirdness */ 201 } 202 203 static int config_drive_for_dma (ide_drive_t *drive) /* */ 204 { 205 const char **list; 206 207 struct hd_driveid *id = drive->id; 208 if (id && (id->capability & 1)) { 209 /* Enable DMA on any drive that supports mword2 DMA */ 210 if ((id->field_valid & 2) && (id->dma_mword & 0x404) == 0x404) { 211 drive->using_dma = 1; 212 return 0; /* DMA enabled */ 213 } 214 /* Consult the list of known "good" drives */ 215 list = good_dma_drives; 216 while (*list) { 217 if (!strcmp(*list++,id->model)) { 218 drive->using_dma = 1; 219 return 0; /* DMA enabled */ 220 } 221 } 222 } 223 return 1; /* DMA not enabled */ 224 } 225 226 /* 227 * triton_dmaproc() initiates/aborts DMA read/write operations on a drive. 228 * 229 * The caller is assumed to have selected the drive and programmed the drive's 230 * sector address using CHS or LBA. All that remains is to prepare for DMA 231 * and then issue the actual read/write DMA/PIO command to the drive. 232 * 233 * Returns 0 if all went well. 234 * Returns 1 if DMA read/write could not be started, in which case 235 * the caller should revert to PIO for the current request. 236 */ 237 static int triton_dmaproc (ide_dma_action_t func, ide_drive_t *drive) /* */ 238 { 239 unsigned long dma_base = HWIF(drive)->dma_base; 240 unsigned int reading = (1 << 3); 241 242 switch (func) { 243 case ide_dma_abort: 244 outb(inb(dma_base)&~1, dma_base); /* stop DMA */ 245 return 0; 246 case ide_dma_check: 247 return config_drive_for_dma (drive); 248 case ide_dma_write: 249 reading = 0; 250 case ide_dma_read: 251 break; 252 default: 253 printk("triton_dmaproc: unsupported func: %d\n", func); 254 return 1; 255 } 256 if (build_dmatable (drive)) 257 return 1; 258 outl(virt_to_bus (HWIF(drive)->dmatable), dma_base + 4); /* PRD table */ 259 outb(reading, dma_base); /* specify r/w */ 260 outb(0x26, dma_base+2); /* clear status bits */ 261 ide_set_handler (drive, &dma_intr); /* issue cmd to drive */ 262 OUT_BYTE(reading ? WIN_READDMA : WIN_WRITEDMA, IDE_COMMAND_REG); 263 outb(inb(dma_base)|1, dma_base); /* begin DMA */ 264 return 0; 265 } 266 267 /* 268 * print_triton_drive_flags() displays the currently programmed options 269 * in the Triton chipset for a given drive. 270 * 271 * If fastDMA is "no", then slow ISA timings are used for DMA data xfers. 272 * If fastPIO is "no", then slow ISA timings are used for PIO data xfers. 273 * If IORDY is "no", then IORDY is assumed to always be asserted. 274 * If PreFetch is "no", then data pre-fetch/post are not used. 275 * 276 * When "fastPIO" and/or "fastDMA" are "yes", then faster PCI timings and 277 * back-to-back 16-bit data transfers are enabled, using the sample_CLKs 278 * and recovery_CLKs (PCI clock cycles) timing parameters for that interface. 279 */ 280 static void print_triton_drive_flags (unsigned int unit, byte flags) /* */ 281 { 282 printk(" %s ", unit ? "slave :" : "master:"); 283 printk( "fastDMA=%s", (flags&9) ? "on " : "off"); 284 printk(" PreFetch=%s", (flags&4) ? "on " : "off"); 285 printk(" IORDY=%s", (flags&2) ? "on " : "off"); 286 printk(" fastPIO=%s\n", ((flags&9)==1) ? "on " : "off"); 287 } 288 289 /* 290 * ide_init_triton() prepares the IDE driver for DMA operation. 291 * This routine is called once, from ide.c during driver initialization, 292 * for each triton chipset which is found (unlikely to be more than one). 293 */ 294 void ide_init_triton (byte bus, byte fn) /* */ 295 { 296 int rc = 0, h; 297 unsigned short bmiba, pcicmd; 298 unsigned int timings; 299 extern ide_hwif_t ide_hwifs[]; 300 301 /* 302 * See if IDE and BM-DMA features are enabled: 303 */ 304 if ((rc = pcibios_read_config_word(bus, fn, 0x04, &pcicmd))) 305 goto quit; 306 if ((pcicmd & 5) != 5) { 307 if ((pcicmd & 1) == 0) 308 printk("ide: Triton IDE ports are not enabled\n"); 309 else 310 printk("ide: Triton BM-DMA feature is not enabled\n"); 311 goto quit; 312 } 313 #if 0 314 (void) pcibios_write_config_word(bus, fn, 0x42, 0x8037); /* for my MC2112A */ 315 #endif 316 /* 317 * See if ide port(s) are enabled 318 */ 319 if ((rc = pcibios_read_config_dword(bus, fn, 0x40, &timings))) 320 goto quit; 321 if (!(timings & 0x80008000)) { 322 printk("ide: Triton IDE ports are not enabled\n"); 323 goto quit; 324 } 325 printk("ide: Triton BM-IDE on PCI bus %d function %d\n", bus, fn); 326 327 /* 328 * Get the bmiba base address 329 */ 330 if ((rc = pcibios_read_config_word(bus, fn, 0x20, &bmiba))) 331 goto quit; 332 bmiba &= 0xfff0; /* extract port base address */ 333 334 /* 335 * Save the dma_base port addr for each interface 336 */ 337 for (h = 0; h < MAX_HWIFS; ++h) { 338 ide_hwif_t *hwif = &ide_hwifs[h]; 339 unsigned short base, time; 340 if (hwif->io_base == 0x1f0 && (timings & 0x8000)) { 341 time = timings & 0xffff; 342 base = bmiba; 343 } else if (hwif->io_base == 0x170 && (timings & 0x80000000)) { 344 time = timings >> 16; 345 base = bmiba + 8; 346 } else 347 continue; 348 printk(" %s: BusMaster DMA at 0x%04x-0x%04x", hwif->name, base, base+7); 349 if (check_region(base, 8)) { 350 printk(" -- ERROR, PORTS ALREADY IN USE"); 351 } else { 352 unsigned long *table; 353 request_region(base, 8, hwif->name); 354 hwif->dma_base = base; 355 table = ide_alloc(2 * PRD_ENTRIES * sizeof(long), 4096); 356 hwif->dmatable = table; 357 outl((unsigned long) table, base + 4); 358 hwif->dmaproc = &triton_dmaproc; 359 } 360 printk("\n %s timing: (0x%04x) sample_CLKs=%d, recovery_CLKs=%d\n", 361 hwif->name, time, ((~time>>12)&3)+2, ((~time>>8)&3)+1); 362 print_triton_drive_flags (0, time & 0xf); 363 print_triton_drive_flags (1, (time >> 4) & 0xf); 364 } 365 366 quit: if (rc) printk("ide: pcibios access failed - %s\n", pcibios_strerror(rc)); 367 } 368