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*/
1 /*
2 * linux/drivers/block/triton.c Version 1.01 Aug 28, 1995
3 *
4 * Copyright (c) 1995 Mark Lord
5 * May be copied or modified under the terms of the GNU General Public License
6 */
7
8 /*
9 * This module provides support for the Bus Master IDE DMA function
10 * of the Intel PCI Triton chipset (82371FB).
11 *
12 * DMA is currently supported only for hard disk drives (not cdroms).
13 *
14 * Support for cdroms will likely be added at a later date,
15 * after broader experience has been obtained with hard disks.
16 *
17 * Up to four drives may be enabled for DMA, and the Triton chipset will
18 * (hopefully) arbitrate the PCI bus among them. Note that the 82371FB chip
19 * provides a single "line buffer" for the BM IDE function, so performance of
20 * multiple (two) drives doing DMA simultaneously will suffer somewhat,
21 * as they contest for that resource bottleneck. This is handled transparently
22 * inside the 82371FB chip.
23 *
24 * By default, DMA support is prepared for use, but is currently enabled only
25 * for drives which support multi-word DMA mode2 (mword2), or which are
26 * recognized as "good" (see table below). Drives with only mode0 or mode1
27 * (single or multi) DMA should also work with this chipset/driver (eg. MC2112A)
28 * but are not enabled by default. Use "hdparm -i" to view modes supported
29 * by a given drive.
30 *
31 * The hdparm-2.4 (or later) utility can be used for manually enabling/disabling
32 * DMA support, but must be (re-)compiled against this kernel version or later.
33 *
34 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
35 * If problems arise, ide.c will disable DMA operation after a few retries.
36 * This error recovery mechanism works and has been extremely well exercised.
37 *
38 * IDE drives, depending on their vintage, may support several different modes
39 * of DMA operation. The boot-time modes are indicated with a "*" in
40 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
41 * the "hdparm -X" feature. There is seldom a need to do this, as drives
42 * normally power-up with their "best" PIO/DMA modes enabled.
43 *
44 * Testing was done with an ASUS P55TP4XE/100 system and the following drives:
45 *
46 * Quantum Fireball 1080A (1Gig w/83kB buffer), DMA mode2, PIO mode4.
47 * - DMA mode2 works well (7.4MB/sec), despite the tiny on-drive buffer.
48 * - This drive also does PIO mode4, at about the same speed as DMA mode2.
49 * An awesome drive for the price!
50 *
51 * Fujitsu M1606TA (1Gig w/256kB buffer), DMA mode2, PIO mode4.
52 * - DMA mode2 gives horrible performance (1.6MB/sec), despite the good
53 * size of the on-drive buffer and a boasted 10ms average access time.
54 * - PIO mode4 was better, but peaked at a mere 4.5MB/sec.
55 *
56 * Micropolis MC2112A (1Gig w/508kB buffer), drive pre-dates EIDE and ATA2.
57 * - DMA works fine (2.2MB/sec), probably due to the large on-drive buffer.
58 * - This older drive can also be tweaked for fastPIO (3.7MB/sec) by using
59 * maximum clock settings (5,4) and setting all flags except prefetch.
60 *
61 * Western Digital AC31000H (1Gig w/128kB buffer), DMA mode1, PIO mode3.
62 * - DMA does not work reliably. The drive appears to be somewhat tardy
63 * in deasserting DMARQ at the end of a sector. This is evident in
64 * the observation that WRITEs work most of the time, depending on
65 * cache-buffer occupancy, but multi-sector reads seldom work.
66 *
67 * Drives like the AC31000H could likely be made to work if all DMA were done
68 * one sector at a time, but that would likely negate any advantage over PIO.
69 *
70 * If you have any drive models to add, email your results to: mlord@bnr.ca
71 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
72 */
73 #define _TRITON_C
74 #include <linux/config.h>
75 #ifndef CONFIG_BLK_DEV_TRITON
76 #define CONFIG_BLK_DEV_TRITON y
77 #endif
78 #include <linux/types.h>
79 #include <linux/kernel.h>
80 #include <linux/timer.h>
81 #include <linux/mm.h>
82 #include <linux/ioport.h>
83 #include <linux/interrupt.h>
84 #include <linux/blkdev.h>
85 #include <linux/hdreg.h>
86 #include <linux/pci.h>
87 #include <linux/bios32.h>
88
89 #include <asm/io.h>
90 #include <asm/dma.h>
91
92 #include "ide.h"
93
94 /*
95 * good_dma_drives() lists the model names (from "hdparm -i")
96 * of drives which do not support mword2 DMA but which are
97 * known to work fine with this interface under Linux.
98 */
99 const char *good_dma_drives[] = {"Micropolis 2112A"};
100
101 /*
102 * Our Physical Region Descriptor (PRD) table should be large enough
103 * to handle the biggest I/O request we are likely to see. Since requests
104 * can have no more than 256 sectors, and since the typical blocksize is
105 * two sectors, we can get by with a limit of 128 entries here for the
106 * usual worst case. Most requests seem to include some contiguous blocks,
107 * further reducing the number of table entries required.
108 *
109 * Note that the driver reverts to PIO mode for individual requests that exceed
110 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
111 * 100% of all crazy scenarios here is not necessary.
112 */
113 #define PRD_ENTRIES 128 /* max memory area count per DMA */
114
115 /*
116 * dma_intr() is the handler for disk read/write DMA interrupts
117 */
118 static void dma_intr (ide_drive_t *drive)
/* ![[next]](../icons/right.png)
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*/
119 {
120 byte stat, dma_stat;
121 int i;
122 struct request *rq = HWGROUP(drive)->rq;
123 unsigned short dma_base = HWIF(drive)->dma_base;
124
125 dma_stat = inb(dma_base+2); /* get DMA status */
126 outb(inb(dma_base)&~1, dma_base); /* stop DMA operation */
127 stat = GET_STAT(); /* get drive status */
128 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
129 if ((dma_stat & 7) == 4) { /* verify good DMA status */
130 rq = HWGROUP(drive)->rq;
131 for (i = rq->nr_sectors; i > 0;) {
132 i -= rq->current_nr_sectors;
133 ide_end_request(1, HWGROUP(drive));
134 }
135 IDE_DO_REQUEST;
136 return;
137 }
138 printk("%s: bad DMA status: 0x%02x\n", drive->name, dma_stat);
139 }
140 sti();
141 if (!ide_error(drive, "dma_intr", stat))
142 IDE_DO_REQUEST;
143 }
144
145 /*
146 * build_dmatable() prepares a dma request.
147 * Returns 0 if all went okay, returns 1 otherwise.
148 */
149 static int build_dmatable (ide_drive_t *drive)
/* ![[previous]](../icons/left.png)
*/
150 {
151 struct request *rq = HWGROUP(drive)->rq;
152 struct buffer_head *bh = rq->bh;
153 unsigned long size, addr, *table = HWIF(drive)->dmatable;
154 unsigned int count = 0;
155
156 do {
157 /*
158 * Determine addr and size of next buffer area. We assume that
159 * individual virtual buffers are always composed linearly in
160 * physical memory. For example, we assume that any 8kB buffer
161 * is always composed of two adjacent physical 4kB pages rather
162 * than two possibly non-adjacent physical 4kB pages.
163 */
164 if (bh == NULL) { /* paging requests have (rq->bh == NULL) */
165 addr = virt_to_bus (rq->buffer);
166 size = rq->nr_sectors << 9;
167 } else {
168 /* group sequential buffers into one large buffer */
169 addr = virt_to_bus (bh->b_data);
170 size = bh->b_size;
171 while ((bh = bh->b_reqnext) != NULL) {
172 if ((addr + size) != virt_to_bus (bh->b_data))
173 break;
174 size += bh->b_size;
175 }
176 }
177
178 /*
179 * Fill in the dma table, without crossing any 64kB boundaries.
180 * We assume 16-bit alignment of all blocks.
181 */
182 while (size) {
183 if (++count >= PRD_ENTRIES) {
184 printk("%s: DMA table too small\n", drive->name);
185 return 1; /* revert to PIO for this request */
186 } else {
187 unsigned long bcount = 0x10000 - (addr & 0xffff);
188 if (bcount > size)
189 bcount = size;
190 *table++ = addr;
191 *table++ = bcount;
192 addr += bcount;
193 size -= bcount;
194 }
195 }
196 } while (bh != NULL);
197 if (count) {
198 *--table |= 0x80000000; /* set End-Of-Table (EOT) bit */
199 return 0;
200 }
201 printk("%s: empty DMA table?\n", drive->name);
202 return 1; /* let the PIO routines handle this weirdness */
203 }
204
205 static int config_drive_for_dma (ide_drive_t *drive)
/* */
206 {
207 const char **list;
208
209 struct hd_driveid *id = drive->id;
210 if (id && (id->capability & 1)) {
211 /* Enable DMA on any drive that supports mword2 DMA */
212 if ((id->field_valid & 2) && (id->dma_mword & 0x404) == 0x404) {
213 drive->using_dma = 1;
214 return 0; /* DMA enabled */
215 }
216 /* Consult the list of known "good" drives */
217 list = good_dma_drives;
218 while (*list) {
219 if (!strcmp(*list++,id->model)) {
220 drive->using_dma = 1;
221 return 0; /* DMA enabled */
222 }
223 }
224 }
225 return 1; /* DMA not enabled */
226 }
227
228 /*
229 * triton_dmaproc() initiates/aborts DMA read/write operations on a drive.
230 *
231 * The caller is assumed to have selected the drive and programmed the drive's
232 * sector address using CHS or LBA. All that remains is to prepare for DMA
233 * and then issue the actual read/write DMA/PIO command to the drive.
234 *
235 * Returns 0 if all went well.
236 * Returns 1 if DMA read/write could not be started, in which case
237 * the caller should revert to PIO for the current request.
238 */
239 static int triton_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
/* */
240 {
241 unsigned long dma_base = HWIF(drive)->dma_base;
242 unsigned int reading = (1 << 3);
243
244 switch (func) {
245 case ide_dma_abort:
246 outb(inb(dma_base)&~1, dma_base); /* stop DMA */
247 return 0;
248 case ide_dma_check:
249 return config_drive_for_dma (drive);
250 case ide_dma_write:
251 reading = 0;
252 case ide_dma_read:
253 break;
254 default:
255 printk("triton_dmaproc: unsupported func: %d\n", func);
256 return 1;
257 }
258 if (build_dmatable (drive))
259 return 1;
260 outl(virt_to_bus (HWIF(drive)->dmatable), dma_base + 4); /* PRD table */
261 outb(reading, dma_base); /* specify r/w */
262 outb(0x26, dma_base+2); /* clear status bits */
263 ide_set_handler (drive, &dma_intr); /* issue cmd to drive */
264 OUT_BYTE(reading ? WIN_READDMA : WIN_WRITEDMA, IDE_COMMAND_REG);
265 outb(inb(dma_base)|1, dma_base); /* begin DMA */
266 return 0;
267 }
268
269 /*
270 * print_triton_drive_flags() displays the currently programmed options
271 * in the Triton chipset for a given drive.
272 *
273 * If fastDMA is "no", then slow ISA timings are used for DMA data xfers.
274 * If fastPIO is "no", then slow ISA timings are used for PIO data xfers.
275 * If IORDY is "no", then IORDY is assumed to always be asserted.
276 * If PreFetch is "no", then data pre-fetch/post are not used.
277 *
278 * When "fastPIO" and/or "fastDMA" are "yes", then faster PCI timings and
279 * back-to-back 16-bit data transfers are enabled, using the sample_CLKs
280 * and recovery_CLKs (PCI clock cycles) timing parameters for that interface.
281 */
282 static void print_triton_drive_flags (unsigned int unit, byte flags)
/* */
283 {
284 printk(" %s ", unit ? "slave :" : "master:");
285 printk( "fastDMA=%s", (flags&9) ? "on " : "off");
286 printk(" PreFetch=%s", (flags&4) ? "on " : "off");
287 printk(" IORDY=%s", (flags&2) ? "on " : "off");
288 printk(" fastPIO=%s\n", ((flags&9)==1) ? "on " : "off");
289 }
290
291 /*
292 * ide_init_triton() prepares the IDE driver for DMA operation.
293 * This routine is called once, from ide.c during driver initialization,
294 * for each triton chipset which is found (unlikely to be more than one).
295 */
296 void ide_init_triton (byte bus, byte fn)
/* ![[last]](../icons/n_last.png)
*/
297 {
298 int rc = 0, h;
299 unsigned short bmiba, pcicmd;
300 unsigned int timings;
301 extern ide_hwif_t ide_hwifs[];
302
303 /*
304 * See if IDE and BM-DMA features are enabled:
305 */
306 if ((rc = pcibios_read_config_word(bus, fn, 0x04, &pcicmd)))
307 goto quit;
308 if ((pcicmd & 5) != 5) {
309 if ((pcicmd & 1) == 0)
310 printk("ide: Triton IDE ports are not enabled\n");
311 else
312 printk("ide: Triton BM-DMA feature is not enabled\n");
313 goto quit;
314 }
315 #if 0
316 (void) pcibios_write_config_word(bus, fn, 0x42, 0x8037); /* for my MC2112A */
317 #endif
318 /*
319 * See if ide port(s) are enabled
320 */
321 if ((rc = pcibios_read_config_dword(bus, fn, 0x40, &timings)))
322 goto quit;
323 if (!(timings & 0x80008000)) {
324 printk("ide: Triton IDE ports are not enabled\n");
325 goto quit;
326 }
327 printk("ide: Triton BM-IDE on PCI bus %d function %d\n", bus, fn);
328
329 /*
330 * Get the bmiba base address
331 */
332 if ((rc = pcibios_read_config_word(bus, fn, 0x20, &bmiba)))
333 goto quit;
334 bmiba &= 0xfff0; /* extract port base address */
335
336 /*
337 * Save the dma_base port addr for each interface
338 */
339 for (h = 0; h < MAX_HWIFS; ++h) {
340 ide_hwif_t *hwif = &ide_hwifs[h];
341 unsigned short base, time;
342 if (hwif->io_base == 0x1f0 && (timings & 0x8000)) {
343 time = timings & 0xffff;
344 base = bmiba;
345 } else if (hwif->io_base == 0x170 && (timings & 0x80000000)) {
346 time = timings >> 16;
347 base = bmiba + 8;
348 } else
349 continue;
350 printk(" %s: BusMaster DMA at 0x%04x-0x%04x", hwif->name, base, base+7);
351 if (check_region(base, 8)) {
352 printk(" -- ERROR, PORTS ALREADY IN USE");
353 } else {
354 unsigned long *table;
355 request_region(base, 8, hwif->name);
356 hwif->dma_base = base;
357 table = (void *) __get_dma_pages(GFP_KERNEL, 0);
358 hwif->dmatable = table;
359 outl(virt_to_bus(table), base + 4);
360 hwif->dmaproc = &triton_dmaproc;
361 }
362 printk("\n %s timing: (0x%04x) sample_CLKs=%d, recovery_CLKs=%d\n",
363 hwif->name, time, ((~time>>12)&3)+2, ((~time>>8)&3)+1);
364 print_triton_drive_flags (0, time & 0xf);
365 print_triton_drive_flags (1, (time >> 4) & 0xf);
366 }
367
368 quit: if (rc) printk("ide: pcibios access failed - %s\n", pcibios_strerror(rc));
369 }
370
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*/