This source file includes following definitions.
- pi0_preprobe
- random
- wrtscc
- rdscc
- switchbuffers
- hardware_send_packet
- setup_rx_dma
- setup_tx_dma
- tdelay
- free_p
- a_txint
- a_exint
- a_rxint
- b_rxint
- b_txint
- b_exint
- hw_probe
- rts
- pi_header
- pi_rebuild_header
- scc_init
- chipset_init
- pi_init
- valid_dma_page
- pi_set_mac_address
- get_dma_buffer
- pi_probe
- pi_open
- pi_send_packet
- pi_interrupt
- pi_close
- pi_ioctl
- pi_get_stats
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66 #define PI_DMA 3
67
68 #define DEF_A_SPEED 0
69 #define DEF_A_TXDELAY 15
70 #define DEF_A_PERSIST 128
71 #define DEF_A_SLOTIME 15
72 #define DEF_A_SQUELDELAY 1
73 #define DEF_A_CLOCKMODE 0
74
75 #define DEF_B_SPEED 1200
76 #define DEF_B_TXDELAY 40
77 #define DEF_B_PERSIST 128
78 #define DEF_B_SLOTIME 30
79 #define DEF_B_SQUELDELAY 3
80 #define DEF_B_CLOCKMODE 0
81
82 static const char *version =
83 "PI: V0.8 ALPHA April 23 1995 David Perry (dp@hydra.carleton.ca)\n";
84
85
86
87 #define REALLY_SLOW_IO 1
88
89 #define PI2_MODULE 0
90
91 #if PI2_MODULE > 0
92 #include <linux/modules.h>
93 #endif
94
95 #include <linux/config.h>
96 #include <linux/kernel.h>
97 #include <linux/sched.h>
98 #include <linux/types.h>
99 #include <linux/fcntl.h>
100 #include <linux/interrupt.h>
101 #include <linux/ptrace.h>
102 #include <linux/ioport.h>
103 #include <linux/in.h>
104 #include <linux/malloc.h>
105 #include <linux/string.h>
106 #include <linux/errno.h>
107 #include <asm/system.h>
108 #include <asm/bitops.h>
109 #include <asm/io.h>
110 #include <asm/dma.h>
111 #include <asm/segment.h>
112 #include <linux/inet.h>
113 #include <linux/netdevice.h>
114 #include <linux/etherdevice.h>
115 #include <linux/skbuff.h>
116 #include <linux/timer.h>
117 #include <linux/if_arp.h>
118 #include "pi2.h"
119 #include "z8530.h"
120 #include <net/ax25.h>
121
122
123 struct mbuf {
124 struct mbuf *next;
125 int cnt;
126 char data[0];
127 };
128
129
130
131
132
133
134
135
136
137 static int pi0_preprobe(struct device *dev){return 0;}
138 static struct device pi0a = { "pi0a", 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, pi0_preprobe };
139 static struct device pi0b = { "pi0b", 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, pi0_preprobe };
140
141
142
143 #define PI_TOTAL_SIZE 8
144
145
146
147
148 static int pi_probe(struct device *dev, int card_type);
149 static int pi_open(struct device *dev);
150 static int pi_send_packet(struct sk_buff *skb, struct device *dev);
151 static void pi_interrupt(int reg_ptr, struct pt_regs *regs);
152 static int pi_close(struct device *dev);
153 static int pi_ioctl(struct device *dev, struct ifreq *ifr, int cmd);
154 static struct enet_statistics *pi_get_stats(struct device *dev);
155 static void rts(struct pi_local *lp, int x);
156 static void b_rxint(struct device *dev, struct pi_local *lp);
157 static void b_txint(struct pi_local *lp);
158 static void b_exint(struct pi_local *lp);
159 static void a_rxint(struct device *dev, struct pi_local *lp);
160 static void a_txint(struct pi_local *lp);
161 static void a_exint(struct pi_local *lp);
162 static char *get_dma_buffer(unsigned long *mem_ptr);
163 static int valid_dma_page(unsigned long addr, unsigned long dev_buffsize);
164
165 static char ax25_bcast[7] =
166 {'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1};
167 static char ax25_test[7] =
168 {'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1};
169
170 static int ext2_secrm_seed = 152;
171
172 static inline unsigned char random(void)
173 {
174 return (unsigned char) (ext2_secrm_seed = ext2_secrm_seed
175 * 69069l + 1);
176 }
177
178 static inline void wrtscc(int cbase, int ctl, int sccreg, int val)
179 {
180
181 outb_p(0, cbase + DMAEN);
182 outb_p(sccreg, ctl);
183 outb_p(val, ctl);
184 outb_p(1, cbase + DMAEN);
185 }
186
187 static inline int rdscc(int cbase, int ctl, int sccreg)
188 {
189 int retval;
190
191
192 outb_p(0, cbase + DMAEN);
193 outb_p(sccreg, ctl);
194 retval = inb_p(ctl);
195 outb_p(1, cbase + DMAEN);
196 return retval;
197 }
198
199 static void switchbuffers(struct pi_local *lp)
200 {
201 if (lp->rcvbuf == lp->rxdmabuf1)
202 lp->rcvbuf = lp->rxdmabuf2;
203 else
204 lp->rcvbuf = lp->rxdmabuf1;
205 }
206
207 static void hardware_send_packet(struct pi_local *lp, struct sk_buff *skb)
208 {
209 char kickflag;
210 unsigned long flags;
211
212 lp->stats.tx_packets++;
213
214 save_flags(flags);
215 cli();
216 kickflag = (skb_peek(&lp->sndq) == NULL) && (lp->sndbuf == NULL);
217 restore_flags(flags);
218
219 skb_queue_tail(&lp->sndq, skb);
220 if (kickflag) {
221
222 switch (lp->base & 2) {
223 case 2:
224 a_txint(lp);
225 break;
226 case 0:
227 save_flags(flags);
228 cli();
229 if (lp->tstate == IDLE)
230 b_txint(lp);
231 restore_flags(flags);
232 break;
233 }
234 }
235 }
236
237 static void setup_rx_dma(struct pi_local *lp)
238 {
239 unsigned long flags;
240 int cmd;
241 unsigned long dma_abs;
242 unsigned dmachan;
243
244 save_flags(flags);
245 cli();
246
247 dma_abs = (unsigned long) (lp->rcvbuf->data);
248 dmachan = lp->dmachan;
249 cmd = lp->base + CTL;
250
251 if(!valid_dma_page(dma_abs, DMA_BUFF_SIZE + sizeof(struct mbuf)))
252 panic("PI: RX buffer violates DMA boundary!");
253
254
255 wrtscc(lp->cardbase, cmd, R1, WT_FN_RDYFN | WT_RDY_RT | INT_ERR_Rx | EXT_INT_ENAB);
256
257 disable_dma(dmachan);
258 clear_dma_ff(dmachan);
259
260
261
262
263 set_dma_mode(dmachan, DMA_MODE_READ | 0x10);
264 set_dma_addr(dmachan, dma_abs);
265 set_dma_count(dmachan, lp->bufsiz);
266 enable_dma(dmachan);
267
268
269
270
271 wrtscc(lp->cardbase, cmd, R0, RES_Rx_CRC);
272
273
274 wrtscc(lp->cardbase, cmd, R1,
275 WT_RDY_ENAB | WT_FN_RDYFN | WT_RDY_RT | INT_ERR_Rx | EXT_INT_ENAB);
276
277 restore_flags(flags);
278 }
279
280 static void setup_tx_dma(struct pi_local *lp, int length)
281 {
282 unsigned long dma_abs;
283 unsigned long flags;
284 unsigned long dmachan;
285
286 save_flags(flags);
287 cli();
288
289 dmachan = lp->dmachan;
290 dma_abs = (unsigned long) (lp->txdmabuf);
291
292 if(!valid_dma_page(dma_abs, DMA_BUFF_SIZE + sizeof(struct mbuf)))
293 panic("PI: TX buffer violates DMA boundary!");
294
295 disable_dma(dmachan);
296
297
298
299 set_dma_mode(dmachan, DMA_MODE_WRITE);
300 clear_dma_ff(dmachan);
301 set_dma_addr(dmachan, dma_abs);
302
303 set_dma_count(dmachan, length);
304
305 restore_flags(flags);
306 }
307
308 static void tdelay(struct pi_local *lp, int time)
309 {
310 int port;
311 unsigned int t1;
312 unsigned char sc;
313
314 if (lp->base & 2) {
315 sc = SC1;
316 t1 = time;
317 port = lp->cardbase + TMR1;
318 } else {
319 sc = SC2;
320 t1 = 10 * time;
321 port = lp->cardbase + TMR2;
322 wrtscc(lp->cardbase, lp->base + CTL, R1, INT_ALL_Rx | EXT_INT_ENAB);
323 }
324
325
326 outb_p(sc | LSB_MSB | MODE0, lp->cardbase + TMRCMD);
327
328
329 outb_p((t1 << 1) & 0xFF, port);
330 outb_p((t1 >> 7) & 0xFF, port);
331
332
333 wrtscc(lp->cardbase, lp->base + CTL, R15, CTSIE);
334 wrtscc(lp->cardbase, lp->base + CTL, R0, RES_EXT_INT);
335 }
336
337 static void free_p(struct sk_buff *skb)
338 {
339 dev_kfree_skb(skb, FREE_WRITE);
340 }
341
342 static void a_txint(struct pi_local *lp)
343 {
344 int cmd;
345 unsigned long flags;
346
347 save_flags(flags);
348 cli();
349
350 cmd = CTL + lp->base;
351
352 switch (lp->tstate) {
353 case IDLE:
354
355 if ((lp->sndbuf = skb_dequeue(&lp->sndq)) == NULL) {
356 rts(lp, OFF);
357 restore_flags(flags);
358 return;
359 }
360
361 case DEFER:
362
363
364
365
366 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
367 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
368 if ((rdscc(lp->cardbase, cmd, R0) & DCD) != 0) {
369 lp->tstate = DEFER;
370 tdelay(lp, 100);
371
372 wrtscc(lp->cardbase, cmd, R15, CTSIE | DCDIE);
373 restore_flags(flags);
374 return;
375 }
376 if (random() > lp->persist) {
377 lp->tstate = DEFER;
378 tdelay(lp, lp->slotime);
379 restore_flags(flags);
380 return;
381 }
382
383 wrtscc(lp->cardbase, cmd, R5, TxCRC_ENAB | RTS | Tx8);
384 rts(lp, ON);
385 lp->tstate = ST_TXDELAY;
386 tdelay(lp, lp->txdelay);
387 restore_flags(flags);
388 return;
389 default:
390 break;
391 }
392
393 restore_flags(flags);
394 }
395
396 static void a_exint(struct pi_local *lp)
397 {
398 unsigned long flags;
399 int cmd;
400 char st;
401 int length;
402
403 save_flags(flags);
404 cli();
405
406 st = rdscc(lp->cardbase, lp->base + CTL, R0);
407
408
409 wrtscc(lp->cardbase, CTL + lp->base, R0, RES_EXT_INT);
410 cmd = lp->base + CTL;
411
412 if ((lp->rstate >= ACTIVE) && (st & BRK_ABRT)) {
413 setup_rx_dma(lp);
414 lp->rstate = ACTIVE;
415 }
416 switch (lp->tstate) {
417 case ACTIVE:
418 free_p(lp->sndbuf);
419 lp->sndbuf = NULL;
420 lp->tstate = FLAGOUT;
421 tdelay(lp, lp->squeldelay);
422 break;
423 case FLAGOUT:
424 if ((lp->sndbuf = skb_dequeue(&lp->sndq)) == NULL) {
425
426 lp->tstate = IDLE;
427 rts(lp, OFF);
428 restore_flags(flags);
429 return;
430 }
431
432 case ST_TXDELAY:
433
434 disable_dma(lp->dmachan);
435
436
437 wrtscc(lp->cardbase, cmd, R1, WT_FN_RDYFN | EXT_INT_ENAB);
438
439
440
441
442 length = lp->sndbuf->len - 1;
443 memcpy(lp->txdmabuf, &lp->sndbuf->data[1], length);
444
445
446
447 setup_tx_dma(lp, length);
448
449
450
451 enable_dma(lp->dmachan);
452
453
454 wrtscc(lp->cardbase, cmd, R0, RES_Tx_CRC | RES_Tx_P);
455
456
457 wrtscc(lp->cardbase, cmd, R15, TxUIE);
458
459
460 wrtscc(lp->cardbase, cmd, R1, WT_RDY_ENAB | WT_FN_RDYFN | EXT_INT_ENAB);
461
462
463 wrtscc(lp->cardbase, cmd, R0, RES_EOM_L);
464
465
466
467 lp->tstate = ACTIVE;
468 break;
469 case DEFER:
470
471
472
473 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
474 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
475 if ((rdscc(lp->cardbase, cmd, R0) & DCD) != 0) {
476 lp->tstate = DEFER;
477 tdelay(lp, 100);
478
479 wrtscc(lp->cardbase, CTL + lp->base, R15, CTSIE | DCDIE);
480 restore_flags(flags);
481 return;
482 }
483 if (random() > lp->persist) {
484 lp->tstate = DEFER;
485 tdelay(lp, lp->slotime);
486 restore_flags(flags);
487 return;
488 }
489
490 wrtscc(lp->cardbase, cmd, R5, TxCRC_ENAB | RTS | Tx8);
491 rts(lp, ON);
492 lp->tstate = ST_TXDELAY;
493 tdelay(lp, lp->txdelay);
494 restore_flags(flags);
495 return;
496 }
497
498 restore_flags(flags);
499 }
500
501
502
503 static void a_rxint(struct device *dev, struct pi_local *lp)
504 {
505 unsigned long flags;
506 int cmd;
507 int bytecount;
508 char rse;
509 struct sk_buff *skb;
510 int sksize, pkt_len;
511 struct mbuf *cur_buf;
512 unsigned char *cfix;
513
514 save_flags(flags);
515 cli();
516 cmd = lp->base + CTL;
517
518 rse = rdscc(lp->cardbase, cmd, R1);
519 if (rse & Rx_OVR)
520 lp->rstate = RXERROR;
521
522 if (rse & END_FR) {
523
524
525 clear_dma_ff(lp->dmachan);
526 bytecount = lp->bufsiz - get_dma_residue(lp->dmachan);
527
528 if ((rse & CRC_ERR) || (lp->rstate > ACTIVE) || (bytecount < 10)) {
529 if ((bytecount >= 10) && (rse & CRC_ERR)) {
530 lp->stats.rx_crc_errors++;
531 }
532 if (lp->rstate == RXERROR) {
533 lp->stats.rx_errors++;
534 lp->stats.rx_over_errors++;
535 }
536
537 lp->rstate = ACTIVE;
538 setup_rx_dma(lp);
539 } else {
540
541
542 pkt_len = lp->rcvbuf->cnt = bytecount - 2 + 1;
543
544
545 cur_buf = lp->rcvbuf;
546 switchbuffers(lp);
547 setup_rx_dma(lp);
548
549
550
551 sksize = pkt_len;
552
553 skb = dev_alloc_skb(sksize);
554 if (skb == NULL) {
555 printk("PI: %s: Memory squeeze, dropping packet.\n", dev->name);
556 lp->stats.rx_dropped++;
557 restore_flags(flags);
558 return;
559 }
560 skb->dev = dev;
561
562
563 cfix=skb_put(skb,pkt_len);
564 *cfix++=0;
565
566 memcpy(cfix, (char *) cur_buf->data,
567 pkt_len - 1);
568 skb->protocol=htons(ETH_P_AX25);
569 skb->mac.raw=skb->data;
570 IS_SKB(skb);
571 netif_rx(skb);
572 lp->stats.rx_packets++;
573 }
574 }
575 wrtscc(lp->cardbase, lp->base + CTL, R0, ERR_RES);
576 restore_flags(flags);
577 }
578
579 static void b_rxint(struct device *dev, struct pi_local *lp)
580 {
581 unsigned long flags;
582 int cmd;
583 char rse;
584 struct sk_buff *skb;
585 int sksize;
586 int pkt_len;
587 unsigned char *cfix;
588
589 save_flags(flags);
590 cli();
591 cmd = CTL + lp->base;
592
593 rse = rdscc(lp->cardbase, cmd, R1);
594
595 if ((rdscc(lp->cardbase, cmd, R0)) & Rx_CH_AV) {
596
597
598
599 if (rse & Rx_OVR) {
600
601
602 lp->rcp = lp->rcvbuf->data;
603 lp->rcvbuf->cnt = 0;
604
605 lp->rstate = RXERROR;
606 lp->stats.rx_errors++;
607 lp->stats.rx_over_errors++;
608 } else if (lp->rcvbuf->cnt >= lp->bufsiz) {
609
610
611 lp->rcp = lp->rcvbuf->data;
612 lp->rcvbuf->cnt = 0;
613 lp->rstate = TOOBIG;
614 }
615
616 if (lp->rstate == ACTIVE) {
617 *lp->rcp++ = rdscc(lp->cardbase, cmd, R8);
618 lp->rcvbuf->cnt++;
619 } else {
620
621 (void) rdscc(lp->cardbase, cmd, R8);
622 wrtscc(lp->cardbase, cmd, R0, ERR_RES);
623 lp->rstate = ACTIVE;
624 }
625 }
626 if (rse & END_FR) {
627
628 if (lp->rcvbuf->cnt > 0) {
629 if ((rse & CRC_ERR) || (lp->rstate > ACTIVE) || (lp->rcvbuf->cnt < 10)) {
630 if ((lp->rcvbuf->cnt >= 10) && (rse & CRC_ERR)) {
631 lp->stats.rx_crc_errors++;
632 }
633 lp->rcp = lp->rcvbuf->data;
634 lp->rcvbuf->cnt = 0;
635 } else {
636
637 pkt_len = lp->rcvbuf->cnt -= 2;
638 pkt_len += 1;
639
640
641 sksize = pkt_len;
642 skb = dev_alloc_skb(sksize);
643 if (skb == NULL) {
644 printk("PI: %s: Memory squeeze, dropping packet.\n", dev->name);
645 lp->stats.rx_dropped++;
646 restore_flags(flags);
647 return;
648 }
649 skb->dev = dev;
650
651
652 cfix=skb_put(skb,pkt_len);
653 *cfix++=0;
654
655 memcpy(cfix, lp->rcvbuf->data, pkt_len - 1);
656 skb->protocol=ntohs(ETH_P_AX25);
657 skb->mac.raw=skb->data;
658 IS_SKB(skb);
659 netif_rx(skb);
660 lp->stats.rx_packets++;
661
662 lp->rcp = lp->rcvbuf->data;
663 lp->rcvbuf->cnt = 0;
664
665 }
666 }
667 lp->rstate = ACTIVE;
668 }
669 restore_flags(flags);
670 }
671
672
673 static void b_txint(struct pi_local *lp)
674 {
675 unsigned long flags;
676 int cmd;
677 unsigned char c;
678
679 save_flags(flags);
680 cli();
681 cmd = CTL + lp->base;
682
683 switch (lp->tstate) {
684 case CRCOUT:
685 lp->tstate = FLAGOUT;
686 tdelay(lp, lp->squeldelay);
687 restore_flags(flags);
688 return;
689 case IDLE:
690
691 if ((lp->sndbuf = skb_dequeue(&lp->sndq)) == NULL) {
692
693
694
695 rts(lp, OFF);
696
697 restore_flags(flags);
698 return;
699 }
700 lp->txptr = lp->sndbuf->data;
701 lp->txptr++;
702 lp->txcnt = (int) lp->sndbuf->len - 1;
703
704 case DEFER:
705
706
707 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
708 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
709 if ((rdscc(lp->cardbase, cmd, R0) & DCD) != 0) {
710 lp->tstate = DEFER;
711 tdelay(lp, 100);
712
713 wrtscc(lp->cardbase, cmd, R15, CTSIE | DCDIE);
714 restore_flags(flags);
715 return;
716 }
717 if (random() > lp->persist) {
718 lp->tstate = DEFER;
719 tdelay(lp, lp->slotime);
720 restore_flags(flags);
721 return;
722 }
723 rts(lp, ON);
724 lp->tstate = ST_TXDELAY;
725 tdelay(lp, lp->txdelay);
726 restore_flags(flags);
727 return;
728
729 case ACTIVE:
730
731 if (lp->txcnt--) {
732 c = *lp->txptr++;
733
734 wrtscc(lp->cardbase, cmd, R8, c);
735
736 } else {
737
738 free_p(lp->sndbuf);
739 lp->sndbuf = NULL;
740 if ((rdscc(lp->cardbase, cmd, R0) & 0x40)) {
741
742
743 lp->stats.tx_errors++;
744 lp->stats.tx_fifo_errors++;
745 wrtscc(lp->cardbase, cmd, R0, SEND_ABORT);
746 lp->tstate = FLAGOUT;
747 tdelay(lp, lp->squeldelay);
748 restore_flags(flags);
749 return;
750 }
751 lp->tstate = UNDERRUN;
752
753 if (lp->speed) {
754 wrtscc(lp->cardbase, cmd, R10, CRCPS | NRZI);
755 } else {
756 wrtscc(lp->cardbase, cmd, R10, CRCPS);
757 }
758 wrtscc(lp->cardbase, cmd, R0, RES_Tx_P);
759 }
760 restore_flags(flags);
761 return;
762 }
763 restore_flags(flags);
764 }
765
766
767
768
769
770
771
772
773 static void b_exint(struct pi_local *lp)
774 {
775 unsigned long flags;
776 char st;
777 int cmd;
778 char c;
779
780 cmd = CTL + lp->base;
781 save_flags(flags);
782 cli();
783 st = rdscc(lp->cardbase, cmd, R0);
784
785 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
786
787
788 switch (lp->tstate) {
789 case ACTIVE:
790 free_p(lp->sndbuf);
791 lp->sndbuf = NULL;
792 wrtscc(lp->cardbase, cmd, R0, SEND_ABORT);
793 lp->tstate = FLAGOUT;
794 lp->stats.tx_errors++;
795 lp->stats.tx_fifo_errors++;
796 tdelay(lp, lp->squeldelay);
797 restore_flags(flags);
798 return;
799 case UNDERRUN:
800 lp->tstate = CRCOUT;
801 restore_flags(flags);
802 return;
803 case FLAGOUT:
804
805 if ((lp->sndbuf = skb_dequeue(&lp->sndq)) == NULL) {
806
807
808
809 rts(lp, OFF);
810 lp->tstate = IDLE;
811 restore_flags(flags);
812 return;
813 }
814 lp->txptr = lp->sndbuf->data;
815 lp->txptr++;
816 lp->txcnt = (int) lp->sndbuf->len - 1;
817
818 lp->txcnt--;
819 c = *lp->txptr++;
820 wrtscc(lp->cardbase, cmd, R0, RES_Tx_CRC);
821
822
823 if (lp->speed) {
824 wrtscc(lp->cardbase, cmd, R10, CRCPS | NRZI | ABUNDER);
825 } else {
826 wrtscc(lp->cardbase, cmd, R10, CRCPS | ABUNDER);
827 }
828
829 wrtscc(lp->cardbase, cmd, R8, c);
830 wrtscc(lp->cardbase, cmd, R0, RES_EOM_L);
831
832 #ifdef STUFF2
833
834 if (lp->txcnt) {
835 lp->txcnt--;
836 c = *lp->txptr++;
837
838 while((rdscc(lp->cardbase, cmd, R0) & 0x04) == 0)
839 ;
840 wrtscc(lp->cardbase, cmd, R8, c);
841 }
842 #endif
843
844
845
846 wrtscc(lp->cardbase, cmd, R15, TxUIE);
847 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
848 wrtscc(lp->cardbase, cmd, R1, TxINT_ENAB | EXT_INT_ENAB);
849
850 lp->tstate = ACTIVE;
851 restore_flags(flags);
852 return;
853
854 case DEFER:
855
856
857
858 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
859 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
860 if ((rdscc(lp->cardbase, cmd, R0) & DCD) != 0) {
861 lp->tstate = DEFER;
862 tdelay(lp, 100);
863
864 wrtscc(lp->cardbase, cmd, R15, CTSIE | DCDIE);
865 restore_flags(flags);
866 return;
867 }
868 if (random() > lp->persist) {
869 lp->tstate = DEFER;
870 tdelay(lp, lp->slotime);
871 restore_flags(flags);
872 return;
873 }
874 rts(lp, ON);
875 lp->tstate = ST_TXDELAY;
876 tdelay(lp, lp->txdelay);
877 restore_flags(flags);
878 return;
879
880 case ST_TXDELAY:
881
882
883 lp->txcnt--;
884 c = *lp->txptr++;
885 wrtscc(lp->cardbase, cmd, R0, RES_Tx_CRC);
886
887
888 if (lp->speed) {
889 wrtscc(lp->cardbase, cmd, R10, CRCPS | NRZI | ABUNDER);
890 } else {
891 wrtscc(lp->cardbase, cmd, R10, CRCPS | ABUNDER);
892 }
893
894 wrtscc(lp->cardbase, cmd, R8, c);
895 wrtscc(lp->cardbase, cmd, R0, RES_EOM_L);
896
897 #ifdef STUFF2
898
899 if (lp->txcnt) {
900 lp->txcnt--;
901 c = *lp->txptr++;
902
903 while((rdscc(lp->cardbase, cmd, R0) & 0x04) == 0)
904 ;
905 wrtscc(lp->cardbase, cmd, R8, c);
906 }
907 #endif
908
909
910
911 wrtscc(lp->cardbase, cmd, R15, TxUIE);
912 wrtscc(lp->cardbase, cmd, R0, RES_EXT_INT);
913
914 wrtscc(lp->cardbase, cmd, R1, TxINT_ENAB | EXT_INT_ENAB);
915
916 lp->tstate = ACTIVE;
917 restore_flags(flags);
918 return;
919 }
920
921
922
923
924
925
926 if ((lp->rstate == ACTIVE) && (st & BRK_ABRT)) {
927 (void) rdscc(lp->cardbase, cmd, R8);
928 (void) rdscc(lp->cardbase, cmd, R8);
929 (void) rdscc(lp->cardbase, cmd, R8);
930 lp->rcp = lp->rcvbuf->data;
931 lp->rcvbuf->cnt = 0;
932 }
933 restore_flags(flags);
934 }
935
936
937
938
939 static int hw_probe(int ioaddr)
940 {
941 int time = 1000;
942 unsigned long start_time, end_time;
943
944 int base, tmr0, tmr1, tmrcmd;
945 int a = 1;
946 int b = 1;
947
948 base = ioaddr & 0x3f0;
949 tmr0 = TMR0 + base;
950 tmr1 = TMR1 + base;
951 tmrcmd = TMRCMD + base;
952
953
954
955 outb_p(SC0 | LSB_MSB | MODE3, tmrcmd);
956 outb_p(922 & 0xFF, tmr0);
957 outb_p(922 >> 8, tmr0);
958
959
960 outb_p(SC1 | LSB_MSB | MODE0, tmrcmd);
961 outb_p((time << 1) & 0xFF, tmr1);
962 outb_p((time >> 7) & 0XFF, tmr1);
963
964
965 do {
966
967 outb_p(SC1, tmrcmd);
968 a = inb_p(tmr1);
969 b = inb_p(tmr1);
970 } while (b == 0);
971 start_time = jiffies;
972 while (b != 0) {
973
974 outb_p(SC1, tmrcmd);
975 a = inb_p(tmr1);
976 b = inb_p(tmr1);
977 end_time = jiffies;
978
979 if ((end_time - start_time) > 200)
980 return 0;
981 }
982 end_time = jiffies;
983
984 if ((end_time - start_time) > 65) {
985 return (1);
986 } else {
987
988
989
990 outb_p(SC0 | LSB_MSB | MODE3, tmrcmd);
991 outb_p(1844 & 0xFF, tmr0);
992 outb_p(1844 >> 8, tmr0);
993 return (2);
994 }
995 }
996
997 static void rts(struct pi_local *lp, int x)
998 {
999 int tc;
1000 long br;
1001 int cmd;
1002 int dummy;
1003
1004
1005 cmd = CTL + lp->base;
1006
1007
1008 if (x == ON) {
1009
1010 wrtscc(lp->cardbase, cmd, R15, 0);
1011 wrtscc(lp->cardbase, cmd, R3, Rx8);
1012 lp->rstate = IDLE;
1013 if (cmd & 2) {
1014
1015 wrtscc(lp->cardbase, cmd, R1, WT_FN_RDYFN | EXT_INT_ENAB);
1016 } else {
1017 wrtscc(lp->cardbase, cmd, R1, 0);
1018 }
1019
1020 if (!lp->clockmode) {
1021 if (lp->speed) {
1022 br = lp->speed;
1023 tc = (lp->xtal / br) - 2;
1024 wrtscc(lp->cardbase, cmd, R12, tc & 0xFF);
1025 wrtscc(lp->cardbase, cmd, R13, (tc >> 8) & 0xFF);
1026 }
1027 }
1028 wrtscc(lp->cardbase, cmd, R5, TxCRC_ENAB | RTS | TxENAB | Tx8 | DTR);
1029
1030 } else {
1031 lp->tstate = IDLE;
1032 wrtscc(lp->cardbase, cmd, R5, Tx8 | DTR);
1033
1034 if (!lp->clockmode) {
1035 if (lp->speed) {
1036
1037
1038 wrtscc(lp->cardbase, cmd, R14, BRSRC);
1039 br = lp->speed;
1040
1041 tc = ((lp->xtal / 32) / br) - 2;
1042 wrtscc(lp->cardbase, cmd, R12, tc & 0xFF);
1043 wrtscc(lp->cardbase, cmd, R13, (tc >> 8) & 0xFF);
1044
1045 wrtscc(lp->cardbase, cmd, R14, BRSRC | SEARCH);
1046
1047 wrtscc(lp->cardbase, cmd, R14, BRSRC | BRENABL);
1048 }
1049 }
1050
1051 wrtscc(lp->cardbase, cmd, R3, Rx8);
1052 wrtscc(lp->cardbase, cmd, R0, ERR_RES);
1053 dummy = rdscc(lp->cardbase, cmd, R1);
1054 (void) rdscc(lp->cardbase, cmd, R8);
1055 (void) rdscc(lp->cardbase, cmd, R8);
1056
1057 (void) rdscc(lp->cardbase, cmd, R8);
1058
1059
1060 wrtscc(lp->cardbase, cmd, R3, RxENABLE | Rx8);
1061 lp->rstate = ACTIVE;
1062
1063 if (cmd & 2) {
1064 setup_rx_dma(lp);
1065 } else {
1066
1067 lp->rcp = lp->rcvbuf->data;
1068 lp->rcvbuf->cnt = 0;
1069 wrtscc(lp->cardbase, cmd, R1, (INT_ALL_Rx | EXT_INT_ENAB));
1070 }
1071 wrtscc(lp->cardbase, cmd, R15, BRKIE);
1072 }
1073 }
1074
1075
1076 static int pi_header(struct sk_buff *skb, struct device *dev, unsigned short type,
1077 void *daddr, void *saddr, unsigned len)
1078 {
1079 return ax25_encapsulate(skb, dev, type, daddr, saddr, len);
1080 }
1081
1082
1083 static int pi_rebuild_header(void *buff, struct device *dev, unsigned long raddr,
1084 struct sk_buff *skb)
1085 {
1086 return ax25_rebuild_header(buff, dev, raddr, skb);
1087 }
1088
1089 static void scc_init(struct device *dev)
1090 {
1091 unsigned long flags;
1092 struct pi_local *lp = (struct pi_local *) dev->priv;
1093
1094 int tc;
1095 long br;
1096 register int cmd;
1097
1098
1099
1100 cmd = CTL + lp->base;
1101 save_flags(flags);
1102 cli();
1103
1104 switch (cmd & CHANA) {
1105 case CHANA:
1106 wrtscc(lp->cardbase, cmd, R9, CHRA);
1107 wrtscc(lp->cardbase, cmd, R2, 0xff);
1108 break;
1109 default:
1110 wrtscc(lp->cardbase, cmd, R9, CHRB);
1111 break;
1112 }
1113
1114
1115 wrtscc(lp->cardbase, cmd, R1, 0);
1116
1117
1118 wrtscc(lp->cardbase, cmd, R15, 0);
1119
1120
1121 wrtscc(lp->cardbase, cmd, R4, SDLC | X1CLK);
1122
1123
1124 if (lp->speed) {
1125 wrtscc(lp->cardbase, cmd, R10, CRCPS | NRZI);
1126 if (!lp->clockmode)
1127
1128 wrtscc(lp->cardbase, cmd, R11, TCBR | RCDPLL | TRxCDP | TRxCOI);
1129 else
1130
1131 wrtscc(lp->cardbase, cmd, R11, TCDPLL | RCDPLL | TRxCBR | TRxCOI);
1132 } else {
1133 wrtscc(lp->cardbase, cmd, R10, CRCPS);
1134
1135 wrtscc(lp->cardbase, cmd, R11, TCTRxCP);
1136 }
1137
1138
1139 wrtscc(lp->cardbase, cmd, R6, 0);
1140
1141
1142 wrtscc(lp->cardbase, cmd, R7, FLAG);
1143
1144
1145
1146
1147 wrtscc(lp->cardbase, cmd, R5, Tx8 | DTR);
1148
1149
1150 wrtscc(lp->cardbase, cmd, R3, Rx8);
1151
1152
1153 wrtscc(lp->cardbase, cmd, R14, BRSRC);
1154
1155
1156
1157 if (lp->speed) {
1158 br = lp->speed;
1159 tc = ((lp->xtal / 32) / br) - 2;
1160 } else {
1161 tc = 14;
1162 }
1163
1164 wrtscc(lp->cardbase, cmd, R12, tc & 0xFF);
1165 wrtscc(lp->cardbase, cmd, R13, (tc >> 8) & 0xFF);
1166
1167
1168 rts(lp, OFF);
1169
1170 if (lp->speed) {
1171
1172 wrtscc(lp->cardbase, cmd, R14, BRSRC | SSBR);
1173 } else {
1174
1175 wrtscc(lp->cardbase, cmd, R14, BRSRC | SSRTxC);
1176 }
1177 wrtscc(lp->cardbase, cmd, R14, BRSRC | SEARCH);
1178 wrtscc(lp->cardbase, cmd, R14, BRSRC | BRENABL);
1179
1180 if (!(cmd & 2))
1181 wrtscc(lp->cardbase, cmd, R1, (INT_ALL_Rx | EXT_INT_ENAB));
1182
1183 wrtscc(lp->cardbase, cmd, R15, BRKIE);
1184
1185
1186 wrtscc(lp->cardbase, cmd, R3, RxENABLE | RxCRC_ENAB | Rx8);
1187
1188 restore_flags(flags);
1189 }
1190
1191 static void chipset_init(struct device *dev)
1192 {
1193 int cardbase;
1194 unsigned long flags;
1195
1196 cardbase = dev->base_addr & 0x3f0;
1197
1198 save_flags(flags);
1199 cli();
1200 wrtscc(cardbase, dev->base_addr + CTL, R9, FHWRES);
1201
1202 wrtscc(cardbase, dev->base_addr + CTL, R9, 0);
1203 restore_flags(flags);
1204
1205 }
1206
1207
1208 int pi_init(void)
1209 {
1210 int *port;
1211 int ioaddr = 0;
1212 int card_type = 0;
1213 int ports[] =
1214 {0x380, 0x300, 0x320, 0x340, 0x360, 0x3a0, 0};
1215
1216 printk(version);
1217
1218
1219 for (port = &ports[0]; *port && !card_type; port++) {
1220 ioaddr = *port;
1221
1222 if (check_region(ioaddr, PI_TOTAL_SIZE) == 0) {
1223 printk("PI: Probing for card at address %#3x\n",ioaddr);
1224 card_type = hw_probe(ioaddr);
1225 }
1226 }
1227
1228 switch (card_type) {
1229 case 1:
1230 printk("PI: Found a PI card at address %#3x\n", ioaddr);
1231 break;
1232 case 2:
1233 printk("PI: Found a PI2 card at address %#3x\n", ioaddr);
1234 break;
1235 default:
1236 printk("PI: ERROR: No card found\n");
1237 return -EIO;
1238 }
1239
1240
1241
1242
1243
1244
1245
1246 register_netdev(&pi0a);
1247
1248 pi0a.priv = kmalloc(sizeof(struct pi_local) + (DMA_BUFF_SIZE + sizeof(struct mbuf)) * 4, GFP_KERNEL | GFP_DMA);
1249
1250 pi0a.dma = PI_DMA;
1251 pi0a.base_addr = ioaddr + 2;
1252 pi0a.irq = 0;
1253
1254
1255 register_netdev(&pi0b);
1256 pi0b.base_addr = ioaddr;
1257 pi0b.irq = 0;
1258 pi0b.priv = kmalloc(sizeof(struct pi_local) + (DMA_BUFF_SIZE + sizeof(struct mbuf)) * 4, GFP_KERNEL | GFP_DMA);
1259
1260
1261 pi_probe(&pi0a, card_type);
1262 pi_probe(&pi0b, card_type);
1263
1264 pi0b.irq = pi0a.irq;
1265
1266 return 0;
1267 }
1268
1269 static int valid_dma_page(unsigned long addr, unsigned long dev_buffsize)
1270 {
1271 if (((addr & 0xffff) + dev_buffsize) <= 0x10000)
1272 return 1;
1273 else
1274 return 0;
1275 }
1276
1277 static int pi_set_mac_address(struct device *dev, void *addr)
1278 {
1279 memcpy(dev->dev_addr, addr, 7);
1280 return 0;
1281 }
1282
1283
1284 static char *
1285 get_dma_buffer(unsigned long *mem_ptr)
1286 {
1287 char *ret;
1288
1289 ret = (char *)*mem_ptr;
1290
1291 if(!valid_dma_page(*mem_ptr, DMA_BUFF_SIZE + sizeof(struct mbuf))){
1292 *mem_ptr += (DMA_BUFF_SIZE + sizeof(struct mbuf));
1293 ret = (char *)*mem_ptr;
1294 }
1295 *mem_ptr += (DMA_BUFF_SIZE + sizeof(struct mbuf));
1296 return (ret);
1297 }
1298
1299 static int pi_probe(struct device *dev, int card_type)
1300 {
1301 short ioaddr;
1302 struct pi_local *lp;
1303 int i;
1304 unsigned long flags;
1305 unsigned long mem_ptr;
1306
1307 ioaddr = dev->base_addr;
1308
1309
1310
1311
1312 dev->priv = (void *) (((int) dev->priv + 7) & ~7);
1313 lp = (struct pi_local *) dev->priv;
1314
1315 memset(dev->priv, 0, sizeof(struct pi_local));
1316
1317
1318 mem_ptr = (unsigned long) dev->priv + sizeof(struct pi_local);
1319 lp->txdmabuf = get_dma_buffer(&mem_ptr);
1320 lp->rxdmabuf1 = (struct mbuf *) get_dma_buffer(&mem_ptr);
1321 lp->rxdmabuf2 = (struct mbuf *) get_dma_buffer(&mem_ptr);
1322
1323
1324 lp->rcvbuf = lp->rxdmabuf1;
1325 lp->rcp = lp->rcvbuf->data;
1326 lp->rcvbuf->cnt = 0;
1327
1328
1329 skb_queue_head_init(&lp->sndq);
1330
1331
1332 if (card_type == 1)
1333 lp->xtal = (unsigned long) SINGLE / 2;
1334 else
1335 lp->xtal = (unsigned long) DOUBLE / 2;
1336 lp->base = dev->base_addr;
1337 lp->cardbase = dev->base_addr & 0x3f0;
1338 if (dev->base_addr & CHANA) {
1339 lp->speed = DEF_A_SPEED;
1340
1341 lp->txdelay = DEF_A_TXDELAY;
1342 lp->persist = DEF_A_PERSIST;
1343 lp->slotime = DEF_A_SLOTIME;
1344 lp->squeldelay = DEF_A_SQUELDELAY;
1345 lp->clockmode = DEF_A_CLOCKMODE;
1346
1347 } else {
1348 lp->speed = DEF_B_SPEED;
1349
1350 lp->txdelay = DEF_B_TXDELAY;
1351 lp->persist = DEF_B_PERSIST;
1352 lp->slotime = DEF_B_SLOTIME;
1353 lp->squeldelay = DEF_B_SQUELDELAY;
1354 lp->clockmode = DEF_B_CLOCKMODE;
1355 }
1356 lp->bufsiz = DMA_BUFF_SIZE;
1357 lp->tstate = IDLE;
1358
1359 chipset_init(dev);
1360
1361 if (dev->base_addr & CHANA) {
1362
1363
1364 lp->dmachan = dev->dma;
1365 if (lp->dmachan < 1 || lp->dmachan > 3)
1366 printk("PI: DMA channel %d out of range\n", lp->dmachan);
1367
1368
1369
1370 if (dev->irq < 2) {
1371 autoirq_setup(0);
1372 save_flags(flags);
1373 cli();
1374 wrtscc(lp->cardbase, CTL + lp->base, R1, EXT_INT_ENAB);
1375
1376 wrtscc(lp->cardbase, CTL + lp->base, R9, MIE | NV);
1377 restore_flags(flags);
1378
1379 tdelay(lp, 1);
1380
1381 dev->irq = autoirq_report(20);
1382 if (!dev->irq) {
1383 printk(". Failed to detect IRQ line.\n");
1384 }
1385 save_flags(flags);
1386 cli();
1387 wrtscc(lp->cardbase, dev->base_addr + CTL, R9, FHWRES);
1388
1389 wrtscc(lp->cardbase, dev->base_addr + CTL, R9, 0);
1390 restore_flags(flags);
1391 }
1392
1393 printk("PI: Autodetected IRQ %d, assuming DMA %d.\n",
1394 dev->irq, dev->dma);
1395
1396
1397
1398
1399 {
1400 int irqval = request_irq(dev->irq, &pi_interrupt,0, "pi2");
1401 if (irqval) {
1402 printk("PI: unable to get IRQ %d (irqval=%d).\n",
1403 dev->irq, irqval);
1404 return EAGAIN;
1405 }
1406 }
1407
1408
1409 snarf_region(ioaddr & 0x3f0, PI_TOTAL_SIZE);
1410
1411
1412 }
1413 dev->open = pi_open;
1414 dev->stop = pi_close;
1415 dev->do_ioctl = pi_ioctl;
1416 dev->hard_start_xmit = pi_send_packet;
1417 dev->get_stats = pi_get_stats;
1418
1419
1420 for (i = 0; i < DEV_NUMBUFFS; i++)
1421 skb_queue_head_init(&dev->buffs[i]);
1422
1423
1424 dev->hard_header = pi_header;
1425 dev->rebuild_header = pi_rebuild_header;
1426 dev->set_mac_address = pi_set_mac_address;
1427
1428 dev->type = ARPHRD_AX25;
1429 dev->hard_header_len = 73;
1430 dev->mtu = 1500;
1431 dev->addr_len = 7;
1432 memcpy(dev->broadcast, ax25_bcast, 7);
1433 memcpy(dev->dev_addr, ax25_test, 7);
1434
1435
1436 dev->flags = 0;
1437 dev->family = AF_INET;
1438 dev->pa_addr = 0;
1439 dev->pa_brdaddr = 0;
1440 dev->pa_mask = 0;
1441 dev->pa_alen = 4;
1442
1443 return 0;
1444 }
1445
1446
1447
1448
1449
1450
1451
1452
1453 static int pi_open(struct device *dev)
1454 {
1455 unsigned long flags;
1456 static first_time = 1;
1457
1458 struct pi_local *lp = (struct pi_local *) dev->priv;
1459
1460 if (dev->base_addr & 2) {
1461 if (first_time) {
1462 if (request_dma(dev->dma,"pi2")) {
1463 free_irq(dev->irq);
1464 return -EAGAIN;
1465 }
1466 irq2dev_map[dev->irq] = dev;
1467 }
1468
1469 chipset_init(dev);
1470 }
1471 lp->tstate = IDLE;
1472
1473 if (dev->base_addr & 2) {
1474 scc_init(dev);
1475 scc_init(dev->next);
1476 }
1477
1478 save_flags(flags);
1479 cli();
1480 wrtscc(lp->cardbase, CTL + lp->base, R9, MIE | NV);
1481 restore_flags(flags);
1482
1483 lp->open_time = jiffies;
1484
1485 dev->tbusy = 0;
1486 dev->interrupt = 0;
1487 dev->start = 1;
1488 first_time = 0;
1489 return 0;
1490 }
1491
1492 static int pi_send_packet(struct sk_buff *skb, struct device *dev)
1493 {
1494 struct pi_local *lp = (struct pi_local *) dev->priv;
1495
1496
1497
1498
1499 if (skb == NULL) {
1500 dev_tint(dev);
1501 return 0;
1502 }
1503 hardware_send_packet(lp, skb);
1504 dev->trans_start = jiffies;
1505
1506 return 0;
1507 }
1508
1509
1510
1511 static void pi_interrupt(int reg_ptr, struct pt_regs *regs)
1512 {
1513
1514 struct pi_local *lp;
1515 int st;
1516 unsigned long flags;
1517
1518
1519
1520 #if 0
1521 if (dev_a == NULL) {
1522 printk("PI: pi_interrupt(): irq %d for unknown device.\n", irq);
1523 return;
1524 }
1525 #endif
1526
1527
1528
1529 lp = (struct pi_local *) pi0a.priv;
1530 while ((st = rdscc(lp->cardbase, pi0a.base_addr | CHANA | CTL, R3)) != 0) {
1531 if (st & CHBTxIP) {
1532
1533 lp = (struct pi_local *) pi0b.priv;
1534 b_txint(lp);
1535 } else if (st & CHARxIP) {
1536
1537 lp = (struct pi_local *) pi0a.priv;
1538 a_rxint(&pi0a, lp);
1539 } else if (st & CHATxIP) {
1540
1541 lp = (struct pi_local *) pi0a.priv;
1542 a_txint(lp);
1543 } else if (st & CHAEXT) {
1544
1545 lp = (struct pi_local *) pi0a.priv;
1546 a_exint(lp);
1547 } else if (st & CHBRxIP) {
1548
1549 lp = (struct pi_local *) pi0b.priv;
1550 b_rxint(&pi0b, lp);
1551 } else if (st & CHBEXT) {
1552
1553 lp = (struct pi_local *) pi0b.priv;
1554 b_exint(lp);
1555 }
1556
1557 save_flags(flags);
1558 cli();
1559 wrtscc(lp->cardbase, lp->base + CTL, R0, RES_H_IUS);
1560 restore_flags(flags);
1561 }
1562 return;
1563 }
1564
1565
1566 static int pi_close(struct device *dev)
1567 {
1568 unsigned long flags;
1569 struct pi_local *lp;
1570 struct sk_buff *ptr;
1571
1572 save_flags(flags);
1573 cli();
1574
1575 lp = (struct pi_local *) dev->priv;
1576 ptr = NULL;
1577
1578 chipset_init(dev);
1579 disable_dma(lp->dmachan);
1580
1581 lp->open_time = 0;
1582
1583 dev->tbusy = 1;
1584 dev->start = 0;
1585
1586
1587 while ((ptr = skb_dequeue(&lp->sndq)) != NULL)
1588 free_p(ptr);
1589
1590 restore_flags(flags);
1591 return 0;
1592 }
1593
1594 static int pi_ioctl(struct device *dev, struct ifreq *ifr, int cmd)
1595 {
1596 unsigned long flags;
1597 struct pi_req rq;
1598 struct pi_local *lp = (struct pi_local *) dev->priv;
1599
1600 int ret = verify_area(VERIFY_WRITE, ifr->ifr_data, sizeof(struct pi_req));
1601 if (ret)
1602 return ret;
1603
1604 if(cmd!=SIOCDEVPRIVATE)
1605 return -EINVAL;
1606
1607 memcpy_fromfs(&rq, ifr->ifr_data, sizeof(struct pi_req));
1608
1609 switch (rq.cmd) {
1610 case SIOCSPIPARAM:
1611
1612 if (!suser())
1613 return -EPERM;
1614 save_flags(flags);
1615 cli();
1616 lp->txdelay = rq.txdelay;
1617 lp->persist = rq.persist;
1618 lp->slotime = rq.slotime;
1619 lp->squeldelay = rq.squeldelay;
1620 lp->clockmode = rq.clockmode;
1621 lp->speed = rq.speed;
1622 pi_open(&pi0a);
1623 restore_flags(flags);
1624 ret = 0;
1625 break;
1626
1627 case SIOCSPIDMA:
1628
1629 if (!suser())
1630 return -EPERM;
1631 ret = 0;
1632 if (dev->base_addr & 2) {
1633 if (rq.dmachan < 1 || rq.dmachan > 3)
1634 return -EINVAL;
1635 save_flags(flags);
1636 cli();
1637 pi_close(dev);
1638 free_dma(lp->dmachan);
1639 dev->dma = lp->dmachan = rq.dmachan;
1640 if (request_dma(lp->dmachan,"pi2"))
1641 ret = -EAGAIN;
1642 pi_open(dev);
1643 restore_flags(flags);
1644 }
1645 break;
1646
1647 case SIOCSPIIRQ:
1648 ret = -EINVAL;
1649 break;
1650
1651 case SIOCGPIPARAM:
1652 case SIOCGPIDMA:
1653 case SIOCGPIIRQ:
1654
1655 rq.speed = lp->speed;
1656 rq.txdelay = lp->txdelay;
1657 rq.persist = lp->persist;
1658 rq.slotime = lp->slotime;
1659 rq.squeldelay = lp->squeldelay;
1660 rq.clockmode = lp->clockmode;
1661 rq.dmachan = lp->dmachan;
1662 rq.irq = dev->irq;
1663 memcpy_tofs(ifr->ifr_data, &rq, sizeof(struct pi_req));
1664 ret = 0;
1665 break;
1666
1667 default:
1668 ret = -EINVAL;
1669 }
1670 return ret;
1671 }
1672
1673
1674
1675 static struct netstats *
1676 pi_get_stats(struct device *dev)
1677 {
1678 struct pi_local *lp = (struct pi_local *) dev->priv;
1679
1680 return &lp->stats;
1681 }
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691