This source file includes following definitions.
- wavelan_splhi
- wavelan_splx
- hasr_read
- hacr_write
- hacr_write_slow
- set_chan_attn
- wavelan_reset
- wavelan_16_off
- wavelan_16_on
- wavelan_ints_off
- wavelan_ints_on
- psa_read
- psa_write
- obram_read
- obram_write
- mmc_read
- mmc_write
- wavelan_unmap_irq
- wavelan_map_irq
- wavelan_mmc_init
- wavelan_ack
- wavelan_synchronous_cmd
- wavelan_hardware_reset
- wavelan_struct_check
- wavelan_probe
- wavelan_probe1
- wavelan_ru_start
- wavelan_cu_start
- wavelan_open
- hardware_send_packet
- wavelan_send_packet
- addrcmp
- wavelan_receive
- wavelan_complete
- wavelan_watchdog
- wavelan_interrupt
- wavelan_close
- wavelan_get_stats
- wavelan_set_multicast_list
- sprintf_stats
- wavelan_get_info
- init_module
- cleanup_module
- wavelan_cu_show_one
- wavelan_psa_show
- wavelan_mmc_show
- wavelan_scb_show
- wavelan_ru_show
- wavelan_cu_show
- wavelan_dev_show
- wavelan_local_show
1
2
3
4
5
6
7 #include <linux/config.h>
8
9 #if defined(MODULE)
10 #include <linux/module.h>
11 #include <linux/version.h>
12 #endif
13
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/types.h>
17 #include <linux/fcntl.h>
18 #include <linux/interrupt.h>
19 #include <linux/stat.h>
20 #include <linux/ptrace.h>
21 #include <linux/ioport.h>
22 #include <linux/in.h>
23 #include <linux/string.h>
24 #include <linux/delay.h>
25 #include <asm/system.h>
26 #include <asm/bitops.h>
27 #include <asm/io.h>
28 #include <asm/dma.h>
29 #include <linux/errno.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/skbuff.h>
33 #include <linux/malloc.h>
34 #include <linux/timer.h>
35 #include <linux/proc_fs.h>
36 #define STRUCT_CHECK 1
37 #include "i82586.h"
38 #include "wavelan.h"
39
40 #ifndef WAVELAN_DEBUG
41 #define WAVELAN_DEBUG 0
42 #endif
43
44 #define WATCHDOG_JIFFIES 512
45 #define ENABLE_FULL_PROMISCUOUS 0x10000
46
47 #define nels(a) (sizeof(a) / sizeof(a[0]))
48
49 typedef struct device device;
50 typedef struct enet_statistics en_stats;
51 typedef struct net_local net_local;
52 typedef struct timer_list timer_list;
53
54 struct net_local
55 {
56 en_stats stats;
57 unsigned int tx_n_in_use;
58 unsigned char nwid[2];
59 unsigned short hacr;
60 unsigned short rx_head;
61 unsigned short rx_last;
62 unsigned short tx_first_free;
63 unsigned short tx_first_in_use;
64 unsigned int nresets;
65 unsigned int correct_nwid;
66 unsigned int wrong_nwid;
67 unsigned int promiscuous;
68 unsigned int full_promiscuous;
69 timer_list watchdog;
70 device *dev;
71 net_local *prev;
72 net_local *next;
73 };
74
75 extern int wavelan_probe(device *);
76
77 static const char *version = "wavelan.c:v7 95/4/8\n";
78
79
80
81
82 static int wavelan_probe1(device *, unsigned short);
83 static int wavelan_open(device *);
84 static int wavelan_send_packet(struct sk_buff *, device *);
85 static void wavelan_interrupt(int, struct pt_regs *);
86 static int wavelan_close(device *);
87 static en_stats *wavelan_get_stats(device *);
88 static void wavelan_set_multicast_list(device *, int, void *);
89 static int wavelan_get_info(char*, char**, off_t, int, int);
90
91
92
93
94 static void wavelan_cu_show_one(device *, net_local *, int, unsigned short);
95 static void wavelan_cu_start(device *);
96 static void wavelan_ru_start(device *);
97 static void wavelan_watchdog(unsigned long);
98 #if 0
99 static void wavelan_psa_show(psa_t *);
100 static void wavelan_mmc_show(unsigned short);
101 #endif
102 static void wavelan_scb_show(unsigned short);
103 static void wavelan_ru_show(device *);
104 static void wavelan_cu_show(device *);
105 static void wavelan_dev_show(device *);
106 static void wavelan_local_show(device *);
107
108 static unsigned int wavelan_debug = WAVELAN_DEBUG;
109 static net_local *first_wavelan = (net_local *)0;
110
111 static
112 unsigned long
113 wavelan_splhi(void)
114 {
115 unsigned long flags;
116
117 save_flags(flags);
118 cli();
119
120 return flags;
121 }
122
123 static
124 void
125 wavelan_splx(unsigned long flags)
126 {
127 restore_flags(flags);
128 }
129
130 static
131 unsigned short
132 hasr_read(unsigned short ioaddr)
133 {
134 return inw(HASR(ioaddr));
135 }
136
137 static
138 void
139 hacr_write(unsigned short ioaddr, int hacr)
140 {
141 outw(hacr, HACR(ioaddr));
142 }
143
144 static
145 void
146 hacr_write_slow(unsigned short ioaddr, int hacr)
147 {
148 hacr_write(ioaddr, hacr);
149
150 udelay(1000);
151 }
152
153
154
155
156 static
157 void
158 set_chan_attn(unsigned short ioaddr, unsigned short current_hacr)
159 {
160 hacr_write(ioaddr, current_hacr | HACR_CA);
161 }
162
163
164
165
166 static
167 void
168 wavelan_reset(unsigned short ioaddr)
169 {
170 hacr_write_slow(ioaddr, HACR_RESET);
171 hacr_write(ioaddr, HACR_DEFAULT);
172 }
173
174 static
175 void
176 wavelan_16_off(unsigned short ioaddr, unsigned short hacr)
177 {
178 hacr &= ~HACR_16BITS;
179
180 hacr_write(ioaddr, hacr);
181 }
182
183 static
184 void
185 wavelan_16_on(unsigned short ioaddr, unsigned short hacr)
186 {
187 hacr |= HACR_16BITS;
188
189 hacr_write(ioaddr, hacr);
190 }
191
192 static
193 void
194 wavelan_ints_off(device *dev)
195 {
196 unsigned short ioaddr;
197 net_local *lp;
198 unsigned long x;
199
200 ioaddr = dev->base_addr;
201 lp = (net_local *)dev->priv;
202
203 x = wavelan_splhi();
204
205 lp->hacr &= ~HACR_INTRON;
206 hacr_write(ioaddr, lp->hacr);
207
208 wavelan_splx(x);
209 }
210
211 static
212 void
213 wavelan_ints_on(device *dev)
214 {
215 unsigned short ioaddr;
216 net_local *lp;
217 unsigned long x;
218
219 ioaddr = dev->base_addr;
220 lp = (net_local *)dev->priv;
221
222 x = wavelan_splhi();
223
224 lp->hacr |= HACR_INTRON;
225 hacr_write(ioaddr, lp->hacr);
226
227 wavelan_splx(x);
228 }
229
230
231
232
233 static
234 void
235 psa_read(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
236 {
237 wavelan_16_off(ioaddr, hacr);
238
239 while (n-- > 0)
240 {
241 outw(o, PIOR2(ioaddr));
242 o++;
243 *b++ = inb(PIOP2(ioaddr));
244 }
245
246 wavelan_16_on(ioaddr, hacr);
247 }
248
249 #if defined(IRQ_SET_WORKS)
250
251
252
253 static
254 void
255 psa_write(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
256 {
257 wavelan_16_off(ioaddr, hacr);
258
259 while (n-- > 0)
260 {
261 outw(o, PIOR2(ioaddr));
262 o++;
263 outb(*b, PIOP2(ioaddr));
264 b++;
265 }
266
267 wavelan_16_on(ioaddr, hacr);
268 }
269 #endif
270
271
272
273
274 static
275 void
276 obram_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
277 {
278 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
279
280 outw(o, PIOR1(ioaddr));
281
282 insw(PIOP1(ioaddr), (unsigned short *)b, n);
283 }
284
285
286
287
288 static
289 void
290 obram_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
291 {
292 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
293
294 outw(o, PIOR1(ioaddr));
295
296 outsw(PIOP1(ioaddr), (unsigned short *)b, n);
297 }
298
299
300
301
302 static
303 void
304 mmc_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
305 {
306 while (n-- > 0)
307 {
308 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
309 ;
310
311 outw(o << 1, MMCR(ioaddr));
312 o++;
313
314 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
315 ;
316
317 *b++ = (unsigned char)(inw(MMCR(ioaddr)) >> 8);
318 }
319 }
320
321
322
323
324 static
325 void
326 mmc_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
327 {
328 while (n-- > 0)
329 {
330 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
331 ;
332
333 outw((unsigned short)(((unsigned short)*b << 8) | (o << 1) | 1), MMCR(ioaddr));
334 b++;
335 o++;
336 }
337 }
338
339 static int irqvals[] =
340 {
341 0, 0, 0, 0x01,
342 0x02, 0x04, 0, 0x08,
343 0, 0, 0x10, 0x20,
344 0x40, 0, 0, 0x80,
345 };
346
347 #if defined(IRQ_SET_WORKS)
348 static
349 int
350 wavelan_unmap_irq(int irq, unsigned char *irqval)
351 {
352 if (irq < 0 || irq >= nels(irqvals) || irqvals[irq] == 0)
353 return -1;
354
355 *irqval = (unsigned char)irqvals[irq];
356
357 return 0;
358 }
359 #endif
360
361
362
363
364 static
365 int
366 wavelan_map_irq(unsigned char irqval)
367 {
368 int irq;
369
370 for (irq = 0; irq < nels(irqvals); irq++)
371 {
372 if (irqvals[irq] == (int)irqval)
373 return irq;
374 }
375
376 return -1;
377 }
378
379
380
381
382 static
383 void
384 wavelan_mmc_init(device *dev, psa_t *psa)
385 {
386 unsigned short ioaddr;
387 net_local *lp;
388 mmw_t m;
389 int configured;
390
391 ioaddr = dev->base_addr;
392 lp = (net_local *)dev->priv;
393 memset(&m, 0x00, sizeof(m));
394
395
396
397
398
399
400
401
402
403 configured = 0;
404
405
406
407
408
409 m.mmw_jabber_enable = 0x01;
410 m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
411 m.mmw_ifs = 0x20;
412 m.mmw_mod_delay = 0x04;
413 m.mmw_jam_time = 0x38;
414
415 m.mmw_encr_enable = 0;
416 m.mmw_des_io_invert = 0;
417 m.mmw_freeze = 0;
418 m.mmw_decay_prm = 0;
419 m.mmw_decay_updat_prm = 0;
420
421 if (configured)
422 {
423
424
425
426 if (psa->psa_undefined & 1)
427 m.mmw_loopt_sel = 0x00;
428 else
429 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
430
431 m.mmw_thr_pre_set = psa->psa_thr_pre_set & 0x3F;
432 m.mmw_quality_thr = psa->psa_quality_thr & 0x0F;
433 }
434 else
435 {
436 if (lp->promiscuous && lp->full_promiscuous)
437 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
438 else
439 m.mmw_loopt_sel = 0x00;
440
441
442
443
444
445 if (psa->psa_comp_number & 1)
446 m.mmw_thr_pre_set = 0x01;
447 else
448 m.mmw_thr_pre_set = 0x04;
449
450 m.mmw_quality_thr = 0x03;
451 }
452
453 m.mmw_netw_id_l = lp->nwid[1];
454 m.mmw_netw_id_h = lp->nwid[0];
455
456 mmc_write(ioaddr, 0, (unsigned char *)&m, sizeof(m));
457 }
458
459 static
460 void
461 wavelan_ack(device *dev)
462 {
463 unsigned short ioaddr;
464 net_local *lp;
465 unsigned short scb_cs;
466 int i;
467
468 ioaddr = dev->base_addr;
469 lp = (net_local *)dev->priv;
470
471 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
472 scb_cs &= SCB_ST_INT;
473
474 if (scb_cs == 0)
475 return;
476
477 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
478
479 set_chan_attn(ioaddr, lp->hacr);
480
481 for (i = 1000; i > 0; i--)
482 {
483 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
484 if (scb_cs == 0)
485 break;
486
487 udelay(1000);
488 }
489
490 if (i <= 0)
491 printk("%s: wavelan_ack(): board not accepting command.\n", dev->name);
492 }
493
494
495
496
497
498 static
499 int
500 wavelan_synchronous_cmd(device *dev, const char *str)
501 {
502 unsigned short ioaddr;
503 net_local *lp;
504 unsigned short scb_cmd;
505 ach_t cb;
506 int i;
507
508 ioaddr = dev->base_addr;
509 lp = (net_local *)dev->priv;
510
511 scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO;
512 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
513
514 set_chan_attn(ioaddr, lp->hacr);
515
516 for (i = 64; i > 0; i--)
517 {
518 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
519 if (cb.ac_status & AC_SFLD_C)
520 break;
521
522 udelay(1000);
523 }
524
525 if (i <= 0 || !(cb.ac_status & AC_SFLD_OK))
526 {
527 printk("%s: %s failed; status = 0x%x\n", dev->name, str, cb.ac_status);
528 wavelan_scb_show(ioaddr);
529 return -1;
530 }
531
532 wavelan_ack(dev);
533
534 return 0;
535 }
536
537 static
538 int
539 wavelan_hardware_reset(device *dev)
540 {
541 unsigned short ioaddr;
542 psa_t psa;
543 net_local *lp;
544 scp_t scp;
545 iscp_t iscp;
546 scb_t scb;
547 ach_t cb;
548 int i;
549 ac_cfg_t cfg;
550 ac_ias_t ias;
551
552 if (wavelan_debug > 0)
553 printk("%s: ->wavelan_hardware_reset(dev=0x%x)\n", dev->name, (unsigned int)dev);
554
555 ioaddr = dev->base_addr;
556 lp = (net_local *)dev->priv;
557
558 lp->nresets++;
559
560 wavelan_reset(ioaddr);
561 lp->hacr = HACR_DEFAULT;
562
563
564
565
566 {
567 unsigned char zeroes[512];
568
569 memset(&zeroes[0], 0x00, sizeof(zeroes));
570
571 for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes))
572 obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes));
573 }
574
575 psa_read(ioaddr, lp->hacr, 0, (unsigned char *)&psa, sizeof(psa));
576
577 wavelan_mmc_init(dev, &psa);
578
579
580
581
582
583 memset(&scp, 0x00, sizeof(scp));
584 scp.scp_sysbus = SCP_SY_16BBUS;
585 scp.scp_iscpl = OFFSET_ISCP;
586 obram_write(ioaddr, OFFSET_SCP, (unsigned char *)&scp, sizeof(scp));
587
588 memset(&iscp, 0x00, sizeof(iscp));
589 iscp.iscp_busy = 1;
590 iscp.iscp_offset = OFFSET_SCB;
591 obram_write(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
592
593 memset(&scb, 0x00, sizeof(scb));
594 scb.scb_command = SCB_CMD_RESET;
595 scb.scb_cbl_offset = OFFSET_CU;
596 scb.scb_rfa_offset = OFFSET_RU;
597 obram_write(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
598
599 set_chan_attn(ioaddr, lp->hacr);
600
601 for (i = 1000; i > 0; i--)
602 {
603 obram_read(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
604
605 if (iscp.iscp_busy == (unsigned short)0)
606 break;
607
608 udelay(1000);
609 }
610
611 if (i <= 0)
612 {
613 printk("%s: wavelan_hardware_reset(): iscp_busy timeout.\n", dev->name);
614 if (wavelan_debug > 0)
615 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
616 return -1;
617 }
618
619 for (i = 15; i > 0; i--)
620 {
621 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
622
623 if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA))
624 break;
625
626 udelay(1000);
627 }
628
629 if (i <= 0)
630 {
631 printk("%s: wavelan_hardware_reset(): status: expected 0x%02x, got 0x%02x.\n", dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status);
632 if (wavelan_debug > 0)
633 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
634 return -1;
635 }
636
637 wavelan_ack(dev);
638
639 memset(&cb, 0x00, sizeof(cb));
640 cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose);
641 cb.ac_link = OFFSET_CU;
642 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
643
644 if (wavelan_synchronous_cmd(dev, "diag()") == -1)
645 {
646 if (wavelan_debug > 0)
647 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
648 return -1;
649 }
650
651 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
652 if (cb.ac_status & AC_SFLD_FAIL)
653 {
654 printk("%s: wavelan_hardware_reset(): i82586 Self Test failed.\n", dev->name);
655 if (wavelan_debug > 0)
656 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
657 return -1;
658 }
659
660 memset(&cfg, 0x00, sizeof(cfg));
661
662 #if 0
663
664
665
666 cfg.fifolim_bytecnt = 0x080c;
667 cfg.addrlen_mode = 0x2600;
668 cfg.linprio_interframe = 0x7820;
669 cfg.slot_time = 0xf00c;
670 cfg.hardware = 0x0008;
671 cfg.min_frame_len = 0x0040;
672 #endif
673
674
675
676
677
678
679 cfg.cfg_byte_cnt = AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t));
680 cfg.cfg_fifolim = AC_CFG_FIFOLIM(8);
681 cfg.cfg_byte8 = AC_CFG_SAV_BF(0) |
682 AC_CFG_SRDY(0);
683 cfg.cfg_byte9 = AC_CFG_ELPBCK(0) |
684 AC_CFG_ILPBCK(0) |
685 AC_CFG_PRELEN(AC_CFG_PLEN_2) |
686 AC_CFG_ALOC(1) |
687 AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE);
688 cfg.cfg_byte10 = AC_CFG_BOFMET(0) |
689 AC_CFG_ACR(0) |
690 AC_CFG_LINPRIO(0);
691 cfg.cfg_ifs = 32;
692 cfg.cfg_slotl = 0;
693 cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) |
694 AC_CFG_SLTTMHI(2);
695 cfg.cfg_byte14 = AC_CFG_FLGPAD(0) |
696 AC_CFG_BTSTF(0) |
697 AC_CFG_CRC16(0) |
698 AC_CFG_NCRC(0) |
699 AC_CFG_TNCRS(1) |
700 AC_CFG_MANCH(0) |
701 AC_CFG_BCDIS(0) |
702 AC_CFG_PRM(lp->promiscuous);
703 cfg.cfg_byte15 = AC_CFG_ICDS(0) |
704 AC_CFG_CDTF(0) |
705 AC_CFG_ICSS(0) |
706 AC_CFG_CSTF(0);
707
708
709
710 cfg.cfg_min_frm_len = AC_CFG_MNFRM(8);
711
712 cfg.cfg_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_configure);
713 cfg.cfg_h.ac_link = OFFSET_CU;
714 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cfg, sizeof(cfg));
715
716 if (wavelan_synchronous_cmd(dev, "reset()-configure") == -1)
717 {
718 if (wavelan_debug > 0)
719 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
720
721 return -1;
722 }
723
724 memset(&ias, 0x00, sizeof(ias));
725 ias.ias_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_ia_setup);
726 ias.ias_h.ac_link = OFFSET_CU;
727 memcpy(&ias.ias_addr[0], (unsigned char *)&dev->dev_addr[0], sizeof(ias.ias_addr));
728 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&ias, sizeof(ias));
729
730 if (wavelan_synchronous_cmd(dev, "reset()-address") == -1)
731 {
732 if (wavelan_debug > 0)
733 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
734
735 return -1;
736 }
737
738 wavelan_ints_on(dev);
739
740 if (wavelan_debug > 4)
741 wavelan_scb_show(ioaddr);
742
743 wavelan_ru_start(dev);
744 wavelan_cu_start(dev);
745
746 if (wavelan_debug > 0)
747 printk("%s: <-wavelan_hardware_reset(): 0\n", dev->name);
748
749 return 0;
750 }
751
752 #if STRUCT_CHECK == 1
753
754 static
755 const char *
756 wavelan_struct_check(void)
757 {
758 #define SC(t,s,n) if (sizeof(t) != s) return n
759 SC(psa_t, PSA_SIZE, "psa_t");
760 SC(mmw_t, MMW_SIZE, "mmw_t");
761 SC(mmr_t, MMR_SIZE, "mmr_t");
762 SC(ha_t, HA_SIZE, "ha_t");
763 #undef SC
764
765 return (char *)0;
766 }
767
768 #endif
769
770
771
772
773
774
775
776
777 int
778 wavelan_probe(device *dev)
779 {
780 int i;
781 int r;
782 short base_addr;
783 static unsigned short iobase[] =
784 {
785 #if 0
786 Leave out 0x3C0 for now -- seems to clash
787 with some video controllers.
788 Leave out the others too -- we will always
789 use 0x390 and leave 0x300 for the Ethernet device.
790 0x300, 0x390, 0x3E0, 0x3C0,
791 #endif
792 0x390,
793 };
794
795 if (wavelan_debug > 0)
796 printk("%s: ->wavelan_probe(dev=0x%x (base_addr=0x%x))\n", dev->name, (unsigned int)dev, (unsigned int)dev->base_addr);
797
798 #if STRUCT_CHECK == 1
799 if (wavelan_struct_check() != (char *)0)
800 {
801 printk("%s: structure/compiler botch: \"%s\"\n", dev->name, wavelan_struct_check());
802
803 if (wavelan_debug > 0)
804 printk("%s: <-wavelan_probe(): ENODEV\n", dev->name);
805
806 return ENODEV;
807 }
808 #endif
809
810 base_addr = dev->base_addr;
811
812 if (base_addr < 0)
813 {
814
815
816
817 if (wavelan_debug > 0)
818 printk("%s: <-wavelan_probe(): ENXIO\n", dev->name);
819 return ENXIO;
820 }
821
822 if (base_addr > 0x100)
823 {
824
825
826
827 r = wavelan_probe1(dev, base_addr);
828 if (wavelan_debug > 0)
829 printk("%s: <-wavelan_probe(): %d\n", dev->name, r);
830 return r;
831 }
832
833 for (i = 0; i < nels(iobase); i++)
834 {
835 if (check_region(iobase[i], sizeof(ha_t)))
836 continue;
837
838 if (wavelan_probe1(dev, iobase[i]) == 0)
839 {
840 if (wavelan_debug > 0)
841 printk("%s: <-wavelan_probe(): 0\n", dev->name);
842 proc_net_register(&(struct proc_dir_entry) {
843 PROC_NET_WAVELAN, 7, "wavelan",
844 S_IFREG | S_IRUGO, 1, 0, 0,
845 0, &proc_net_inode_operations,
846 wavelan_get_info
847 });
848
849 return 0;
850 }
851 }
852
853 if (wavelan_debug > 0)
854 printk("%s: <-wavelan_probe(): ENODEV\n", dev->name);
855
856 return ENODEV;
857 }
858
859 static
860 int
861 wavelan_probe1(device *dev, unsigned short ioaddr)
862 {
863 psa_t psa;
864 int irq;
865 int i;
866 net_local *lp;
867 int enable_full_promiscuous;
868
869 if (wavelan_debug > 0)
870 printk("%s: ->wavelan_probe1(dev=0x%x, ioaddr=0x%x)\n", dev->name, (unsigned int)dev, ioaddr);
871
872 wavelan_reset(ioaddr);
873
874 psa_read(ioaddr, HACR_DEFAULT, 0, (unsigned char *)&psa, sizeof(psa));
875
876
877
878
879
880 if
881 (
882 psa.psa_univ_mac_addr[0] != SA_ADDR0
883 ||
884 psa.psa_univ_mac_addr[1] != SA_ADDR1
885 ||
886 psa.psa_univ_mac_addr[2] != SA_ADDR2
887 )
888 {
889 if (wavelan_debug > 0)
890 printk("%s: <-wavelan_probe1(): ENODEV\n", dev->name);
891 return ENODEV;
892 }
893
894 printk("%s: WaveLAN at %#x,", dev->name, ioaddr);
895
896 if (dev->irq != 0)
897 {
898 printk("[WARNING: explicit IRQ value %d ignored: using PSA value instead]", dev->irq);
899 #if defined(IRQ_SET_WORKS)
900 Leave this out until I can get it to work -- BJ.
901 if (wavelan_unmap_irq(dev->irq, &psa.psa_int_req_no) == -1)
902 {
903 printk(" could not wavelan_unmap_irq(%d, ..) -- ignored.\n", dev->irq);
904 dev->irq = 0;
905 }
906 else
907 {
908 psa_write(ioaddr, HACR_DEFAULT, (char *)&psa.psa_int_req_no - (char *)&psa, (unsigned char *)&psa.psa_int_req_no, sizeof(psa.psa_int_req_no));
909 wavelan_reset(ioaddr);
910 }
911 #endif
912 }
913
914 if ((irq = wavelan_map_irq(psa.psa_int_req_no)) == -1)
915 {
916 printk(" could not wavelan_map_irq(%d).\n", psa.psa_int_req_no);
917 if (wavelan_debug > 0)
918 printk("%s: <-wavelan_probe1(): EAGAIN\n", dev->name);
919 return EAGAIN;
920 }
921
922 dev->irq = irq;
923
924 request_region(ioaddr, sizeof(ha_t), "wavelan");
925 dev->base_addr = ioaddr;
926
927
928
929
930
931
932
933
934
935
936
937
938 enable_full_promiscuous = (dev->mem_start & ENABLE_FULL_PROMISCUOUS) == ENABLE_FULL_PROMISCUOUS;
939 dev->mem_start &= ~ENABLE_FULL_PROMISCUOUS;
940
941 if (dev->mem_start != 0)
942 {
943 psa.psa_nwid[0] = (dev->mem_start >> 8) & 0xFF;
944 psa.psa_nwid[1] = (dev->mem_start >> 0) & 0xFF;
945 }
946
947 dev->mem_start = 0x0000;
948 dev->mem_end = 0x0000;
949 dev->if_port = 0;
950
951 memcpy(&dev->dev_addr[0], &psa.psa_univ_mac_addr[0], WAVELAN_ADDR_SIZE);
952
953 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
954 printk("%s%02x", (i == 0) ? " " : ":", dev->dev_addr[i]);
955
956 printk(", IRQ %d", dev->irq);
957 if (enable_full_promiscuous)
958 printk(", promisc");
959 printk(", nwid 0x%02x%02x", psa.psa_nwid[0], psa.psa_nwid[1]);
960
961 printk(", PC");
962 switch (psa.psa_comp_number)
963 {
964 case PSA_COMP_PC_AT_915:
965 case PSA_COMP_PC_AT_2400:
966 printk("-AT");
967 break;
968
969 case PSA_COMP_PC_MC_915:
970 case PSA_COMP_PC_MC_2400:
971 printk("-MC");
972 break;
973
974 case PSA_COMP_PCMCIA_915:
975 printk("MCIA");
976 break;
977
978 default:
979 printk("???");
980 break;
981 }
982
983 printk(", ");
984 switch (psa.psa_subband)
985 {
986 case PSA_SUBBAND_915:
987 printk("915");
988 break;
989
990 case PSA_SUBBAND_2425:
991 printk("2425");
992 break;
993
994 case PSA_SUBBAND_2460:
995 printk("2460");
996 break;
997
998 case PSA_SUBBAND_2484:
999 printk("2484");
1000 break;
1001
1002 case PSA_SUBBAND_2430_5:
1003 printk("2430.5");
1004 break;
1005
1006 default:
1007 printk("???");
1008 break;
1009 }
1010 printk(" MHz");
1011
1012 printk("\n");
1013
1014 if (wavelan_debug > 0)
1015 printk(version);
1016
1017 dev->priv = kmalloc(sizeof(net_local), GFP_KERNEL);
1018 if (dev->priv == NULL)
1019 return -ENOMEM;
1020 memset(dev->priv, 0x00, sizeof(net_local));
1021 lp = (net_local *)dev->priv;
1022
1023 if (first_wavelan == (net_local *)0)
1024 {
1025 first_wavelan = lp;
1026 lp->prev = lp;
1027 lp->next = lp;
1028 }
1029 else
1030 {
1031 lp->prev = first_wavelan->prev;
1032 lp->next = first_wavelan;
1033 first_wavelan->prev->next = lp;
1034 first_wavelan->prev = lp;
1035 }
1036 lp->dev = dev;
1037
1038 lp->hacr = HACR_DEFAULT;
1039
1040 lp->full_promiscuous = enable_full_promiscuous;
1041 lp->nwid[0] = psa.psa_nwid[0];
1042 lp->nwid[1] = psa.psa_nwid[1];
1043
1044 lp->watchdog.function = wavelan_watchdog;
1045 lp->watchdog.data = (unsigned long)dev;
1046
1047 dev->open = wavelan_open;
1048 dev->stop = wavelan_close;
1049 dev->hard_start_xmit = wavelan_send_packet;
1050 dev->get_stats = wavelan_get_stats;
1051 dev->set_multicast_list = &wavelan_set_multicast_list;
1052
1053
1054
1055
1056
1057 ether_setup(dev);
1058
1059 dev->mtu = WAVELAN_MTU;
1060
1061 if (wavelan_debug > 0)
1062 printk("%s: <-wavelan_probe1(): 0\n", dev->name);
1063
1064 return 0;
1065 }
1066
1067
1068
1069
1070
1071 static
1072 void
1073 wavelan_ru_start(device *dev)
1074 {
1075 unsigned short ioaddr;
1076 net_local *lp;
1077 unsigned short scb_cs;
1078 fd_t fd;
1079 rbd_t rbd;
1080 unsigned short rx;
1081 unsigned short rx_next;
1082 int i;
1083
1084 ioaddr = dev->base_addr;
1085 lp = (net_local *)dev->priv;
1086
1087 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
1088 if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY)
1089 return;
1090
1091 lp->rx_head = OFFSET_RU;
1092
1093 for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next)
1094 {
1095 rx_next = (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ;
1096
1097 fd.fd_status = 0;
1098 fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0;
1099 fd.fd_link_offset = rx_next;
1100 fd.fd_rbd_offset = rx + sizeof(fd);
1101 obram_write(ioaddr, rx, (unsigned char *)&fd, sizeof(fd));
1102
1103 rbd.rbd_status = 0;
1104 rbd.rbd_next_rbd_offset = I82586NULL;
1105 rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd);
1106 rbd.rbd_bufh = 0;
1107 rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ);
1108 obram_write(ioaddr, rx + sizeof(fd), (unsigned char *)&rbd, sizeof(rbd));
1109
1110 lp->rx_last = rx;
1111 }
1112
1113 obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset), (unsigned char *)&lp->rx_head, sizeof(lp->rx_head));
1114
1115 scb_cs = SCB_CMD_RUC_GO;
1116 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1117
1118 set_chan_attn(ioaddr, lp->hacr);
1119
1120 for (i = 1000; i > 0; i--)
1121 {
1122 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1123 if (scb_cs == 0)
1124 break;
1125
1126 udelay(1000);
1127 }
1128
1129 if (i <= 0)
1130 printk("%s: wavelan_ru_start(): board not accepting command.\n", dev->name);
1131 }
1132
1133
1134
1135
1136
1137
1138 static
1139 void
1140 wavelan_cu_start(device *dev)
1141 {
1142 unsigned short ioaddr;
1143 net_local *lp;
1144 int i;
1145 unsigned short txblock;
1146 unsigned short first_nop;
1147 unsigned short scb_cs;
1148
1149 ioaddr = dev->base_addr;
1150 lp = (net_local *)dev->priv;
1151
1152 lp->tx_first_free = OFFSET_CU;
1153 lp->tx_first_in_use = I82586NULL;
1154
1155 for
1156 (
1157 i = 0, txblock = OFFSET_CU;
1158 i < NTXBLOCKS;
1159 i++, txblock += TXBLOCKZ
1160 )
1161 {
1162 ac_tx_t tx;
1163 ac_nop_t nop;
1164 tbd_t tbd;
1165 unsigned short tx_addr;
1166 unsigned short nop_addr;
1167 unsigned short tbd_addr;
1168 unsigned short buf_addr;
1169
1170 tx_addr = txblock;
1171 nop_addr = tx_addr + sizeof(tx);
1172 tbd_addr = nop_addr + sizeof(nop);
1173 buf_addr = tbd_addr + sizeof(tbd);
1174
1175 tx.tx_h.ac_status = 0;
1176 tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I;
1177 tx.tx_h.ac_link = nop_addr;
1178 tx.tx_tbd_offset = tbd_addr;
1179 obram_write(ioaddr, tx_addr, (unsigned char *)&tx, sizeof(tx));
1180
1181 nop.nop_h.ac_status = 0;
1182 nop.nop_h.ac_command = acmd_nop;
1183 nop.nop_h.ac_link = nop_addr;
1184 obram_write(ioaddr, nop_addr, (unsigned char *)&nop, sizeof(nop));
1185
1186 tbd.tbd_status = TBD_STATUS_EOF;
1187 tbd.tbd_next_bd_offset = I82586NULL;
1188 tbd.tbd_bufl = buf_addr;
1189 tbd.tbd_bufh = 0;
1190 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1191 }
1192
1193 first_nop = OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t);
1194 obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset), (unsigned char *)&first_nop, sizeof(first_nop));
1195
1196 scb_cs = SCB_CMD_CUC_GO;
1197 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1198
1199 set_chan_attn(ioaddr, lp->hacr);
1200
1201 for (i = 1000; i > 0; i--)
1202 {
1203 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1204 if (scb_cs == 0)
1205 break;
1206
1207 udelay(1000);
1208 }
1209
1210 if (i <= 0)
1211 printk("%s: wavelan_cu_start(): board not accepting command.\n", dev->name);
1212
1213 lp->tx_n_in_use = 0;
1214 dev->tbusy = 0;
1215 }
1216
1217 static
1218 int
1219 wavelan_open(device *dev)
1220 {
1221 unsigned short ioaddr;
1222 net_local *lp;
1223 unsigned long x;
1224 int r;
1225
1226 if (wavelan_debug > 0)
1227 printk("%s: ->wavelan_open(dev=0x%x)\n", dev->name, (unsigned int)dev);
1228
1229 ioaddr = dev->base_addr;
1230 lp = (net_local *)dev->priv;
1231
1232 if (dev->irq == 0)
1233 {
1234 if (wavelan_debug > 0)
1235 printk("%s: <-wavelan_open(): -ENXIO\n", dev->name);
1236 return -ENXIO;
1237 }
1238
1239 if
1240 (
1241 irq2dev_map[dev->irq] != (device *)0
1242
1243 ||
1244 (irq2dev_map[dev->irq] = dev) == (device *)0
1245 ||
1246 request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN") != 0
1247 )
1248 {
1249 irq2dev_map[dev->irq] = (device *)0;
1250 if (wavelan_debug > 0)
1251 printk("%s: <-wavelan_open(): -EAGAIN\n", dev->name);
1252 return -EAGAIN;
1253 }
1254
1255 x = wavelan_splhi();
1256 if ((r = wavelan_hardware_reset(dev)) != -1)
1257 {
1258 dev->interrupt = 0;
1259 dev->start = 1;
1260 }
1261 wavelan_splx(x);
1262
1263 if (r == -1)
1264 {
1265 free_irq(dev->irq);
1266 irq2dev_map[dev->irq] = (device *)0;
1267 if (wavelan_debug > 0)
1268 printk("%s: <-wavelan_open(): -EAGAIN(2)\n", dev->name);
1269 return -EAGAIN;
1270 }
1271
1272 #if defined(MODULE)
1273 MOD_INC_USE_COUNT;
1274 #endif
1275
1276 if (wavelan_debug > 0)
1277 printk("%s: <-wavelan_open(): 0\n", dev->name);
1278
1279 return 0;
1280 }
1281
1282 static
1283 void
1284 hardware_send_packet(device *dev, void *buf, short length)
1285 {
1286 unsigned short ioaddr;
1287 net_local *lp;
1288 unsigned short txblock;
1289 unsigned short txpred;
1290 unsigned short tx_addr;
1291 unsigned short nop_addr;
1292 unsigned short tbd_addr;
1293 unsigned short buf_addr;
1294 ac_tx_t tx;
1295 ac_nop_t nop;
1296 tbd_t tbd;
1297 unsigned long x;
1298
1299 ioaddr = dev->base_addr;
1300 lp = (net_local *)dev->priv;
1301
1302 x = wavelan_splhi();
1303
1304 txblock = lp->tx_first_free;
1305 txpred = txblock - TXBLOCKZ;
1306 if (txpred < OFFSET_CU)
1307 txpred += NTXBLOCKS * TXBLOCKZ;
1308 lp->tx_first_free += TXBLOCKZ;
1309 if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1310 lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
1311
1312
1313
1314
1315
1316
1317 lp->tx_n_in_use++;
1318
1319 tx_addr = txblock;
1320 nop_addr = tx_addr + sizeof(tx);
1321 tbd_addr = nop_addr + sizeof(nop);
1322 buf_addr = tbd_addr + sizeof(tbd);
1323
1324
1325
1326
1327 tx.tx_h.ac_status = 0;
1328 obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status), (unsigned char *)&tx.tx_h.ac_status, sizeof(tx.tx_h.ac_status));
1329
1330
1331
1332
1333 nop.nop_h.ac_status = 0;
1334 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1335 nop.nop_h.ac_link = nop_addr;
1336 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1337
1338
1339
1340
1341 tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & length);
1342 tbd.tbd_next_bd_offset = I82586NULL;
1343 tbd.tbd_bufl = buf_addr;
1344 tbd.tbd_bufh = 0;
1345 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1346
1347
1348
1349
1350 obram_write(ioaddr, buf_addr, buf, length);
1351
1352
1353
1354
1355
1356 nop_addr = txpred + sizeof(tx);
1357 nop.nop_h.ac_status = 0;
1358 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1359 nop.nop_h.ac_link = txblock;
1360 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1361
1362 if (lp->tx_first_in_use == I82586NULL)
1363 lp->tx_first_in_use = txblock;
1364
1365 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1366 dev->tbusy = 0;
1367
1368 dev->trans_start = jiffies;
1369
1370 if (lp->watchdog.next == (timer_list *)0)
1371 wavelan_watchdog((unsigned long)dev);
1372
1373 wavelan_splx(x);
1374
1375 if (wavelan_debug > 4)
1376 {
1377 unsigned char *a;
1378
1379 a = (unsigned char *)buf;
1380
1381 printk
1382 (
1383 "%s: tx: dest %02x:%02x:%02x:%02x:%02x:%02x, length %d, tbd.tbd_bufl 0x%x.\n",
1384 dev->name,
1385 a[0], a[1], a[2], a[3], a[4], a[5],
1386 length,
1387 buf_addr
1388 );
1389 }
1390 }
1391
1392 static
1393 int
1394 wavelan_send_packet(struct sk_buff *skb, device *dev)
1395 {
1396 unsigned short ioaddr;
1397
1398 ioaddr = dev->base_addr;
1399
1400 if (dev->tbusy)
1401 {
1402
1403
1404
1405
1406 int tickssofar;
1407
1408 tickssofar = jiffies - dev->trans_start;
1409
1410
1411
1412
1413
1414
1415
1416
1417 return 1;
1418
1419 wavelan_scb_show(ioaddr);
1420 wavelan_ru_show(dev);
1421 wavelan_cu_show(dev);
1422 wavelan_dev_show(dev);
1423 wavelan_local_show(dev);
1424
1425 printk("%s: transmit timed out -- resetting board.\n", dev->name);
1426
1427 (void)wavelan_hardware_reset(dev);
1428 }
1429
1430
1431
1432
1433
1434
1435 if (skb == (struct sk_buff *)0)
1436 {
1437 dev_tint(dev);
1438 return 0;
1439 }
1440
1441
1442
1443
1444 if (set_bit(0, (void *)&dev->tbusy) == 0)
1445 {
1446 short length;
1447 unsigned char *buf;
1448
1449 length = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
1450 buf = skb->data;
1451
1452 hardware_send_packet(dev, buf, length);
1453 }
1454 else
1455 printk("%s: Transmitter access conflict.\n", dev->name);
1456
1457 dev_kfree_skb(skb, FREE_WRITE);
1458
1459 return 0;
1460 }
1461
1462 #if 0
1463 static
1464 int
1465 addrcmp(unsigned char *a0, unsigned char *a1)
1466 {
1467 int i;
1468
1469 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1470 {
1471 if (a0[i] != a1[i])
1472 return a0[i] - a1[i];
1473 }
1474
1475 return 0;
1476 }
1477 #endif
1478
1479
1480
1481
1482
1483
1484 static
1485 void
1486 wavelan_receive(device *dev)
1487 {
1488 unsigned short ioaddr;
1489 net_local *lp;
1490 int nreaped;
1491
1492 ioaddr = dev->base_addr;
1493 lp = (net_local *)dev->priv;
1494 nreaped = 0;
1495
1496 for (;;)
1497 {
1498 fd_t fd;
1499 rbd_t rbd;
1500 ushort pkt_len;
1501 int sksize;
1502 struct sk_buff *skb;
1503
1504 obram_read(ioaddr, lp->rx_head, (unsigned char *)&fd, sizeof(fd));
1505
1506 if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C)
1507 break;
1508
1509 nreaped++;
1510
1511 if
1512 (
1513 (fd.fd_status & (FD_STATUS_B | FD_STATUS_OK))
1514 !=
1515 (FD_STATUS_B | FD_STATUS_OK)
1516 )
1517 {
1518
1519
1520
1521
1522
1523
1524
1525 if ((fd.fd_status & FD_STATUS_OK) != FD_STATUS_OK)
1526 printk("%s: frame not received successfully.\n", dev->name);
1527 }
1528
1529 if ((fd.fd_status & (FD_STATUS_S6 | FD_STATUS_S7 | FD_STATUS_S8 | FD_STATUS_S9 | FD_STATUS_S10 | FD_STATUS_S11)) != 0)
1530 {
1531 lp->stats.rx_errors++;
1532
1533 if ((fd.fd_status & FD_STATUS_S6) != 0)
1534 printk("%s: no EOF flag.\n", dev->name);
1535
1536 if ((fd.fd_status & FD_STATUS_S7) != 0)
1537 {
1538 lp->stats.rx_length_errors++;
1539 printk("%s: frame too short.\n", dev->name);
1540 }
1541
1542 if ((fd.fd_status & FD_STATUS_S8) != 0)
1543 {
1544 lp->stats.rx_over_errors++;
1545 printk("%s: rx DMA overrun.\n", dev->name);
1546 }
1547
1548 if ((fd.fd_status & FD_STATUS_S9) != 0)
1549 {
1550 lp->stats.rx_fifo_errors++;
1551 printk("%s: ran out of resources.\n", dev->name);
1552 }
1553
1554 if ((fd.fd_status & FD_STATUS_S10) != 0)
1555 {
1556 lp->stats.rx_frame_errors++;
1557 printk("%s: alignment error.\n", dev->name);
1558 }
1559
1560 if ((fd.fd_status & FD_STATUS_S11) != 0)
1561 {
1562 lp->stats.rx_crc_errors++;
1563 printk("%s: CRC error.\n", dev->name);
1564 }
1565 }
1566
1567 if (fd.fd_rbd_offset == I82586NULL)
1568 printk("%s: frame has no data.\n", dev->name);
1569 else
1570 {
1571 obram_read(ioaddr, fd.fd_rbd_offset, (unsigned char *)&rbd, sizeof(rbd));
1572
1573 if ((rbd.rbd_status & RBD_STATUS_EOF) != RBD_STATUS_EOF)
1574 printk("%s: missing EOF flag.\n", dev->name);
1575
1576 if ((rbd.rbd_status & RBD_STATUS_F) != RBD_STATUS_F)
1577 printk("%s: missing F flag.\n", dev->name);
1578
1579 pkt_len = rbd.rbd_status & RBD_STATUS_ACNT;
1580
1581 #if 0
1582 {
1583 unsigned char addr[WAVELAN_ADDR_SIZE];
1584 int i;
1585 static unsigned char toweraddr[WAVELAN_ADDR_SIZE] =
1586 {
1587 0x08, 0x00, 0x0e, 0x20, 0x3e, 0xd3,
1588 };
1589
1590 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1591 if
1592 (
1593
1594
1595
1596
1597 addrcmp(&addr[0], toweraddr) != 0
1598 )
1599 {
1600 printk("%s: foreign MAC source addr=", dev->name);
1601 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1602 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1603 printk("\n");
1604 }
1605 }
1606 #endif
1607
1608 if (wavelan_debug > 5)
1609 {
1610 unsigned char addr[WAVELAN_ADDR_SIZE];
1611 unsigned short ltype;
1612 int i;
1613
1614 #if 0
1615 printk("%s: fd_dest=", dev->name);
1616 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1617 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_dest[i]);
1618 printk("\n");
1619
1620 printk("%s: fd_src=", dev->name);
1621 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1622 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_src[i]);
1623 printk("\n");
1624 printk("%s: fd_length=%d\n", dev->name, fd.fd_length);
1625 #endif
1626
1627 obram_read(ioaddr, rbd.rbd_bufl, &addr[0], sizeof(addr));
1628 printk("%s: dest=", dev->name);
1629 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1630 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1631 printk("\n");
1632
1633 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1634 printk("%s: src=", dev->name);
1635 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1636 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1637 printk("\n");
1638
1639 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr) * 2, (unsigned char *)<ype, sizeof(ltype));
1640 printk("%s: ntohs(length/type)=0x%04x\n", dev->name, ntohs(ltype));
1641 }
1642
1643 sksize = pkt_len;
1644
1645 if ((skb = dev_alloc_skb(sksize)) == (struct sk_buff *)0)
1646 {
1647 printk("%s: could not alloc_skb(%d, GFP_ATOMIC).\n", dev->name, sksize);
1648 lp->stats.rx_dropped++;
1649 }
1650 else
1651 {
1652 skb->dev = dev;
1653
1654 obram_read(ioaddr, rbd.rbd_bufl, skb_put(skb,pkt_len), pkt_len);
1655
1656 if (wavelan_debug > 5)
1657 {
1658 int i;
1659 int maxi;
1660
1661 printk("%s: pkt_len=%d, data=\"", dev->name, pkt_len);
1662
1663 if ((maxi = pkt_len) > 16)
1664 maxi = 16;
1665
1666 for (i = 0; i < maxi; i++)
1667 {
1668 unsigned char c;
1669
1670 c = skb->data[i];
1671 if (c >= ' ' && c <= '~')
1672 printk(" %c", skb->data[i]);
1673 else
1674 printk("%02x", skb->data[i]);
1675 }
1676
1677 if (maxi < pkt_len)
1678 printk("..");
1679
1680 printk("\"\n\n");
1681 }
1682
1683 skb->protocol=eth_type_trans(skb,dev);
1684 netif_rx(skb);
1685
1686 lp->stats.rx_packets++;
1687 }
1688 }
1689
1690 fd.fd_status = 0;
1691 obram_write(ioaddr, fdoff(lp->rx_head, fd_status), (unsigned char *)&fd.fd_status, sizeof(fd.fd_status));
1692
1693 fd.fd_command = FD_COMMAND_EL;
1694 obram_write(ioaddr, fdoff(lp->rx_head, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1695
1696 fd.fd_command = 0;
1697 obram_write(ioaddr, fdoff(lp->rx_last, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1698
1699 lp->rx_last = lp->rx_head;
1700 lp->rx_head = fd.fd_link_offset;
1701 }
1702
1703
1704
1705
1706
1707 }
1708
1709
1710
1711
1712
1713 static
1714 int
1715 wavelan_complete(device *dev, unsigned short ioaddr, net_local *lp)
1716 {
1717 int nreaped;
1718
1719 nreaped = 0;
1720
1721 for (;;)
1722 {
1723 unsigned short tx_status;
1724
1725 if (lp->tx_first_in_use == I82586NULL)
1726 break;
1727
1728 obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status), (unsigned char *)&tx_status, sizeof(tx_status));
1729
1730 if ((tx_status & AC_SFLD_C) == 0)
1731 break;
1732
1733 nreaped++;
1734
1735 --lp->tx_n_in_use;
1736
1737
1738
1739
1740
1741
1742 if (lp->tx_n_in_use <= 0)
1743 lp->tx_first_in_use = I82586NULL;
1744 else
1745 {
1746 lp->tx_first_in_use += TXBLOCKZ;
1747 if (lp->tx_first_in_use >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1748 lp->tx_first_in_use -= NTXBLOCKS * TXBLOCKZ;
1749 }
1750
1751 if (tx_status & AC_SFLD_OK)
1752 {
1753 int ncollisions;
1754
1755 lp->stats.tx_packets++;
1756 ncollisions = tx_status & AC_SFLD_MAXCOL;
1757 lp->stats.collisions += ncollisions;
1758
1759
1760
1761
1762 }
1763 else
1764 {
1765 lp->stats.tx_errors++;
1766 if (tx_status & AC_SFLD_S10)
1767 {
1768 lp->stats.tx_carrier_errors++;
1769 if (wavelan_debug > 0)
1770 printk("%s: tx error: no CS.\n", dev->name);
1771 }
1772 if (tx_status & AC_SFLD_S9)
1773 {
1774 lp->stats.tx_carrier_errors++;
1775 printk("%s: tx error: lost CTS.\n", dev->name);
1776 }
1777 if (tx_status & AC_SFLD_S8)
1778 {
1779 lp->stats.tx_fifo_errors++;
1780 printk("%s: tx error: slow DMA.\n", dev->name);
1781 }
1782 if (tx_status & AC_SFLD_S6)
1783 {
1784 lp->stats.tx_heartbeat_errors++;
1785 if (wavelan_debug > 0)
1786 printk("%s: tx error: heart beat.\n", dev->name);
1787 }
1788 if (tx_status & AC_SFLD_S5)
1789 {
1790 lp->stats.tx_aborted_errors++;
1791 if (wavelan_debug > 0)
1792 printk("%s: tx error: too many collisions.\n", dev->name);
1793 }
1794 }
1795
1796 if (wavelan_debug > 5)
1797 printk("%s: tx completed, tx_status 0x%04x.\n", dev->name, tx_status);
1798 }
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1809 {
1810 dev->tbusy = 0;
1811 mark_bh(NET_BH);
1812 }
1813
1814 return nreaped;
1815 }
1816
1817 static
1818 void
1819 wavelan_watchdog(unsigned long a)
1820 {
1821 device *dev;
1822 net_local *lp;
1823 unsigned short ioaddr;
1824 unsigned long x;
1825 unsigned int nreaped;
1826
1827 x = wavelan_splhi();
1828
1829 dev = (device *)a;
1830 ioaddr = dev->base_addr;
1831 lp = (net_local *)dev->priv;
1832
1833 if (lp->tx_n_in_use <= 0)
1834 {
1835 wavelan_splx(x);
1836 return;
1837 }
1838
1839 lp->watchdog.expires = jiffies+WATCHDOG_JIFFIES;
1840 add_timer(&lp->watchdog);
1841
1842 if (jiffies - dev->trans_start < WATCHDOG_JIFFIES)
1843 {
1844 wavelan_splx(x);
1845 return;
1846 }
1847
1848 nreaped = wavelan_complete(dev, ioaddr, lp);
1849
1850 printk("%s: warning: wavelan_watchdog(): %d reaped, %d remain.\n", dev->name, nreaped, lp->tx_n_in_use);
1851
1852
1853
1854
1855
1856
1857
1858
1859 wavelan_splx(x);
1860 }
1861
1862 static
1863 void
1864 wavelan_interrupt(int irq, struct pt_regs *regs)
1865 {
1866 device *dev;
1867 unsigned short ioaddr;
1868 net_local *lp;
1869 unsigned short hasr;
1870 unsigned short status;
1871 unsigned short ack_cmd;
1872
1873 if ((dev = (device *)(irq2dev_map[irq])) == (device *)0)
1874 {
1875 printk("wavelan_interrupt(): irq %d for unknown device.\n", irq);
1876 return;
1877 }
1878
1879 ioaddr = dev->base_addr;
1880 lp = (net_local *)dev->priv;
1881
1882 dev->interrupt = 1;
1883
1884 if ((hasr = hasr_read(ioaddr)) & HASR_MMC_INTR)
1885 {
1886 unsigned char dce_status;
1887
1888
1889
1890
1891
1892 mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status, sizeof(dce_status));
1893 if (wavelan_debug > 0)
1894 printk("%s: warning: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n", dev->name, dce_status);
1895 }
1896
1897 if ((hasr & HASR_82586_INTR) == 0)
1898 {
1899 dev->interrupt = 0;
1900 if (wavelan_debug > 0)
1901 printk("%s: warning: wavelan_interrupt() but (hasr & HASR_82586_INTR) == 0.\n", dev->name);
1902 return;
1903 }
1904
1905 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&status, sizeof(status));
1906
1907
1908
1909
1910 ack_cmd = status & SCB_ST_INT;
1911
1912 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&ack_cmd, sizeof(ack_cmd));
1913
1914 set_chan_attn(ioaddr, lp->hacr);
1915
1916 if (wavelan_debug > 5)
1917 printk("%s: interrupt, status 0x%04x.\n", dev->name, status);
1918
1919 if ((status & SCB_ST_CX) == SCB_ST_CX)
1920 {
1921
1922
1923
1924 if (wavelan_debug > 5)
1925 printk("%s: command completed.\n", dev->name);
1926 (void)wavelan_complete(dev, ioaddr, lp);
1927 }
1928
1929 if ((status & SCB_ST_FR) == SCB_ST_FR)
1930 {
1931
1932
1933
1934 if (wavelan_debug > 5)
1935 printk("%s: received packet.\n", dev->name);
1936 wavelan_receive(dev);
1937 }
1938
1939 if
1940 (
1941 (status & SCB_ST_CNA) == SCB_ST_CNA
1942 ||
1943 (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) && dev->start)
1944 )
1945 {
1946 printk("%s: warning: CU inactive -- restarting.\n", dev->name);
1947
1948 (void)wavelan_hardware_reset(dev);
1949 }
1950
1951 if
1952 (
1953 (status & SCB_ST_RNR) == SCB_ST_RNR
1954 ||
1955 (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) && dev->start)
1956 )
1957 {
1958 printk("%s: warning: RU not ready -- restarting.\n", dev->name);
1959
1960 (void)wavelan_hardware_reset(dev);
1961 }
1962
1963 dev->interrupt = 0;
1964 }
1965
1966 static
1967 int
1968 wavelan_close(device *dev)
1969 {
1970 unsigned short ioaddr;
1971 net_local *lp;
1972 unsigned short scb_cmd;
1973
1974 if (wavelan_debug > 0)
1975 printk("%s: ->wavelan_close(dev=0x%x)\n", dev->name, (unsigned int)dev);
1976
1977 ioaddr = dev->base_addr;
1978 lp = (net_local *)dev->priv;
1979
1980 dev->tbusy = 1;
1981 dev->start = 0;
1982
1983
1984
1985
1986 scb_cmd = (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC & SCB_CMD_RUC_SUS);
1987 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
1988 set_chan_attn(ioaddr, lp->hacr);
1989
1990 wavelan_ints_off(dev);
1991
1992 free_irq(dev->irq);
1993 irq2dev_map[dev->irq] = (device *)0;
1994
1995
1996
1997
1998 release_region(ioaddr, sizeof(ha_t));
1999
2000 #if defined(MODULE)
2001 MOD_DEC_USE_COUNT;
2002 #endif
2003
2004 if (wavelan_debug > 0)
2005 printk("%s: <-wavelan_close(): 0\n", dev->name);
2006
2007 return 0;
2008 }
2009
2010
2011
2012
2013
2014 static
2015 en_stats *
2016 wavelan_get_stats(device *dev)
2017 {
2018 net_local *lp;
2019
2020 lp = (net_local *)dev->priv;
2021
2022 return &lp->stats;
2023 }
2024
2025 static
2026 void
2027 wavelan_set_multicast_list(device *dev, int num_addrs, void *addrs)
2028 {
2029 net_local *lp;
2030 unsigned long x;
2031
2032 if (wavelan_debug > 0)
2033 printk("%s: ->wavelan_set_multicast_list(dev=0x%x, num_addrs=%d, addrs=0x%x)\n", dev->name, (unsigned int)dev, num_addrs, (unsigned int)addrs);
2034
2035 lp = (net_local *)dev->priv;
2036
2037 switch (num_addrs)
2038 {
2039 case -1:
2040
2041
2042
2043 lp->promiscuous = 1;
2044 x = wavelan_splhi();
2045 (void)wavelan_hardware_reset(dev);
2046 wavelan_splx(x);
2047 break;
2048
2049 case 0:
2050
2051
2052
2053
2054 lp->promiscuous = 0;
2055 x = wavelan_splhi();
2056 (void)wavelan_hardware_reset(dev);
2057 wavelan_splx(x);
2058 break;
2059
2060 default:
2061
2062
2063
2064
2065 break;
2066 }
2067
2068 if (wavelan_debug > 0)
2069 printk("%s: <-wavelan_set_multicast_list()\n", dev->name);
2070 }
2071
2072
2073
2074
2075
2076 static
2077 int
2078 sprintf_stats(char *buffer, device *dev)
2079 {
2080 net_local *lp;
2081 unsigned char v;
2082 mmr_t m;
2083
2084 lp = (net_local *)dev->priv;
2085
2086 if (lp == (net_local *)0)
2087 return sprintf(buffer, "%6s: No statistics available.\n", dev->name);
2088
2089 v = (unsigned char)1;
2090 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
2091
2092 mmc_read(dev->base_addr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, sizeof(m.mmr_dce_status));
2093 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_h), &m.mmr_correct_nwid_h, sizeof(m.mmr_correct_nwid_h));
2094 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_l), &m.mmr_correct_nwid_l, sizeof(m.mmr_correct_nwid_l));
2095 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_h), &m.mmr_wrong_nwid_h, sizeof(m.mmr_wrong_nwid_h));
2096 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, sizeof(m.mmr_wrong_nwid_l));
2097 mmc_read(dev->base_addr, mmroff(0, mmr_signal_lvl), &m.mmr_signal_lvl, sizeof(m.mmr_signal_lvl));
2098 mmc_read(dev->base_addr, mmroff(0, mmr_silence_lvl), &m.mmr_silence_lvl, sizeof(m.mmr_silence_lvl));
2099 mmc_read(dev->base_addr, mmroff(0, mmr_sgnl_qual), &m.mmr_sgnl_qual, sizeof(m.mmr_sgnl_qual));
2100
2101 v = (unsigned char)0;
2102 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
2103
2104 lp->correct_nwid += (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l;
2105 lp->wrong_nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
2106
2107 return sprintf
2108 (
2109 buffer,
2110 "%6s: %02x %08x %08x %02x %02x %02x %02x %u\n",
2111 dev->name,
2112 m.mmr_dce_status,
2113 lp->correct_nwid,
2114 lp->wrong_nwid,
2115 m.mmr_signal_lvl,
2116 m.mmr_silence_lvl,
2117 m.mmr_sgnl_qual,
2118 lp->tx_n_in_use,
2119 lp->nresets
2120 );
2121 }
2122
2123 static int
2124 wavelan_get_info(char *buffer, char **start, off_t offset, int length, int dummy)
2125 {
2126 int len;
2127 off_t begin;
2128 off_t pos;
2129 int size;
2130 unsigned long x;
2131
2132 len = 0;
2133 begin = 0;
2134 pos = 0;
2135
2136 size = sprintf(buffer, "%s", "Iface | dce +nwid -nwid lvl slnc qual ntxq nrst\n");
2137
2138 pos += size;
2139 len += size;
2140
2141 x = wavelan_splhi();
2142
2143 if (first_wavelan != (net_local *)0)
2144 {
2145 net_local *lp;
2146
2147 lp = first_wavelan;
2148 do
2149 {
2150 size = sprintf_stats(buffer + len, lp->dev);
2151
2152 len += size;
2153 pos = begin + len;
2154
2155 if (pos < offset)
2156 {
2157 len = 0;
2158 begin = pos;
2159 }
2160
2161 if (pos > offset + length)
2162 break;
2163 }
2164 while ((lp = lp->next) != first_wavelan);
2165 }
2166
2167 wavelan_splx(x);
2168
2169 *start = buffer + (offset - begin);
2170 len -= (offset - begin);
2171 if (len > length)
2172 len = length;
2173
2174 return len;
2175 }
2176
2177 #if defined(MODULE)
2178 char kernel_version[] = UTS_RELEASE;
2179 static char devicename[9] = { 0, };
2180 static struct device dev_wavelan =
2181 {
2182 devicename,
2183 0, 0, 0, 0,
2184 0, 0,
2185 0, 0, 0, NULL, wavelan_probe
2186 };
2187
2188 int io = 0x390;
2189 int irq = 0;
2190
2191 int
2192 init_module(void)
2193 {
2194 dev_wavelan.base_addr = io;
2195 dev_wavelan.irq = irq;
2196 if (register_netdev(&dev_wavelan) != 0)
2197 return -EIO;
2198
2199 return 0;
2200 }
2201
2202 void
2203 cleanup_module(void)
2204 {
2205 if (MOD_IN_USE)
2206 printk("wavelan: device busy, remove delayed\n");
2207 else
2208 {
2209 proc_net_unregister(PROC_NET_WAVELAN);
2210 unregister_netdev(&dev_wavelan);
2211 kfree_s(dev_wavelan.priv, sizeof(struct net_local));
2212 dev_wavelan.priv = NULL;
2213 }
2214 }
2215 #endif
2216
2217 static
2218 void
2219 wavelan_cu_show_one(device *dev, net_local *lp, int i, unsigned short p)
2220 {
2221 unsigned short ioaddr;
2222 ac_tx_t actx;
2223
2224 ioaddr = dev->base_addr;
2225
2226 printk("%d: 0x%x:", i, p);
2227
2228 obram_read(ioaddr, p, (unsigned char *)&actx, sizeof(actx));
2229 printk(" status=0x%x,", actx.tx_h.ac_status);
2230 printk(" command=0x%x,", actx.tx_h.ac_command);
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241 printk("|");
2242 }
2243
2244 #if 0
2245 static
2246 void
2247 wavelan_psa_show(psa_t *p)
2248 {
2249 printk("psa:");
2250
2251 printk("psa_io_base_addr_1: 0x%02x,", p->psa_io_base_addr_1);
2252 printk("psa_io_base_addr_2: 0x%02x,", p->psa_io_base_addr_2);
2253 printk("psa_io_base_addr_3: 0x%02x,", p->psa_io_base_addr_3);
2254 printk("psa_io_base_addr_4: 0x%02x,", p->psa_io_base_addr_4);
2255 printk("psa_rem_boot_addr_1: 0x%02x,", p->psa_rem_boot_addr_1);
2256 printk("psa_rem_boot_addr_2: 0x%02x,", p->psa_rem_boot_addr_2);
2257 printk("psa_rem_boot_addr_3: 0x%02x,", p->psa_rem_boot_addr_3);
2258 printk("psa_holi_params: 0x%02x,", p->psa_holi_params);
2259 printk("psa_int_req_no: %d,", p->psa_int_req_no);
2260 printk
2261 (
2262 "psa_univ_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2263 p->psa_univ_mac_addr[0],
2264 p->psa_univ_mac_addr[1],
2265 p->psa_univ_mac_addr[2],
2266 p->psa_univ_mac_addr[3],
2267 p->psa_univ_mac_addr[4],
2268 p->psa_univ_mac_addr[5]
2269 );
2270 printk
2271 (
2272 "psa_local_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2273 p->psa_local_mac_addr[0],
2274 p->psa_local_mac_addr[1],
2275 p->psa_local_mac_addr[2],
2276 p->psa_local_mac_addr[3],
2277 p->psa_local_mac_addr[4],
2278 p->psa_local_mac_addr[5]
2279 );
2280 printk("psa_univ_local_sel: %d,", p->psa_univ_local_sel);
2281 printk("psa_comp_number: %d,", p->psa_comp_number);
2282 printk("psa_thr_pre_set: 0x%02x,", p->psa_thr_pre_set);
2283 printk("psa_feature_select/decay_prm: 0x%02x,", p->psa_feature_select);
2284 printk("psa_subband/decay_update_prm: %d,", p->psa_subband);
2285 printk("psa_quality_thr: 0x%02x,", p->psa_quality_thr);
2286 printk("psa_mod_delay: 0x%02x,", p->psa_mod_delay);
2287 printk("psa_nwid: 0x%02x%02x,", p->psa_nwid[0], p->psa_nwid[1]);
2288 printk("psa_undefined: %d,", p->psa_undefined);
2289 printk("psa_encryption_select: %d,", p->psa_encryption_select);
2290 printk
2291 (
2292 "psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x,",
2293 p->psa_encryption_key[0],
2294 p->psa_encryption_key[1],
2295 p->psa_encryption_key[2],
2296 p->psa_encryption_key[3],
2297 p->psa_encryption_key[4],
2298 p->psa_encryption_key[5],
2299 p->psa_encryption_key[6],
2300 p->psa_encryption_key[7]
2301 );
2302 printk("psa_databus_width: %d,", p->psa_databus_width);
2303 printk("psa_call_code/auto_squelch: 0x%02x,", p->psa_call_code);
2304 printk("psa_no_of_retries: %d,", p->psa_no_of_retries);
2305 printk("psa_acr: %d,", p->psa_acr);
2306 printk("psa_dump_count: %d,", p->psa_dump_count);
2307 printk("psa_nwid_prefix: 0x%02x,", p->psa_nwid_prefix);
2308 printk("psa_conf_status: %d,", p->psa_conf_status);
2309 printk("psa_crc: 0x%02x%02x,", p->psa_crc[0], p->psa_crc[1]);
2310 printk("psa_crc_status: 0x%02x,", p->psa_crc_status);
2311
2312 printk("\n");
2313 }
2314
2315 static
2316 void
2317 wavelan_mmc_show(unsigned short ioaddr)
2318 {
2319 mmr_t m;
2320
2321 mmc_read(ioaddr, 0, (unsigned char *)&m, sizeof(m));
2322
2323 printk("mmr:");
2324 printk(" des_status: 0x%x", m.mmr_des_status);
2325 printk(" des_avail: 0x%x", m.mmr_des_avail);
2326 printk(" des_io_invert: 0x%x", m.mmr_des_io_invert);
2327 printk
2328 (
2329 " dce_status: 0x%x[%s%s%s%s]",
2330 m.mmr_dce_status & 0x0F,
2331 (m.mmr_dce_status & MMR_DCE_STATUS_ENERG_DET) ? "energy detected," : "",
2332 (m.mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ? "loop test indicated," : "",
2333 (m.mmr_dce_status & MMR_DCE_STATUS_XMTITR_IND) ? "transmitter on," : "",
2334 (m.mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ? "jabber timer expired," : ""
2335 );
2336 printk(" correct_nwid: %d", m.mmr_correct_nwid_h << 8 | m.mmr_correct_nwid_l);
2337 printk(" wrong_nwid: %d", (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
2338 printk(" thr_pre_set: 0x%x", m.mmr_thr_pre_set);
2339 printk(" signal_lvl: %d", m.mmr_signal_lvl);
2340 printk(" silence_lvl: %d", m.mmr_silence_lvl);
2341 printk(" sgnl_qual: 0x%x", m.mmr_sgnl_qual);
2342 printk(" netw_id_l: %x", m.mmr_netw_id_l);
2343
2344 printk("\n");
2345 }
2346 #endif
2347
2348 static
2349 void
2350 wavelan_scb_show(unsigned short ioaddr)
2351 {
2352 scb_t scb;
2353
2354 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
2355
2356 printk("scb:");
2357
2358 printk(" status:");
2359 printk
2360 (
2361 " stat 0x%x[%s%s%s%s]",
2362 (scb.scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA | SCB_ST_RNR)) >> 12,
2363 (scb.scb_status & SCB_ST_CX) ? "cmd completion interrupt," : "",
2364 (scb.scb_status & SCB_ST_FR) ? "frame received," : "",
2365 (scb.scb_status & SCB_ST_CNA) ? "cmd unit not active," : "",
2366 (scb.scb_status & SCB_ST_RNR) ? "rcv unit not ready," : ""
2367 );
2368 printk
2369 (
2370 " cus 0x%x[%s%s%s]",
2371 (scb.scb_status & SCB_ST_CUS) >> 8,
2372 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_IDLE) ? "idle" : "",
2373 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_SUSP) ? "suspended" : "",
2374 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_ACTV) ? "active" : ""
2375 );
2376 printk
2377 (
2378 " rus 0x%x[%s%s%s%s]",
2379 (scb.scb_status & SCB_ST_RUS) >> 4,
2380 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_IDLE) ? "idle" : "",
2381 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_SUSP) ? "suspended" : "",
2382 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_NRES) ? "no resources" : "",
2383 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_RDY) ? "ready" : ""
2384 );
2385
2386 printk(" command:");
2387 printk
2388 (
2389 " ack 0x%x[%s%s%s%s]",
2390 (scb.scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR | SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12,
2391 (scb.scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "",
2392 (scb.scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "",
2393 (scb.scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "",
2394 (scb.scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : ""
2395 );
2396 printk
2397 (
2398 " cuc 0x%x[%s%s%s%s%s]",
2399 (scb.scb_command & SCB_CMD_CUC) >> 8,
2400 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_NOP) ? "nop" : "",
2401 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_GO) ? "start cbl_offset" : "",
2402 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_RES) ? "resume execution" : "",
2403 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_SUS) ? "suspend execution" : "",
2404 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_ABT) ? "abort execution" : ""
2405 );
2406 printk
2407 (
2408 " ruc 0x%x[%s%s%s%s%s]",
2409 (scb.scb_command & SCB_CMD_RUC) >> 4,
2410 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_NOP) ? "nop" : "",
2411 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_GO) ? "start rfa_offset" : "",
2412 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_RES) ? "resume reception" : "",
2413 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_SUS) ? "suspend reception" : "",
2414 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_ABT) ? "abort reception" : ""
2415 );
2416
2417 printk(" cbl_offset 0x%x", scb.scb_cbl_offset);
2418 printk(" rfa_offset 0x%x", scb.scb_rfa_offset);
2419
2420 printk(" crcerrs %d", scb.scb_crcerrs);
2421 printk(" alnerrs %d", scb.scb_alnerrs);
2422 printk(" rscerrs %d", scb.scb_rscerrs);
2423 printk(" ovrnerrs %d", scb.scb_ovrnerrs);
2424
2425 printk("\n");
2426 }
2427
2428 static
2429 void
2430 wavelan_ru_show(device *dev)
2431 {
2432 net_local *lp;
2433
2434 lp = (net_local *)dev->priv;
2435
2436 printk("ru:");
2437
2438
2439
2440 printk("\n");
2441 }
2442
2443 static
2444 void
2445 wavelan_cu_show(device *dev)
2446 {
2447 net_local *lp;
2448 unsigned int i;
2449 unsigned short p;
2450
2451 lp = (net_local *)dev->priv;
2452
2453 printk("cu:");
2454 printk("\n");
2455
2456 for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++)
2457 {
2458 wavelan_cu_show_one(dev, lp, i, p);
2459
2460 p += TXBLOCKZ;
2461 if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
2462 p -= NTXBLOCKS * TXBLOCKZ;
2463 }
2464 }
2465
2466 static
2467 void
2468 wavelan_dev_show(device *dev)
2469 {
2470 printk("dev:");
2471 printk(" start=%d,", dev->start);
2472 printk(" tbusy=%ld,", dev->tbusy);
2473 printk(" interrupt=%d,", dev->interrupt);
2474 printk(" trans_start=%ld,", dev->trans_start);
2475 printk(" flags=0x%x,", dev->flags);
2476 printk("\n");
2477 }
2478
2479 static
2480 void
2481 wavelan_local_show(device *dev)
2482 {
2483 net_local *lp;
2484
2485 lp = (net_local *)dev->priv;
2486
2487 printk("local:");
2488 printk(" tx_n_in_use=%d,", lp->tx_n_in_use);
2489 printk(" hacr=0x%x,", lp->hacr);
2490 printk(" rx_head=0x%x,", lp->rx_head);
2491 printk(" rx_last=0x%x,", lp->rx_last);
2492 printk(" tx_first_free=0x%x,", lp->tx_first_free);
2493 printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use);
2494 printk("\n");
2495 }
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