This source file includes following definitions.
- NCR53c406a_dma_setup
- NCR53c406a_dma_write
- NCR53c406a_dma_read
- NCR53c406a_dma_residual
- NCR53c406a_pio_read
- NCR53c406a_pio_write
- NCR53c406a_detect
- NCR53c406a_setup
- NCR53c406a_info
- internal_done
- wait_intr
- NCR53c406a_command
- NCR53c406a_queue
- NCR53c406a_abort
- NCR53c406a_reset
- NCR53c406a_biosparm
- NCR53c406a_intr
- irq_probe
- chip_init
- calc_port_addr
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22 #define NCR53C406A_DEBUG 0
23 #define VERBOSE_NCR53C406A_DEBUG 0
24
25
26 #define USE_PIO 1
27
28 #define USE_BIOS 0
29
30
31
32 #define DMA_CHAN 5
33
34
35
36 #define USE_FAST_PIO 1
37
38
39
40 #ifdef MODULE
41 #include <linux/config.h>
42 #include <linux/module.h>
43 #endif
44
45 #include <linux/errno.h>
46 #include <linux/ioport.h>
47 #include <linux/sched.h>
48 #include <linux/interrupt.h>
49 #include <asm/io.h>
50 #include <asm/dma.h>
51 #include <asm/bitops.h>
52 #include <asm/irq.h>
53
54 #include <linux/blk.h>
55 #include "scsi.h"
56 #include "hosts.h"
57 #include "sd.h"
58
59 #include "NCR53c406a.h"
60
61
62
63 #define WATCHDOG 5000000
64
65 #define SYNC_MODE 0
66
67 #if DEBUG
68 #undef NCR53C406A_DEBUG
69 #define NCR53C406A_DEBUG 1
70 #endif
71
72 #if USE_PIO
73 #define USE_DMA 0
74 #else
75 #define USE_DMA 1
76 #endif
77
78
79 #define C1_IMG 0x07
80 #define C2_IMG 0x48
81 #if USE_DMA
82 #define C3_IMG 0x21
83 #else
84 #define C3_IMG 0x20
85 #endif
86 #define C4_IMG 0x04
87 #define C5_IMG 0xb6
88
89 #define REG0 (outb(C4_IMG, CONFIG4))
90 #define REG1 (outb(C5_IMG, CONFIG5))
91
92 #if NCR53C406A_DEBUG
93 #define DEB(x) x
94 #else
95 #define DEB(x)
96 #endif
97
98 #if VERBOSE_NCR53C406A_DEBUG
99 #define VDEB(x) x
100 #else
101 #define VDEB(x)
102 #endif
103
104 #define LOAD_DMA_COUNT(count) \
105 outb(count & 0xff, TC_LSB); \
106 outb((count >> 8) & 0xff, TC_MSB); \
107 outb((count >> 16) & 0xff, TC_HIGH);
108
109
110 #define DMA_OP 0x80
111
112 #define SCSI_NOP 0x00
113 #define FLUSH_FIFO 0x01
114 #define CHIP_RESET 0x02
115 #define SCSI_RESET 0x03
116 #define RESELECT 0x40
117 #define SELECT_NO_ATN 0x41
118 #define SELECT_ATN 0x42
119 #define SELECT_ATN_STOP 0x43
120 #define ENABLE_SEL 0x44
121 #define DISABLE_SEL 0x45
122 #define SELECT_ATN3 0x46
123 #define RESELECT3 0x47
124 #define TRANSFER_INFO 0x10
125 #define INIT_CMD_COMPLETE 0x11
126 #define MSG_ACCEPT 0x12
127 #define TRANSFER_PAD 0x18
128 #define SET_ATN 0x1a
129 #define RESET_ATN 0x1b
130 #define SEND_MSG 0x20
131 #define SEND_STATUS 0x21
132 #define SEND_DATA 0x22
133 #define DISCONN_SEQ 0x23
134 #define TERMINATE_SEQ 0x24
135 #define TARG_CMD_COMPLETE 0x25
136 #define DISCONN 0x27
137 #define RECV_MSG 0x28
138 #define RECV_CMD 0x29
139 #define RECV_DATA 0x2a
140 #define RECV_CMD_SEQ 0x2b
141 #define TARGET_ABORT_DMA 0x04
142
143
144
145
146
147
148
149
150
151
152
153
154
155 #if NCR53C406A_DEBUG
156 #define rtrc(i) {inb(0x3da);outb(0x31,0x3c0);outb((i),0x3c0);}
157 #else
158 #define rtrc(i) {}
159 #endif
160
161
162 enum Phase {
163 idle,
164 data_out,
165 data_in,
166 command_ph,
167 status_ph,
168 message_out,
169 message_in
170 };
171
172
173 static void NCR53c406a_intr(int, struct pt_regs *);
174 static void internal_done(Scsi_Cmnd *);
175 static void wait_intr(void);
176 static void chip_init(void);
177 static void calc_port_addr(void);
178 #ifndef IRQ_LEV
179 static int irq_probe(void);
180 #endif
181
182
183
184 #if USE_BIOS
185 static void *bios_base = (void *)0;
186 #endif
187
188 #if PORT_BASE
189 static int port_base = PORT_BASE;
190 #else
191 static int port_base = 0;
192 #endif
193
194 #if IRQ_LEV
195 static int irq_level = IRQ_LEV;
196 #else
197 static int irq_level = -1;
198 #endif
199
200 #if USE_DMA
201 static int dma_chan = 0;
202 #endif
203
204 #if USE_PIO
205 static int fast_pio = USE_FAST_PIO;
206 #endif
207
208 static Scsi_Cmnd *current_SC = NULL;
209 static volatile int internal_done_flag = 0;
210 static volatile int internal_done_errcode = 0;
211 static char info_msg[256];
212
213
214
215
216 #if USE_BIOS
217 static void *addresses[] = {
218 (void *)0xd8000,
219 (void *)0xc8000
220 };
221 #define ADDRESS_COUNT (sizeof( addresses ) / sizeof( unsigned ))
222 #endif USE_BIOS
223
224
225 static unsigned short ports[] = { 0x230, 0x330 };
226 #define PORT_COUNT (sizeof( ports ) / sizeof( unsigned short ))
227
228
229 static unsigned short intrs[] = { 10, 11, 12, 15 };
230 #define INTR_COUNT (sizeof( intrs ) / sizeof( unsigned short ))
231
232
233 #if USE_BIOS
234 struct signature {
235 char *signature;
236 int sig_offset;
237 int sig_length;
238 } signatures[] = {
239
240
241 { "Copyright (C) Acculogic, Inc.\r\n2.8M Diskette Extension Bios ver 4.04.03 03/01/1993", 61, 82 },
242 };
243 #define SIGNATURE_COUNT (sizeof( signatures ) / sizeof( struct signature ))
244 #endif USE_BIOS
245
246
247
248
249 static int TC_LSB;
250 static int TC_MSB;
251 static int SCSI_FIFO;
252 static int CMD_REG;
253 static int STAT_REG;
254 static int DEST_ID;
255 static int INT_REG;
256 static int SRTIMOUT;
257 static int SEQ_REG;
258 static int SYNCPRD;
259 static int FIFO_FLAGS;
260 static int SYNCOFF;
261 static int CONFIG1;
262 static int CLKCONV;
263
264 static int CONFIG2;
265 static int CONFIG3;
266 static int CONFIG4;
267 static int TC_HIGH;
268
269
270
271
272
273
274 static int PIO_FIFO;
275
276
277
278 static int PIO_STATUS;
279
280
281 static int PIO_FLAG;
282 static int CONFIG5;
283
284
285
286
287
288 #if USE_DMA
289 static __inline__ int
290 NCR53c406a_dma_setup (unsigned char *ptr,
291 unsigned int count,
292 unsigned char mode) {
293 unsigned limit;
294 unsigned long flags = 0;
295
296 VDEB(printk("dma: before count=%d ", count));
297 if (dma_chan <=3) {
298 if (count > 65536)
299 count = 65536;
300 limit = 65536 - (((unsigned) ptr) & 0xFFFF);
301 } else {
302 if (count > (65536<<1))
303 count = (65536<<1);
304 limit = (65536<<1) - (((unsigned) ptr) & 0x1FFFF);
305 }
306
307 if (count > limit) count = limit;
308
309 VDEB(printk("after count=%d\n", count));
310 if ((count & 1) || (((unsigned) ptr) & 1))
311 panic ("NCR53c406a: attempted unaligned DMA transfer\n");
312
313 save_flags(flags);
314 cli();
315 disable_dma(dma_chan);
316 clear_dma_ff(dma_chan);
317 set_dma_addr(dma_chan, (long) ptr);
318 set_dma_count(dma_chan, count);
319 set_dma_mode(dma_chan, mode);
320 enable_dma(dma_chan);
321 restore_flags(flags);
322
323 return count;
324 }
325
326 static __inline__ int
327 NCR53c406a_dma_write(unsigned char *src, unsigned int count) {
328 return NCR53c406a_dma_setup (src, count, DMA_MODE_WRITE);
329 }
330
331 static __inline__ int
332 NCR53c406a_dma_read(unsigned char *src, unsigned int count) {
333 return NCR53c406a_dma_setup (src, count, DMA_MODE_READ);
334 }
335
336 static __inline__ int
337 NCR53c406a_dma_residual (void) {
338 register int tmp;
339 unsigned long flags = 0;
340 save_flags(flags);
341 cli();
342 clear_dma_ff(dma_chan);
343 tmp = get_dma_residue(dma_chan);
344 restore_flags(flags);
345
346 return tmp;
347 }
348 #endif USE_DMA
349
350 #if USE_PIO
351 static __inline__ int NCR53c406a_pio_read(unsigned char *request,
352 unsigned int reqlen)
353 {
354 int i;
355 int len;
356 unsigned long flags = 0;
357
358 REG1;
359 while (reqlen) {
360 i = inb(PIO_STATUS);
361
362 if (i & 0x80)
363 return 0;
364
365 switch( i & 0x1e ) {
366 default:
367 case 0x10:
368 len=0; break;
369 case 0x0:
370 len=1; break;
371 case 0x8:
372 len=42; break;
373 case 0xc:
374 len=84; break;
375 case 0xe:
376 len=128; break;
377 }
378
379 if ((i & 0x40) && len == 0) {
380 return 0;
381 }
382
383 if (len) {
384 if( len > reqlen )
385 len = reqlen;
386
387 save_flags(flags);
388 cli();
389 if( fast_pio && len > 3 ) {
390 insl(PIO_FIFO,request,len>>2);
391 request += len & 0xfc;
392 reqlen -= len & 0xfc;
393 }
394 else {
395 while(len--) {
396 *request++ = inb(PIO_FIFO);
397 reqlen--;
398 }
399 }
400 restore_flags(flags);
401 }
402 }
403 return 0;
404 }
405
406 static __inline__ int NCR53c406a_pio_write(unsigned char *request,
407 unsigned int reqlen)
408 {
409 int i = 0;
410 int len;
411 unsigned long flags = 0;
412
413 REG1;
414 while (reqlen && !(i&0x40)) {
415 i = inb(PIO_STATUS);
416
417 if (i & 0x80)
418 return 0;
419
420 switch( i & 0x1e ) {
421 case 0x10:
422 len=128; break;
423 case 0x0:
424 len=84; break;
425 case 0x8:
426 len=42; break;
427 case 0xc:
428 len=1; break;
429 default:
430 case 0xe:
431 len=0; break;
432 }
433
434 if (len) {
435 if( len > reqlen )
436 len = reqlen;
437
438 save_flags(flags);
439 cli();
440 if( fast_pio && len > 3 ) {
441 outsl(PIO_FIFO,request,len>>2);
442 request += len & 0xfc;
443 reqlen -= len & 0xfc;
444 }
445 else {
446 while(len--) {
447 outb(*request++, PIO_FIFO);
448 reqlen--;
449 }
450 }
451 restore_flags(flags);
452 }
453 }
454 return 0;
455 }
456 #endif USE_PIO
457
458 int
459 NCR53c406a_detect(Scsi_Host_Template * tpnt){
460 struct Scsi_Host *shpnt;
461 #ifndef PORT_BASE
462 int i;
463 #endif
464
465 #if USE_BIOS
466 int ii, jj;
467 bios_base = 0;
468
469 for( ii=0; ii < ADDRESS_COUNT && !bios_base; ii++)
470 for( jj=0; (jj < SIGNATURE_COUNT) && !bios_base; jj++)
471 if(!memcmp((void *) addresses[ii]+signatures[jj].sig_offset,
472 (void *) signatures[jj].signature,
473 (int) signatures[jj].sig_length))
474 bios_base=addresses[ii];
475
476 if(!bios_base){
477 printk("NCR53c406a: BIOS signature not found\n");
478 return 0;
479 }
480
481 DEB(printk("NCR53c406a BIOS found at %X\n", (unsigned int) bios_base););
482 #endif USE_BIOS
483
484 #ifdef PORT_BASE
485 if (check_region(port_base, 0x10))
486 port_base = 0;
487
488 #else
489 if (port_base) {
490 if (check_region(port_base, 0x10))
491 port_base = 0;
492 }
493 else {
494 for(i=0; i<PORT_COUNT && !port_base; i++){
495 if(check_region(ports[i], 0x10)){
496 DEB(printk("NCR53c406a: port %x in use\n", ports[i]));
497 }
498 else {
499 VDEB(printk("NCR53c406a: port %x available\n", ports[i]));
500 outb(C5_IMG, ports[i] + 0x0d);
501 if( (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7
502 && (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7
503 && (inb(ports[i] + 0x0e) & 0xf8) == 0x58 ) {
504 VDEB(printk("NCR53c406a: Sig register valid\n"));
505 VDEB(printk("port_base=%x\n", port_base));
506 port_base = ports[i];
507 }
508 }
509 }
510 }
511 #endif PORT_BASE
512
513 if(!port_base){
514 printk("NCR53c406a: no available ports found\n");
515 return 0;
516 }
517
518 DEB(printk("NCR53c406a detected\n"));
519
520 calc_port_addr();
521 chip_init();
522
523 #ifndef IRQ_LEV
524 if (irq_level < 0) {
525 irq_level=irq_probe();
526 if (irq_level < 0) {
527 printk("NCR53c406a: IRQ problem, irq_level=%d, giving up\n", irq_level);
528 return 0;
529 }
530 }
531 #endif
532
533 DEB(printk("NCR53c406a: using port_base %x\n", port_base));
534 request_region(port_base, 0x10, "NCR53c406a");
535
536 if(irq_level > 0) {
537 if(request_irq(irq_level, NCR53c406a_intr, 0, "NCR53c406a")){
538 printk("NCR53c406a: unable to allocate IRQ %d\n", irq_level);
539 return 0;
540 }
541 tpnt->can_queue = 1;
542 DEB(printk("NCR53c406a: allocated IRQ %d\n", irq_level));
543 }
544 else if (irq_level == 0) {
545 tpnt->can_queue = 0;
546 DEB(printk("NCR53c406a: No interrupts detected\n"));
547 #if USE_DMA
548 printk("NCR53c406a: No interrupts found and DMA mode defined. Giving up.\n");
549 return 0;
550 #endif USE_DMA
551 }
552 else {
553 DEB(printk("NCR53c406a: Shouldn't get here!\n"));
554 return 0;
555 }
556
557 #if USE_DMA
558 dma_chan = DMA_CHAN;
559 if(request_dma(dma_chan, "NCR53c406a") != 0){
560 printk("NCR53c406a: unable to allocate DMA channel %d\n", dma_chan);
561 return 0;
562 }
563
564 DEB(printk("Allocated DMA channel %d\n", dma_chan));
565 #endif USE_DMA
566
567 tpnt->present = 1;
568
569 shpnt = scsi_register(tpnt, 0);
570 shpnt->irq = irq_level;
571 shpnt->io_port = port_base;
572 shpnt->n_io_port = 0x10;
573 #if USE_DMA
574 shpnt->dma = dma_chan;
575 #endif
576
577 #if USE_DMA
578 sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, DMA channel %d.", port_base, irq_level, dma_chan);
579 #else
580 sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, %s PIO mode.", port_base, irq_level, fast_pio ? "fast" : "slow");
581 #endif
582
583 return (tpnt->present);
584 }
585
586
587 void NCR53c406a_setup(char *str, int *ints)
588 {
589 static size_t setup_idx = 0;
590 size_t i;
591
592 DEB(printk("NCR53c406a: Setup called\n"););
593
594 if (setup_idx >= PORT_COUNT - 1) {
595 printk("NCR53c406a: Setup called too many times. Bad LILO params?\n");
596 return;
597 }
598 if (ints[0] < 1 || ints[0] > 3) {
599 printk("NCR53c406a: Malformed command line\n");
600 printk("NCR53c406a: Usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]\n");
601 return;
602 }
603 for (i = 0; i < PORT_COUNT && !port_base; i++)
604 if (ports[i] == ints[1]) {
605 port_base = ints[1];
606 DEB(printk("NCR53c406a: Specified port_base 0x%X\n", port_base);)
607 }
608 if (!port_base) {
609 printk("NCR53c406a: Invalid PORTBASE 0x%X specified\n", ints[1]);
610 return;
611 }
612
613 if (ints[0] > 1) {
614 if (ints[2] == 0) {
615 irq_level = 0;
616 DEB(printk("NCR53c406a: Specified irq %d\n", irq_level);)
617 }
618 else
619 for (i = 0; i < INTR_COUNT && irq_level < 0; i++)
620 if (intrs[i] == ints[2]) {
621 irq_level = ints[2];
622 DEB(printk("NCR53c406a: Specified irq %d\n", port_base);)
623 }
624 if (irq_level < 0)
625 printk("NCR53c406a: Invalid IRQ %d specified\n", ints[2]);
626 }
627
628 if (ints[0] > 2)
629 fast_pio = ints[3];
630
631 DEB(printk("NCR53c406a: port_base=0x%X, irq=%d, fast_pio=%d\n", port_base, irq_level, fast_pio);)
632 }
633
634 const char*
635 NCR53c406a_info(struct Scsi_Host *SChost){
636 DEB(printk("NCR53c406a_info called\n"));
637 return (info_msg);
638 }
639
640 static void internal_done(Scsi_Cmnd *SCpnt) {
641 internal_done_errcode = SCpnt->result;
642 ++internal_done_flag;
643 }
644
645
646 static void wait_intr() {
647 int i = jiffies + WATCHDOG;
648
649 while(i>jiffies && !(inb(STAT_REG)&0xe0))
650 barrier();
651
652 if (i <= jiffies) {
653 rtrc(0);
654 current_SC->result = DID_TIME_OUT << 16;
655 current_SC->SCp.phase = idle;
656 current_SC->scsi_done(current_SC);
657 return;
658 }
659
660 NCR53c406a_intr(0, NULL);
661 }
662
663 int NCR53c406a_command(Scsi_Cmnd *SCpnt){
664 DEB(printk("NCR53c406a_command called\n"));
665 NCR53c406a_queue(SCpnt, internal_done);
666 if(irq_level)
667 while (!internal_done_flag);
668 else
669 while (!internal_done_flag)
670 wait_intr();
671
672 internal_done_flag = 0;
673 return internal_done_errcode;
674 }
675
676
677 int
678 NCR53c406a_queue(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *)){
679 int i;
680 unsigned long flags = 0;
681
682 VDEB(printk("NCR53c406a_queue called\n"));
683 DEB(printk("cmd=%02x, cmd_len=%02x, target=%02x, lun=%02x, bufflen=%d\n",
684 SCpnt->cmnd[0],
685 SCpnt->cmd_len,
686 SCpnt->target,
687 SCpnt->lun,
688 SCpnt->request_bufflen));
689
690 #if 0
691 VDEB(for(i=0; i<SCpnt->cmd_len; i++)
692 printk("cmd[%d]=%02x ", i, SCpnt->cmnd[i]));
693 VDEB(printk("\n"));
694 #endif
695
696 current_SC = SCpnt;
697 current_SC->scsi_done = done;
698 current_SC->SCp.phase = command_ph;
699 current_SC->SCp.Status = 0;
700 current_SC->SCp.Message = 0;
701
702 save_flags(flags);
703 cli();
704 REG0;
705 outb(SCpnt->target, DEST_ID);
706 outb(FLUSH_FIFO, CMD_REG);
707
708 for(i=0; i<SCpnt->cmd_len; i++){
709 outb(SCpnt->cmnd[i], SCSI_FIFO);
710 }
711 outb(SELECT_NO_ATN, CMD_REG);
712 restore_flags(flags);
713
714 rtrc(1);
715 return 0;
716 }
717
718 int
719 NCR53c406a_abort(Scsi_Cmnd *SCpnt){
720 DEB(printk("NCR53c406a_abort called\n"));
721 return SCSI_ABORT_SNOOZE;
722 }
723
724 int
725 NCR53c406a_reset(Scsi_Cmnd *SCpnt){
726 DEB(printk("NCR53c406a_reset called\n"));
727 outb(C4_IMG, CONFIG4);
728 outb(CHIP_RESET, CMD_REG);
729 outb(SCSI_NOP, CMD_REG);
730 outb(SCSI_RESET, CMD_REG);
731 chip_init();
732
733 rtrc(2);
734 if (irq_level)
735 return SCSI_RESET_PENDING;
736 else
737 return SCSI_RESET_WAKEUP;
738 }
739
740 int
741 NCR53c406a_biosparm(Scsi_Disk *disk, kdev_t dev, int* info_array){
742 int size;
743
744 DEB(printk("NCR53c406a_biosparm called\n"));
745
746 size = disk->capacity;
747 info_array[0] = 64;
748 info_array[1] = 32;
749 info_array[2] = size>>11;
750 if (info_array[2] > 1024) {
751 info_array[0] = 255;
752 info_array[1] = 63;
753 info_array[2] = size / (255*63);
754 }
755 return 0;
756 }
757
758 static void
759 NCR53c406a_intr(int unused, struct pt_regs *regs){
760 DEB(unsigned char fifo_size;)
761 DEB(unsigned char seq_reg;)
762 unsigned char status, int_reg;
763 unsigned long flags = 0;
764 #if USE_PIO
765 unsigned char pio_status;
766 struct scatterlist *sglist;
767 unsigned int sgcount;
768 #endif
769
770 VDEB(printk("NCR53c406a_intr called\n"));
771
772 save_flags(flags);
773 cli();
774 #if USE_PIO
775 REG1;
776 pio_status = inb(PIO_STATUS);
777 #endif
778 REG0;
779 status = inb(STAT_REG);
780 DEB(seq_reg = inb(SEQ_REG));
781 int_reg = inb(INT_REG);
782 DEB(fifo_size = inb(FIFO_FLAGS) & 0x1f);
783 restore_flags(flags);
784
785 #if NCR53C406A_DEBUG
786 printk("status=%02x, seq_reg=%02x, int_reg=%02x, fifo_size=%02x",
787 status, seq_reg, int_reg, fifo_size);
788 #if (USE_DMA)
789 printk("\n");
790 #else
791 printk(", pio=%02x\n", pio_status);
792 #endif USE_DMA
793 #endif NCR53C406A_DEBUG
794
795 if(int_reg & 0x80){
796 rtrc(3);
797 DEB(printk("NCR53c406a: reset intr received\n"));
798 current_SC->SCp.phase = idle;
799 current_SC->result = DID_RESET << 16;
800 current_SC->scsi_done(current_SC);
801 return;
802 }
803
804 #if USE_PIO
805 if(pio_status & 0x80) {
806 printk("NCR53C406A: Warning: PIO error!\n");
807 current_SC->SCp.phase = idle;
808 current_SC->result = DID_ERROR << 16;
809 current_SC->scsi_done(current_SC);
810 return;
811 }
812 #endif USE_PIO
813
814 if(status & 0x20) {
815 printk("NCR53c406a: Warning: parity error!\n");
816 current_SC->SCp.phase = idle;
817 current_SC->result = DID_PARITY << 16;
818 current_SC->scsi_done(current_SC);
819 return;
820 }
821
822 if(status & 0x40) {
823 printk("NCR53c406a: Warning: gross error!\n");
824 current_SC->SCp.phase = idle;
825 current_SC->result = DID_ERROR << 16;
826 current_SC->scsi_done(current_SC);
827 return;
828 }
829
830 if(int_reg & 0x20){
831 DEB(printk("NCR53c406a: disconnect intr received\n"));
832 if(current_SC->SCp.phase != message_in){
833 current_SC->result = DID_NO_CONNECT << 16;
834 }
835 else{
836 current_SC->result = (current_SC->SCp.Status & 0xff)
837 | ((current_SC->SCp.Message & 0xff) << 8) | (DID_OK << 16);
838 }
839
840 rtrc(0);
841 current_SC->SCp.phase = idle;
842 current_SC->scsi_done( current_SC );
843 return;
844 }
845
846 switch(status & 0x07){
847 case 0x00:
848 if(int_reg & 0x10){
849 rtrc(5);
850 current_SC->SCp.phase = data_out;
851 VDEB(printk("NCR53c406a: Data-Out phase\n"));
852 outb(FLUSH_FIFO, CMD_REG);
853 LOAD_DMA_COUNT(current_SC->request_bufflen);
854 #if USE_DMA
855 NCR53c406a_dma_write(current_SC->request_buffer,
856 current_SC->request_bufflen);
857 #endif USE_DMA
858 outb(TRANSFER_INFO | DMA_OP, CMD_REG);
859 #if USE_PIO
860 if (!current_SC->use_sg)
861 NCR53c406a_pio_write(current_SC->request_buffer,
862 current_SC->request_bufflen);
863 else {
864 sgcount = current_SC->use_sg;
865 sglist = current_SC->request_buffer;
866 while( sgcount-- ) {
867 NCR53c406a_pio_write(sglist->address, sglist->length);
868 sglist++;
869 }
870 }
871 REG0;
872 #endif USE_PIO
873 }
874 break;
875
876 case 0x01:
877 if(int_reg & 0x10){
878 rtrc(6);
879 current_SC->SCp.phase = data_in;
880 VDEB(printk("NCR53c406a: Data-In phase\n"));
881 outb(FLUSH_FIFO, CMD_REG);
882 LOAD_DMA_COUNT(current_SC->request_bufflen);
883 #if USE_DMA
884 NCR53c406a_dma_read(current_SC->request_buffer,
885 current_SC->request_bufflen);
886 #endif USE_DMA
887 outb(TRANSFER_INFO | DMA_OP, CMD_REG);
888 #if USE_PIO
889 if (!current_SC->use_sg)
890 NCR53c406a_pio_read(current_SC->request_buffer,
891 current_SC->request_bufflen);
892 else {
893 sgcount = current_SC->use_sg;
894 sglist = current_SC->request_buffer;
895 while( sgcount-- ) {
896 NCR53c406a_pio_read(sglist->address, sglist->length);
897 sglist++;
898 }
899 }
900 REG0;
901 #endif USE_PIO
902 }
903 break;
904
905 case 0x02:
906 current_SC->SCp.phase = command_ph;
907 printk("NCR53c406a: Warning: Unknown interupt occured in command phase!\n");
908 break;
909
910 case 0x03:
911 rtrc(7);
912 current_SC->SCp.phase = status_ph;
913 VDEB(printk("NCR53c406a: Status phase\n"));
914 #if 0
915 #if VERBOSE_NCR53C406A_DEBUG
916 printk("request_buffer=");
917 for(i=0; i<current_SC->request_bufflen && i<256; i++)
918 printk("%02x ", *((unsigned char*)current_SC->request_buffer + i));
919 printk("\n");
920 #if USE_DMA
921 printk("dma residue = %d\n", NCR53c406a_dma_residual());
922 #endif USE_DMA
923 #endif VERBOSE_NCR53C406A_DEBUG
924 #endif
925
926 outb(FLUSH_FIFO, CMD_REG);
927 outb(INIT_CMD_COMPLETE, CMD_REG);
928 break;
929
930 case 0x04:
931 case 0x05:
932 printk("NCR53c406a: WARNING: Reserved phase!!!\n");
933 break;
934
935 case 0x06:
936 DEB(printk("NCR53c406a: Message-Out phase\n"));
937 current_SC->SCp.phase = message_out;
938 outb(SET_ATN, CMD_REG);
939 outb(MSG_ACCEPT, CMD_REG);
940 break;
941
942 case 0x07:
943 rtrc(4);
944 VDEB(printk("NCR53c406a: Message-In phase\n"));
945 current_SC->SCp.phase = message_in;
946
947 current_SC->SCp.Status = inb(SCSI_FIFO);
948 current_SC->SCp.Message = inb(SCSI_FIFO);
949
950 VDEB(printk("SCSI FIFO size=%d\n", inb(FIFO_FLAGS) & 0x1f));
951 DEB(printk("Status = %02x Message = %02x\n",
952 current_SC->SCp.Status, current_SC->SCp.Message));
953
954 if(current_SC->SCp.Message == SAVE_POINTERS ||
955 current_SC->SCp.Message == DISCONNECT) {
956 outb(SET_ATN, CMD_REG);
957 DEB(printk("Discarding SAVE_POINTERS message\n"));
958 }
959 outb(MSG_ACCEPT, CMD_REG);
960 break;
961 }
962 }
963
964 #ifndef IRQ_LEV
965 static int irq_probe()
966 {
967 int irqs, irq;
968 int i;
969
970 inb(INT_REG);
971 sti();
972 irqs = probe_irq_on();
973
974
975 REG0;
976 outb(0xff, CMD_REG);
977
978
979 i = jiffies + WATCHDOG;
980 while(i > jiffies && !(inb(STAT_REG) & 0x80))
981 barrier();
982 if (i <= jiffies) {
983 probe_irq_off(irqs);
984 return -1;
985 }
986
987 irq = probe_irq_off(irqs);
988
989
990 outb(CHIP_RESET, CMD_REG);
991 outb(SCSI_NOP, CMD_REG);
992 chip_init();
993
994 return irq;
995 }
996 #endif IRQ_LEV
997
998 static void chip_init()
999 {
1000 REG1;
1001 #if USE_DMA
1002 outb(0x00, PIO_STATUS);
1003 #else
1004 outb(0x01, PIO_STATUS);
1005 #endif
1006 outb(0x00, PIO_FLAG);
1007
1008 outb(C4_IMG, CONFIG4);
1009 outb(C3_IMG, CONFIG3);
1010 outb(C2_IMG, CONFIG2);
1011 outb(C1_IMG, CONFIG1);
1012
1013 outb(0x05, CLKCONV);
1014 outb(0x9C, SRTIMOUT);
1015 outb(0x05, SYNCPRD);
1016 outb(SYNC_MODE, SYNCOFF);
1017 }
1018
1019 void calc_port_addr()
1020 {
1021
1022 TC_LSB = (port_base+0x00);
1023 TC_MSB = (port_base+0x01);
1024 SCSI_FIFO = (port_base+0x02);
1025 CMD_REG = (port_base+0x03);
1026 STAT_REG = (port_base+0x04);
1027 DEST_ID = (port_base+0x04);
1028 INT_REG = (port_base+0x05);
1029 SRTIMOUT = (port_base+0x05);
1030 SEQ_REG = (port_base+0x06);
1031 SYNCPRD = (port_base+0x06);
1032 FIFO_FLAGS = (port_base+0x07);
1033 SYNCOFF = (port_base+0x07);
1034 CONFIG1 = (port_base+0x08);
1035 CLKCONV = (port_base+0x09);
1036
1037 CONFIG2 = (port_base+0x0B);
1038 CONFIG3 = (port_base+0x0C);
1039 CONFIG4 = (port_base+0x0D);
1040 TC_HIGH = (port_base+0x0E);
1041
1042
1043
1044
1045
1046
1047 PIO_FIFO = (port_base+0x04);
1048
1049
1050
1051 PIO_STATUS = (port_base+0x08);
1052
1053
1054 PIO_FLAG = (port_base+0x0B);
1055 CONFIG5 = (port_base+0x0D);
1056
1057
1058 }
1059
1060 #ifdef MODULE
1061
1062 Scsi_Host_Template driver_template = NCR53c406a;
1063
1064 #include "scsi_module.c"
1065 #endif