1 /******************************************************** 2 * Header file for eata_dma.c and eata_pio.c * 3 * Linux EATA SCSI drivers * 4 * (c) 1993,94,95 Michael Neuffer * 5 ********************************************************* 6 * last change: 95/06/20 * 7 ********************************************************/ 8 9 10 #ifndef _EATA_GENERIC_H 11 #define _EATA_GENERIC_H 12 13 14 15 /********************************************* 16 * Misc. definitions * 17 *********************************************/ 18 19 #ifndef TRUE 20 #define TRUE 1 21 #endif 22 #ifndef FALSE 23 #define FALSE 0 24 #endif 25 26 #define min(a,b) ((a<b)?(a):(b)) 27 28 #define R_LIMIT 0x20000 29 30 #define MAXISA 4 31 #define MAXEISA 16 32 #define MAXPCI 16 33 #define MAXIRQ 16 34 #define MAXTARGET 16 35 #define MAXCHANNEL 3 36 37 #define IS_ISA 'I' 38 #define IS_EISA 'E' 39 #define IS_PCI 'P' 40 41 #define BROKEN_INQUIRY 1 42 43 #define BUSMASTER 0xff 44 #define PIO 0xfe 45 46 #define EATA_SIGNATURE 0x45415441 /* BIG ENDIAN coded "EATA" sig. */ 47 #define EATA_CP_SIZE 44 48 49 #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */ 50 #define MAX_METHOD_2 16 /* Max Devices For Method 2 */ 51 #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */ 52 53 #define SG_SIZE 64 54 #define SG_SIZE_BIG 509 /* max. 509 */ 55 56 #define C_P_L_DIV 2 /* 1 <= C_P_L_DIV <= 8 57 * You can use this parameter to fine-tune 58 * the driver. Depending on the number of 59 * devices and their speed and ability to queue 60 * commands, you will get the best results with a 61 * value 62 * ~= numdevices-(devices_unable_to_queue_commands/2) 63 * The reason for this is that the disk driver 64 * tends to flood the queue, so that other 65 * drivers have problems to queue commands 66 * themselves. This can for example result in 67 * the effect that the tape stops during disk 68 * accesses. 69 */ 70 71 #define FREE 0 72 #define OK 0 73 #define NO_TIMEOUT 0 74 #define USED 1 75 #define TIMEOUT 2 76 #define RESET 4 77 #define LOCKED 8 78 79 #define HD(cmd) ((hostdata *)&(cmd->host->hostdata)) 80 #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble)) 81 #define SD(host) ((hostdata *)&(host->hostdata)) 82 83 #define DELAY(x) { __u32 i; i = jiffies + (x * HZ); while (jiffies < i) barrier(); } 84 #define DEL2(x) { __u32 i; for (i = 0; i < 0xffff * x; i++); } 85 86 /*********************************************** 87 * EATA Command & Register definitions * 88 ***********************************************/ 89 #define PCI_REG_DPTconfig 0x40 90 #define PCI_REG_PumpModeAddress 0x44 91 #define PCI_REG_PumpModeData 0x48 92 #define PCI_REG_ConfigParam1 0x50 93 #define PCI_REG_ConfigParam2 0x54 94 95 96 #define EATA_CMD_PIO_SETUPTEST 0xc6 97 #define EATA_CMD_PIO_READ_CONFIG 0xf0 98 #define EATA_CMD_PIO_SET_CONFIG 0xf1 99 #define EATA_CMD_PIO_SEND_CP 0xf2 100 #define EATA_CMD_PIO_RECEIVE_SP 0xf3 101 #define EATA_CMD_PIO_TRUNC 0xf4 102 103 #define EATA_CMD_RESET 0xf9 104 #define EATA_CMD_IMMEDIATE 0xfa 105 106 #define EATA_CMD_DMA_READ_CONFIG 0xfd 107 #define EATA_CMD_DMA_SET_CONFIG 0xfe 108 #define EATA_CMD_DMA_SEND_CP 0xff 109 110 #define ECS_EMULATE_SENSE 0xd4 111 112 113 #define GENERIC_ABORT 0x00 114 #define SPECIFIC_RESET 0x01 115 #define BUS_RESET 0x02 116 #define SPECIFIC_ABORT 0x03 117 #define QUIET_INTR 0x04 118 #define COLD_BOOT_HBA 0x06 /* Only as a last resort */ 119 #define FORCE_IO 0x07 120 121 122 #define HA_WCOMMAND 0x07 /* command register offset */ 123 #define HA_WCOMMAND2 0x06 /* immediate command offset */ 124 #define HA_WSUBCODE 0x05 125 #define HA_WSUBLUN 0x04 126 #define HA_WDMAADDR 0x02 /* DMA address LSB offset */ 127 #define HA_RAUXSTAT 0x08 /* aux status register offset*/ 128 #define HA_RSTATUS 0x07 /* status register offset */ 129 #define HA_RDATA 0x00 /* data register (16bit) */ 130 131 #define HA_ABUSY 0x01 /* aux busy bit */ 132 #define HA_AIRQ 0x02 /* aux IRQ pending bit */ 133 #define HA_SERROR 0x01 /* pr. command ended in error*/ 134 #define HA_SMORE 0x02 /* more data soon to come */ 135 #define HA_SCORR 0x04 /* data corrected */ 136 #define HA_SDRQ 0x08 /* data request active */ 137 #define HA_SSC 0x10 /* seek complete */ 138 #define HA_SFAULT 0x20 /* write fault */ 139 #define HA_SREADY 0x40 /* drive ready */ 140 #define HA_SBUSY 0x80 /* drive busy */ 141 #define HA_SDRDY HA_SSC+HA_SREADY+HA_SDRQ 142 143 /********************************************** 144 * Message definitions * 145 **********************************************/ 146 147 #define HA_NO_ERROR 0x00 /* No Error */ 148 #define HA_ERR_SEL_TO 0x01 /* Selection Timeout */ 149 #define HA_ERR_CMD_TO 0x02 /* Command Timeout */ 150 #define HA_ERR_RESET 0x03 /* SCSI Bus Reset Received */ 151 #define HA_INIT_POWERUP 0x04 /* Initial Controller Power-up */ 152 #define HA_UNX_BUSPHASE 0x05 /* Unexpected Bus Phase */ 153 #define HA_UNX_BUS_FREE 0x06 /* Unexpected Bus Free */ 154 #define HA_BUS_PARITY 0x07 /* Bus Parity Error */ 155 #define HA_SCSI_HUNG 0x08 /* SCSI Hung */ 156 #define HA_UNX_MSGRJCT 0x09 /* Unexpected Message Rejected */ 157 #define HA_RESET_STUCK 0x0a /* SCSI Bus Reset Stuck */ 158 #define HA_RSENSE_FAIL 0x0b /* Auto Request-Sense Failed */ 159 #define HA_PARITY_ERR 0x0c /* Controller Ram Parity Error */ 160 #define HA_CP_ABORT_NA 0x0d /* Abort Message sent to non-active cmd */ 161 #define HA_CP_ABORTED 0x0e /* Abort Message sent to active cmd */ 162 #define HA_CP_RESET_NA 0x0f /* Reset Message sent to non-active cmd */ 163 #define HA_CP_RESET 0x10 /* Reset Message sent to active cmd */ 164 #define HA_ECC_ERR 0x11 /* Controller Ram ECC Error */ 165 #define HA_PCI_PARITY 0x12 /* PCI Parity Error */ 166 #define HA_PCI_MABORT 0x13 /* PCI Master Abort */ 167 #define HA_PCI_TABORT 0x14 /* PCI Target Abort */ 168 #define HA_PCI_STABORT 0x15 /* PCI Signaled Target Abort */ 169 170 /********************************************** 171 * Other definitions * 172 **********************************************/ 173 174 struct reg_bit { /* reading this one will clear the interrupt */ 175 __u8 error:1; /* previous command ended in an error */ 176 __u8 more:1; /* more DATA coming soon, poll BSY & DRQ (PIO) */ 177 __u8 corr:1; /* data read was successfully corrected with ECC*/ 178 __u8 drq:1; /* data request active */ 179 __u8 sc:1; /* seek complete */ 180 __u8 fault:1; /* write fault */ 181 __u8 ready:1; /* drive ready */ 182 __u8 busy:1; /* controller busy */ 183 }; 184 185 struct reg_abit { /* reading this won't clear the interrupt */ 186 __u8 abusy:1; /* auxiliary busy */ 187 __u8 irq:1; /* set when drive interrupt is asserted */ 188 __u8 dummy:6; 189 }; 190 191 struct eata_register { /* EATA register set */ 192 __u8 data_reg[2]; /* R, couldn't figure this one out */ 193 __u8 cp_addr[4]; /* W, CP address register */ 194 union { 195 __u8 command; /* W, command code: [read|set] conf, send CP*/ 196 struct reg_bit status; /* R, see register_bit1 */ 197 __u8 statusbyte; 198 } ovr; 199 struct reg_abit aux_stat; /* R, see register_bit2 */ 200 }; 201 202 struct get_conf { /* Read Configuration Array */ 203 __u32 len; /* Should return 0x22, 0x24, etc */ 204 __u32 signature; /* Signature MUST be "EATA" */ 205 __u8 version2:4, 206 version:4; /* EATA Version level */ 207 __u8 OCS_enabled:1, /* Overlap Command Support enabled */ 208 TAR_support:1, /* SCSI Target Mode supported */ 209 TRNXFR:1, /* Truncate Transfer Cmd not necessary * 210 * Only used in PIO Mode */ 211 MORE_support:1, /* MORE supported (only PIO Mode) */ 212 DMA_support:1, /* DMA supported Driver uses only * 213 * this mode */ 214 DMA_valid:1, /* DRQ value in Byte 30 is valid */ 215 ATA:1, /* ATA device connected (not supported) */ 216 HAA_valid:1; /* Hostadapter Address is valid */ 217 218 __u16 cppadlen; /* Number of pad bytes send after CD data * 219 * set to zero for DMA commands */ 220 __u8 scsi_id[4]; /* SCSI ID of controller 2-0 Byte 0 res. * 221 * if not, zero is returned */ 222 __u32 cplen; /* CP length: number of valid cp bytes */ 223 __u32 splen; /* Number of bytes returned after * 224 * Receive SP command */ 225 __u16 queuesiz; /* max number of queueable CPs */ 226 __u16 dummy; 227 __u16 SGsiz; /* max number of SG table entries */ 228 __u8 IRQ:4, /* IRQ used this HA */ 229 IRQ_TR:1, /* IRQ Trigger: 0=edge, 1=level */ 230 SECOND:1, /* This is a secondary controller */ 231 DMA_channel:2; /* DRQ index, DRQ is 2comp of DRQX */ 232 __u8 sync; /* device at ID 7 tru 0 is running in * 233 * synchronous mode, this will disappear */ 234 __u8 DSBLE:1, /* ISA i/o addressing is disabled */ 235 FORCADR:1, /* i/o address has been forced */ 236 SG_64K:1, 237 SG_UAE:1, 238 :4; 239 __u8 MAX_ID:5, /* Max number of SCSI target IDs */ 240 MAX_CHAN:3; /* Number of SCSI busses on HBA */ 241 __u8 MAX_LUN; /* Max number of LUNs */ 242 __u8 :3, 243 AUTOTRM:1, 244 M1_inst:1, 245 ID_qest:1, /* Raidnum ID is questionable */ 246 is_PCI:1, /* HBA is PCI */ 247 is_EISA:1; /* HBA is EISA */ 248 __u8 unused[478]; 249 }; 250 251 struct eata_sg_list 252 { 253 __u32 data; 254 __u32 len; 255 }; 256 257 struct eata_ccb { /* Send Command Packet structure */ 258 259 __u8 SCSI_Reset:1, /* Cause a SCSI Bus reset on the cmd */ 260 HBA_Init:1, /* Cause Controller to reinitialize */ 261 Auto_Req_Sen:1, /* Do Auto Request Sense on errors */ 262 scatter:1, /* Data Ptr points to a SG Packet */ 263 Resrvd:1, /* RFU */ 264 Interpret:1, /* Interpret the SCSI cdb of own use */ 265 DataOut:1, /* Data Out phase with command */ 266 DataIn:1; /* Data In phase with command */ 267 __u8 reqlen; /* Request Sense Length * 268 * Valid if Auto_Req_Sen=1 */ 269 __u8 unused[3]; 270 __u8 FWNEST:1, /* send cmd to phys RAID component */ 271 unused2:7; 272 __u8 Phsunit:1, /* physical unit on mirrored pair */ 273 I_AT:1, /* inhibit address translation */ 274 I_HBA_C:1, /* HBA inhibit caching */ 275 unused3:5; 276 277 __u8 cp_id:5, /* SCSI Device ID of target */ 278 cp_channel:3; /* SCSI Channel # of HBA */ 279 __u8 cp_lun:3, 280 :2, 281 cp_luntar:1, /* CP is for target ROUTINE */ 282 cp_dispri:1, /* Grant disconnect privilege */ 283 cp_identify:1; /* Always TRUE */ 284 __u8 cp_msg1; /* Message bytes 0-3 */ 285 __u8 cp_msg2; 286 __u8 cp_msg3; 287 __u8 cp_cdb[12]; /* Command Descriptor Block */ 288 __u32 cp_datalen; /* Data Transfer Length * 289 * If scatter=1 len of sg package */ 290 void *cp_viraddr; /* address of this ccb */ 291 __u32 cp_dataDMA; /* Data Address, if scatter=1 * 292 * address of scatter packet */ 293 __u32 cp_statDMA; /* address for Status Packet */ 294 __u32 cp_reqDMA; /* Request Sense Address, used if * 295 * CP command ends with error */ 296 /* Additional CP info begins here */ 297 __u32 timestamp; /* Needed to measure command latency */ 298 __u32 timeout; 299 __u8 sizeindex; 300 __u8 rw_latency; 301 __u8 retries; 302 __u8 status; /* status of this queueslot */ 303 Scsi_Cmnd *cmd; /* address of cmd */ 304 struct eata_sg_list *sg_list; 305 }; 306 307 308 struct eata_sp { 309 __u8 hba_stat:7, /* HBA status */ 310 EOC:1; /* True if command finished */ 311 __u8 scsi_stat; /* Target SCSI status */ 312 __u8 reserved[2]; 313 __u32 residue_len; /* Number of bytes not transferred */ 314 struct eata_ccb *ccb; /* Address set in COMMAND PACKET */ 315 __u8 msg[12]; 316 }; 317 318 typedef struct hstd { 319 __u8 vendor[9]; 320 __u8 name[18]; 321 __u8 revision[6]; 322 __u8 EATA_revision; 323 __u8 bustype; /* bustype of HBA */ 324 __u8 channel; /* # of avail. scsi channels */ 325 __u8 state; /* state of HBA */ 326 __u8 primary; /* true if primary */ 327 __u8 broken_INQUIRY:1; /* This is an EISA HBA with * 328 * broken INQUIRY */ 329 __u8 do_latency; /* Latency measurement flag */ 330 __u32 reads[13]; 331 __u32 writes[13]; 332 __u32 reads_lat[12][4]; 333 __u32 writes_lat[12][4]; 334 /* state of Target (RESET,..) */ 335 __u8 t_state[MAXCHANNEL][MAXTARGET]; 336 /* timeouts on target */ 337 __u32 t_timeout[MAXCHANNEL][MAXTARGET]; 338 __u32 last_ccb; /* Last used ccb */ 339 __u32 cplen; /* size of CP in words */ 340 __u16 cppadlen; /* pad length of cp in words */ 341 __u8 hostid; /* SCSI ID of HBA */ 342 __u8 devflags; /* bits set for detected devices */ 343 __u8 moresupport; /* HBA supports MORE flag */ 344 struct Scsi_Host *next; 345 struct Scsi_Host *prev; 346 struct eata_sp sp; /* status packet */ 347 struct eata_ccb ccb[0]; /* ccb array begins here */ 348 }hostdata; 349 350 /* structure for max. 2 emulated drives */ 351 struct drive_geom_emul { 352 __u8 trans; /* translation flag 1=transl */ 353 __u8 channel; /* SCSI channel number */ 354 __u8 HBA; /* HBA number (prim/sec) */ 355 __u8 id; /* drive id */ 356 __u8 lun; /* drive lun */ 357 __u32 heads; /* number of heads */ 358 __u32 sectors; /* number of sectors */ 359 __u32 cylinder; /* number of cylinders */ 360 }; 361 362 struct geom_emul { 363 __u8 bios_drives; /* number of emulated drives */ 364 struct drive_geom_emul drv[2]; /* drive structures */ 365 }; 366 367 #endif /* _EATA_GENERIC_H */ 368 369 /* 370 * Overrides for Emacs so that we almost follow Linus's tabbing style. 371 * Emacs will notice this stuff at the end of the file and automatically 372 * adjust the settings for this buffer only. This must remain at the end 373 * of the file. 374 * --------------------------------------------------------------------------- 375 * Local variables: 376 * c-indent-level: 4 377 * c-brace-imaginary-offset: 0 378 * c-brace-offset: -4 379 * c-argdecl-indent: 4 380 * c-label-offset: -4 381 * c-continued-statement-offset: 4 382 * c-continued-brace-offset: 0 383 * tab-width: 8 384 * End: 385 */